Commits · 578d5941ee23743c28959d84fd5f6eec09c7734d · lvzhengyang / riscv-gcc-1

25 Sep, 2015 1 commit
- Fix old ChangeLog entry to include global variable name that was changed. · bffb9e6d
```
From-SVN: r228137
```
  Teresa Johnson committed 9 years ago
  bffb9e6d Browse File
06 Jan, 2014 1 commit

Reverted r205593 · 892c4745

2013-12-02  Bernd Edlinger  <bernd.edlinger@hotmail.de>

	PR target/58115
	* function.c (invoke_set_current_function_hook): Call
	targetm.set_current_function after setting this_fn_optabs.

From-SVN: r206364

committed 11 years ago

892c4745 Browse File

05 Jan, 2014 1 commit

i386.c (ix86_data_alignment): Calculate max_align from prefetch_block tune setting. · c30f016c

	* config/i386/i386.c (ix86_data_alignment): Calculate max_align
	from prefetch_block tune setting.
	(nocona_cost): Correct size of prefetch block to 64.

From-SVN: r206345

committed 11 years ago

c30f016c Browse File

31 Dec, 2013 8 commits

re PR rtl-optimization/59647 (ICE in simplify_const_unary_operation, at simplify-rtx.c:1597) · dfebbdc6

	PR rtl-optimization/59647
	* cse.c (cse_process_notes_1): Don't substitute negative VOIDmode
	new_rtx into UNSIGNED_FLOAT rtxes.

	* g++.dg/opt/pr59647.C: New test.

From-SVN: r206267

committed 11 years ago

dfebbdc6 Browse File

avx512fintrin.h (_mm_add_round_sd): New. · 075691af

gcc/
	* config/i386/avx512fintrin.h (_mm_add_round_sd): New.
	(_mm_add_round_sd): Ditto.
	(_mm_add_round_ss): Ditto.
	(_mm_sub_round_sd): Ditto.
	(_mm_sub_round_ss): Ditto.
	(_mm_rcp14_sd): Ditto.
	(_mm_rcp14_ss): Ditto.
	(_mm_sqrt_round_sd): Ditto.
	(_mm_sqrt_round_ss): Ditto.
	(_mm_mul_round_sd): Ditto.
	(_mm_mul_round_ss): Ditto.
	(_mm_div_round_sd): Ditto.
	(_mm_div_round_ss): Ditto.
	(_mm_scalef_round_sd): Ditto.
	(_mm_scalef_round_ss): Ditto.
	(_mm_scalef_round_sd): Ditto.
	(_mm_scalef_round_ss): Ditto.
	(_mm_cvt_roundsd_ss): Ditto.
	(_mm_cvt_roundsd_sd): Ditto.
	(_mm_getexp_round_ss): Ditto.
	(_mm_getexp_round_sd): Ditto.
	(_mm_getmant_round_sd): Ditto.
	(_mm_getmant_round_ss): Ditto.
	(_mm_roundscale_round_ss): Ditto.
	(_mm_roundscale_round_sd): Ditto.
	(_mm_max_round_sd): Ditto.
	(_mm_max_round_ss): Ditto.
	(_mm_min_round_sd): Ditto.
	(_mm_min_round_ss): Ditto.
	(_mm_fmadd_round_sd): Ditto.
	(_mm_fmadd_round_ss): Ditto.
	(_mm_fmsub_round_sd): Ditto.
	(_mm_fmsub_round_ss): Ditto.
	(_mm_fnmadd_round_sd): Ditto.
	(_mm_fnmadd_round_ss): Ditto.
	(_mm_fnmsub_round_sd): Ditto.
	(_mm_fnmsub_round_ss): Ditto.
	(_mm_scalef_sd): Ditto.
	(_mm_scalef_ss): Ditto.
	(_mm_getexp_ss): Ditto.
	(_mm_getexp_sd): Ditto.
	(_mm_getmant_sd): Ditto.
	(_mm_getmant_ss): Ditto.
	(_mm_roundscale_ss): Ditto.
	(_mm_roundscale_sd): Ditto.
	* config/i386/i386-builtin-types.def: New types to support
	new built-ins: <V2DF, V2DF, V2DF, INT, INT>, <V4SF, V4SF, V4SF, INT, INT>,
	<(V4SF, V4SF, V2DF, INT>, <V2DF, V2DF, V4SF, INT>,
	<V4SF, V4SF, V4SF, V4SF, IN>.
	* config/i386/i386.c (enum ix86_builtins): Add IX86_BUILTIN_ADDSD_ROUND,
	IX86_BUILTIN_ADDSS_ROUND, IX86_BUILTIN_CVTSD2SS_ROUND,
	IX86_BUILTIN_CVTSS2SD_ROUND, IX86_BUILTIN_DIVSD_ROUND,
	IX86_BUILTIN_GETEXPSD128, IX86_BUILTIN_DIVSS_ROUND,
	IX86_BUILTIN_GETEXPSS128, IX86_BUILTIN_GETMANTSD128,
	IX86_BUILTIN_GETMANTSS128, IX86_BUILTIN_MAXSD_ROUND,
	IX86_BUILTIN_MAXSS_ROUND, IX86_BUILTIN_MINSD_ROUND,
	IX86_BUILTIN_MINSS_ROUND, IX86_BUILTIN_MULSD_ROUND,
	IX86_BUILTIN_MULSS_ROUND, IX86_BUILTIN_RCP14SD,
	IX86_BUILTIN_RCP14SS, IX86_BUILTIN_RNDSCALESD,
	IX86_BUILTIN_RNDSCALESS, IX86_BUILTIN_RSQRT14SD,
	IX86_BUILTIN_RSQRT14SS, IX86_BUILTIN_SCALEFSD,
	IX86_BUILTIN_SCALEFSS, IX86_BUILTIN_SQRTSD_ROUND,
	IX86_BUILTIN_SQRTSS_ROUND, IX86_BUILTIN_SUBSD_ROUND,
	IX86_BUILTIN_SUBSS_ROUND, IX86_BUILTIN_VFMADDSD3_ROUND,
	IX86_BUILTIN_VFMADDSS3_ROUND, IX86_BUILTIN_VFMSUBSD3_MASK3,
	IX86_BUILTIN_VFMSUBSS3_MASK3.
	(builtin_description bdesc_args[]): Add
	__builtin_ia32_rcp14sd, __builtin_ia32_rcp14ss,
	__builtin_ia32_rsqrt14pd512_mask, __builtin_ia32_rsqrt14ps512_mask,
	__builtin_ia32_rsqrt14sd, __builtin_ia32_rsqrt14ss,
	__builtin_ia32_addsd_round, __builtin_ia32_addss_round,
	__builtin_ia32_cvtsd2ss_round, __builtin_ia32_cvtss2sd_round,
	__builtin_ia32_divsd_round, __builtin_ia32_divss_round,
	__builtin_ia32_getexpsd128_round, __builtin_ia32_getexpss128_round,
	__builtin_ia32_getmantsd_round, __builtin_ia32_getmantss_round,
	__builtin_ia32_maxsd_round, __builtin_ia32_maxss_round,
	__builtin_ia32_minsd_round, __builtin_ia32_minss_round,
	__builtin_ia32_mulsd_round, __builtin_ia32_mulss_round,
	__builtin_ia32_rndscalesd_round, __builtin_ia32_rndscaless_round,
	__builtin_ia32_scalefsd_round, __builtin_ia32_scalefss_round,
	__builtin_ia32_sqrtsd_round, __builtin_ia32_sqrtss_round,
	__builtin_ia32_subsd_round, __builtin_ia32_subss_round,
	__builtin_ia32_vfmaddsd3_round, __builtin_ia32_vfmaddss3_round.
	(ix86_expand_round_builtin): Expand new FTYPEs.
	* config/i386/sse.md (<sse>_vm<plusminus_insn><mode>3): Support
	EVEX's embedded rouding.
	(<sse>_vm<multdiv_mnemonic><mode>3): Ditto.
	(<sse>_vmsqrt<mode>2): Ditto.
	(<sse>_vm<code><mode>3): Ditto.
	(sse2_cvtsd2ss): Ditto.
	(sse2_cvtss2sd): Ditto.
	(*avx512f_vmscalef<mode>): Ditto.
	(avx512f_sgetexp<mode>): Ditto.
	(*avx512f_rndscale<mode>): Ditto.
	(avx512f_getmant<mode>): Ditto.
	(*srcp14<mode>): Make visible.
	(*rsqrt14<mode>): Ditto.
	* config/i386/subst.md (mask_mode512bit_condition): Fix
	mode calculation.
	(sd_mask_mode512bit_condition): Ditto.
	(round_mode512bit_condition): Ditto.
	(round_modev4sf_condition): Ditto.
	(round_mask_scalar_operand3): Remove.
	(round_prefix): New.
	(round_saeonly_op3): Ditto.
	(round_saeonly_prefix): Ditto.

testsuite/
	* gcc.target/i386/avx-1.c: Update for AVX-512 scalar insns.
	* gcc.target/i386/avx512f-vaddsd-1.c: New.
	* gcc.target/i386/avx512f-vaddss-1.c: Ditto.
	* gcc.target/i386/avx512f-vcvtsd2ss-1.c: Ditto.
	* gcc.target/i386/avx512f-vcvtss2sd-1.c: Ditto.
	* gcc.target/i386/avx512f-vdivsd-1.c: Ditto.
	* gcc.target/i386/avx512f-vdivss-1.c: Ditto.
	* gcc.target/i386/avx512f-vextractf32x4-2.c: Ditto.
	* gcc.target/i386/avx512f-vextracti32x4-2.c: Ditto.
	* gcc.target/i386/avx512f-vfmaddXXXsd-1.c: Ditto.
	* gcc.target/i386/avx512f-vfmaddXXXss-1.c: Ditto.
	* gcc.target/i386/avx512f-vfmsubXXXsd-1.c: Ditto.
	* gcc.target/i386/avx512f-vfmsubXXXss-1.c: Ditto.
	* gcc.target/i386/avx512f-vfnmaddXXXsd-1.c: Ditto.
	* gcc.target/i386/avx512f-vfnmaddXXXss-1.c: Ditto.
	* gcc.target/i386/avx512f-vfnmsubXXXsd-1.c: Ditto.
	* gcc.target/i386/avx512f-vfnmsubXXXss-1.c: Ditto.
	* gcc.target/i386/avx512f-vgetexpsd-1.c: Ditto.
	* gcc.target/i386/avx512f-vgetexpsd-2.c: Ditto.
	* gcc.target/i386/avx512f-vgetexpss-1.c: Ditto.
	* gcc.target/i386/avx512f-vgetexpss-2.c: Ditto.
	* gcc.target/i386/avx512f-vgetmantsd-1.c: Ditto.
	* gcc.target/i386/avx512f-vgetmantsd-2.c: Ditto.
	* gcc.target/i386/avx512f-vgetmantss-1.c: Ditto.
	* gcc.target/i386/avx512f-vgetmantss-2.c: Ditto.
	* gcc.target/i386/avx512f-vmaxsd-1.c: Ditto.
	* gcc.target/i386/avx512f-vmaxss-1.c: Ditto.
	* gcc.target/i386/avx512f-vminsd-1.c: Ditto.
	* gcc.target/i386/avx512f-vminss-1.c: Ditto.
	* gcc.target/i386/avx512f-vmulsd-1.c: Ditto.
	* gcc.target/i386/avx512f-vmulss-1.c: Ditto.
	* gcc.target/i386/avx512f-vrcp14sd-1.c: Ditto.
	* gcc.target/i386/avx512f-vrcp14sd-2.c: Ditto.
	* gcc.target/i386/avx512f-vrcp14ss-1.c: Ditto.
	* gcc.target/i386/avx512f-vrcp14ss-2.c: Ditto.
	* gcc.target/i386/avx512f-vrndscalesd-1.c: Ditto.
	* gcc.target/i386/avx512f-vrndscalesd-2.c: Ditto.
	* gcc.target/i386/avx512f-vrndscaless-1.c: Ditto.
	* gcc.target/i386/avx512f-vrndscaless-2.c: Ditto.
	* gcc.target/i386/avx512f-vrsqrt14sd-1.c: Ditto.
	* gcc.target/i386/avx512f-vrsqrt14sd-2.c: Ditto.
	* gcc.target/i386/avx512f-vrsqrt14ss-1.c: Ditto.
	* gcc.target/i386/avx512f-vrsqrt14ss-2.c: Ditto.
	* gcc.target/i386/avx512f-vscalefsd-1.c: Ditto.
	* gcc.target/i386/avx512f-vscalefsd-2.c: Ditto.
	* gcc.target/i386/avx512f-vscalefss-1.c: Ditto.
	* gcc.target/i386/avx512f-vscalefss-2.c: Ditto.
	* gcc.target/i386/avx512f-vsqrtsd-1.c: Ditto.
	* gcc.target/i386/avx512f-vsqrtss-1.c: Ditto.
	* gcc.target/i386/avx512f-vsubsd-1.c: Ditto.
	* gcc.target/i386/avx512f-vsubss-1.c: Ditto.
	* gcc.target/i386/sse-14.c: Update for AVX-512 scalar insns.
	* gcc.target/i386/sse-23.c: Ditto.
	* gcc.target/i386/testimm-10.c: Ditto.


Co-Authored-By: Andrey Turetskiy <andrey.turetskiy@intel.com>
Co-Authored-By: Anna Tikhonova <anna.tikhonova@intel.com>
Co-Authored-By: Ilya Tocar <ilya.tocar@intel.com>
Co-Authored-By: Ilya Verbin <ilya.verbin@intel.com>
Co-Authored-By: Kirill Yukhin <kirill.yukhin@intel.com>
Co-Authored-By: Maxim Kuznetsov <maxim.kuznetsov@intel.com>
Co-Authored-By: Michael Zolotukhin <michael.v.zolotukhin@intel.com>
Co-Authored-By: Sergey Lega <sergey.s.lega@intel.com>

From-SVN: r206265

committed 11 years ago

075691af Browse Directory

re PR tree-optimization/59622 (internal compiler error: verify_gimple failed) · cf3e5a89

	PR tree-optimization/59622
	* gimple-fold.c (gimple_fold_call): Don't replace OBJ_TYPE_REF
	call fndecl with 0 possible targets with BUILT_IN_UNREACHABLE,
	instead only for !inplace add a __builtin_unreachable () call
	before the call.

	* g++.dg/opt/pr59622.C: New test.

From-SVN: r206264

committed 11 years ago

cf3e5a89 Browse Directory

i386-common.c (OPTION_MASK_ISA_SHA_SET): New. · c1618f82

gcc/

	* common/config/i386/i386-common.c (OPTION_MASK_ISA_SHA_SET): New.
	(OPTION_MASK_ISA_SHA_UNSET): Ditto.
	(ix86_handle_option): Handle OPT_msha.
	* config.gcc (extra_headers): Add shaintrin.h.
	* config/i386/cpuid.h (bit_SHA): New.
	* config/i386/driver-i386.c (host_detect_local_cpu): Detect SHA
	instructions.
	* config/i386/i386-c.c (ix86_target_macros_internal): Handle
	OPTION_MASK_ISA_SHA.
	* config/i386/i386.c (ix86_target_string): Add -msha.
	(ix86_option_override_internal): Add PTA_SHA.
	(ix86_valid_target_attribute_inner_p): Handle OPT_msha.
	(enum ix86_builtins): Add IX86_BUILTIN_SHA1MSG1,
	IX86_BUILTIN_SHA1MSG2, IX86_BUILTIN_SHA1NEXTE, IX86_BUILTIN_SHA1RNDS4,
	IX86_BUILTIN_SHA256MSG1, IX86_BUILTIN_SHA256MSG2,
	IX86_BUILTIN_SHA256RNDS2.
	(bdesc_args): Add BUILTINS defined above.
	(ix86_init_mmx_sse_builtins): Add __builtin_ia32_sha1msg1,
	__builtin_ia32_sha1msg2, __builtin_ia32_sha1nexte,
	__builtin_ia32_sha1rnds4, __builtin_ia32_sha256msg1,
	__builtin_ia32_sha256msg2, __builtin_ia32_sha256rnds2.
	(ix86_expand_args_builtin): Handle V4SI_FTYPE_V4SI_V4SI_V4SI, add
	warning for CODE_FOR_sha1rnds4.
	* config/i386/i386.h (TARGET_SHA): New.
	(TARGET_SHA_P): Ditto.
	* config/i386/i386.opt (-msha): Document it.
	* config/i386/immintrin.h: Add shaintrin.h.
	* config/i386/shaintrin.h: New.
	* config/i386/sse.md (unspec): Add UNSPEC_SHA1MSG1, UNSPEC_SHA1MSG2,
	UNSPEC_SHA1NEXTE, UNSPEC_SHA1RNDS4, UNSPEC_SHA256MSG1,
	UNSPEC_SHA256MSG2, UNSPEC_SHA256RNDS2.
	(sha1msg1): New.
	(sha1msg2): Ditto.
	(sha1nexte): Ditto.
	(sha1rnds4): Ditto.
	(sha256msg1): Ditto.
	(sha256msg2): Ditto.
	(sha256rnds2): Ditto.
	* doc/invoke.texi: Add -msha.

testsuite/

	* gcc.target/i386/avx-1.c: Add define for __builtin_ia32_sha1rnds4.
	* gcc.target/i386/i386.exp (check_effective_target_sha): New.
	* gcc.target/i386/sha-check.h: New file.
	* gcc.target/i386/sha1msg1-1.c: Ditto.
	* gcc.target/i386/sha1msg1-2.c: Ditto.
	* gcc.target/i386/sha1msg2-1.c: Ditto.
	* gcc.target/i386/sha1msg2-2.c: Ditto.
	* gcc.target/i386/sha1nexte-1: Ditto.
	* gcc.target/i386/sha1nexte-2: Ditto.
	* gcc.target/i386/sha1rnds4-1.c: Ditto.
	* gcc.target/i386/sha1rnds4-2.c: Ditto.
	* gcc.target/i386/sha256msg1-1.c: Ditto.
	* gcc.target/i386/sha256msg1-2.c: Ditto.
	* gcc.target/i386/sha256msg2-1.c: Ditto.
	* gcc.target/i386/sha256msg2-2.c: Ditto.
	* gcc.target/i386/sha256rnds2-1.c: Ditto.
	* gcc.target/i386/sha256rnds2-2.c: Ditto.
	* gcc.target/i386/sse-13.c: Add __builtin_ia32_sha1rnds4.
	* gcc.target/i386/sse-14.c: Add _mm_sha1rnds4_epu32.
	* gcc.target/i386/sse-22.c: Ditto.
	* gcc.target/i386/sse-23.c: Add __builtin_ia32_sha1rnds4.


Co-Authored-By: Andrey Turetskiy <andrey.turetskiy@intel.com>
Co-Authored-By: Anna Tikhonova <anna.tikhonova@intel.com>
Co-Authored-By: Ilya Tocar <ilya.tocar@intel.com>
Co-Authored-By: Ilya Verbin <ilya.verbin@intel.com>
Co-Authored-By: Kirill Yukhin <kirill.yukhin@intel.com>
Co-Authored-By: Maxim Kuznetsov <maxim.kuznetsov@intel.com>
Co-Authored-By: Michael Zolotukhin <michael.v.zolotukhin@intel.com>
Co-Authored-By: Sergey Lega <sergey.s.lega@intel.com>

From-SVN: r206263

committed 11 years ago

c1618f82 Browse Directory

config.gcc (extra_headers): Add avx512fintrin.h, avx512cdintrin.h,… · 756c5857

config.gcc (extra_headers): Add avx512fintrin.h, avx512cdintrin.h, avx512erintrin.h, avx512pfintrin.h.

gcc/

	* config.gcc (extra_headers): Add avx512fintrin.h, avx512cdintrin.h,
	avx512erintrin.h, avx512pfintrin.h.
	* config/i386/avx512cdintrin.h: New file.
	* config/i386/avx512erintrin.h: New file.
	* config/i386/avx512fintrin.h: New file.
	* config/i386/avx512pfintrin.h: New file.
	* config/i386/i386-builtin-types.def: Add V16UHI, V32SF, V16SF, V8DF,
	V8DI, V16SI, V64QI, PV8DF, PV8DI, PV16SI, PV16SF, PCV8DF, PCV16SF,
	PCV8DI, PCV16SI, V16QI_FTYPE_V16SI, V8DF_FTYPE_V8SI, V8DF_FTYPE_V8DF,
	V8HI_FTYPE_V8DI, V16SF_FTYPE_V16SF, V8SI_FTYPE_V8DI, V8SF_FTYPE_V8DF,
	V8SF_FTYPE_V8DF_V8SF_QI, V16HI_FTYPE_V16SI, V16SF_FTYPE_FLOAT,
	V16SI_FTYPE_INT, V8DF_FTYPE_DOUBLE, V8DI_FTYPE_INT64,
	V16SF_FTYPE_V4SF, V8DF_FTYPE_V4DF, V8DI_FTYPE_V4DI, V16QI_FTYPE_V8DI,
	UINT_FTYPE_V4SF, UINT64_FTYPE_V4SF, UINT_FTYPE_V2DF,
	UINT64_FTYPE_V2DF, V16SI_FTYPE_V16SI, V16SI_FTYPE_V16SI_V16SI_HI,
	V8DI_FTYPE_V8DI, V8DI_FTYPE_V8DI_V8DI_QI, V16SI_FTYPE_PV4SI,
	V16SF_FTYPE_PV4SF, V8DI_FTYPE_PV4DI, V8DF_FTYPE_PV4DF,
	V8UHI_FTYPE_V8UHI, V8USI_FTYPE_V8USI, V2DF_FTYPE_V2DF_UINT,
	V2DF_FTYPE_V2DF_UINT64, V4DF_FTYPE_V8DF_INT,
	V4DF_FTYPE_V8DF_INT_V4DF_QI, V8DF_FTYPE_V8DF_V8DI,
	V4SF_FTYPE_V4SF_UINT, V4SF_FTYPE_V4SF_UINT64,
	INT_FTYPE_V4SF_V4SF_INT_INT, INT_FTYPE_V2DF_V2DF_INT_INT,
	V16SF_FTYPE_V16SF_INT, V4SF_FTYPE_V16SF_INT,
	V4SF_FTYPE_V16SF_INT_V4SF_QI, V16SF_FTYPE_V16SF_V16SF,
	V16SF_FTYPE_V16SF_V16SI, V8DF_FTYPE_V8DF_V4DF_INT_V8DF_QI,
	V8DF_FTYPE_V8DF_V8DF_INT_V8DF_QI, V8DF_FTYPE_V8DF_INT_V8DF_QI,
	V8DF_FTYPE_V8DF_V8DF_V8DI_INT_QI_INT, V8DF_FTYPE_V8DF_V8DF,
	V16SF_FTYPE_V16SF_V16SF_INT, V16SF_FTYPE_V16SF_V16SF_INT_V16SF_HI,
	V16SF_FTYPE_V16SF_INT_V16SF_HI, V16SI_FTYPE_V16SI_V4SI_INT_V16SI_HI,
	V16SF_FTYPE_V16SF_V16SF_V16SI_INT,
	V16SF_FTYPE_V16SF_V16SF_V16SI_INT_HI,
	V16SF_FTYPE_V16SF_V16SF_V16SI_INT_HI_INT,
	V4SF_FTYPE_V4SF_V4SF_V4SI_INT_QI,
	V4SF_FTYPE_V4SF_V4SF_V4SI_INT_QI_INT,
	V2DF_FTYPE_V2DF_V2DF_V2DI_INT_QI,
	V2DF_FTYPE_V2DF_V2DF_V2DI_INT_QI_INT, V16SF_FTYPE_V16SF_V4SF_INT,
	V16SF_FTYPE_V16SF_V4SF_INT_V16SF_HI, V16HI_FTYPE_V16SF_INT,
	V16HI_FTYPE_V16SF_INT_V16HI_HI, V16HI_FTYPE_V16HI_V16HI_INT_V16HI_HI,
	V16SI_FTYPE_V16SI_V4SI, V16SI_FTYPE_V16SI_V4SI_INT,
	V4SI_FTYPE_V16SI_INT, V4SI_FTYPE_V16SI_INT_V4SI_QI,
	V16SI_FTYPE_V16SI_V16SI, V16SI_FTYPE_V16SI_V16SI_INT_V16SI_HI,
	V16SI_FTYPE_V16SI_SI, V16SI_FTYPE_V16SI_INT,
	V16SI_FTYPE_V16SI_V4SI_V16SI_HI, V16SI_FTYPE_V16SI_INT_V16SI_HI,
	V8DI_FTYPE_V8DI_V8DI, V16SI_FTYPE_V8DF_V8DF,
	V8DI_FTYPE_V8DI_V8DI_INT_V8DI_QI, V8DI_FTYPE_V8DI_V4DI_INT_V8DI_QI,
	V8DI_FTYPE_V8DI_V2DI, V4DI_FTYPE_V8DI_INT,
	V4DI_FTYPE_V8DI_INT_V4DI_QI, V8DI_FTYPE_V8DI_V2DI_V8DI_QI,
	V8DI_FTYPE_V8DI_INT_V8DI_QI, VOID_FTYPE_PDOUBLE_V8DF,
	VOID_FTYPE_PFLOAT_V16SF, VOID_FTYPE_PV8DI_V8DI, HI_FTYPE_HI,
	HI_FTYPE_HI_HI, HI_FTYPE_HI_INT, QI_FTYPE_V8DI_V8DI,
	QI_FTYPE_V8DI_V8DI_QI, HI_FTYPE_V16SI_V16SI, HI_FTYPE_V16SI_V16SI_HI,
	QI_FTYPE_V8DI_V8DI_INT, QI_FTYPE_V8DI_V8DI_INT_QI,
	HI_FTYPE_V16SI_V16SI_INT, HI_FTYPE_V16SI_V16SI_INT ,HI,
	QI_FTYPE_V8DF_V8DF_INT, QI_FTYPE_V8DF_V8DF_INT_QI,
	QI_FTYPE_V8DF_V8DF_INT_QI_INT, HI_FTYPE_V16SF_V16SF_INT,
	HI_FTYPE_V16SF_V16SF_INT_HI, HI_FTYPE_V16SF_V16SF_INT_HI_INT,
	QI_FTYPE_V2DF_V2DF_INT, QI_FTYPE_V2DF_V2DF_INT_QI,
	QI_FTYPE_V2DF_V2DF_INT_QI_INT, QI_FTYPE_V4SF_V4SF_INT,
	QI_FTYPE_V4SF_V4SF_INT_QI, QI_FTYPE_V4SF_V4SF_INT_QI_INT,
	V16SI_FTYPE_HI, V8DI_FTYPE_QI, V8DF_FTYPE_V8DF_V8DF_V8DF,
	V16SF_FTYPE_V16SF_V16SF_V16SF, V8DF_FTYPE_V8DF_V8DF_QI,
	V8DF_FTYPE_V8SF_V8DF_QI, V8DF_FTYPE_V8SI_V8DF_QI,
	V8DI_FTYPE_V8SI_V8DI_QI, V8DI_FTYPE_V8HI_V8DI_QI,
	V8DI_FTYPE_V16QI_V8DI_QI, V8DI_FTYPE_V8DI_V8DI_V8DI_QI,
	V8DF_FTYPE_V8DI_V8DF_V8DF, V8DF_FTYPE_V8DI_V8DF_V8DF_QI,
	V8DF_FTYPE_V8DF_V8DI_V8DF_QI, V8DF_FTYPE_V8DF_V8DF_V8DF_QI,
	V16SI_FTYPE_V16SI_V16SI_V16SI_HI, V2DF_FTYPE_V2DF_V2DF_V2DF_QI,
	V2DF_FTYPE_V2DF_V4SF_V2DF_QI, V16SF_FTYPE_V16SF_V16SF_HI,
	V16SF_FTYPE_V16SI_V16SF_HI, V16SF_FTYPE_V16SF_V16SF_V16SF_HI,
	V16SF_FTYPE_V16SI_V16SF_V16SF, V16SF_FTYPE_V16SI_V16SF_V16SF_HI,
	V16SF_FTYPE_V16SF_V16SI_V16SF_HI, V4SF_FTYPE_V4SF_V2DF_V4SF_QI,
	V4SF_FTYPE_V4SF_V4SF_V4SF_QI, V16SF_FTYPE_V4SF_V16SF_HI,
	V8DF_FTYPE_V4DF_V8DF_QI, V8DF_FTYPE_V2DF_V8DF_QI,
	V16SI_FTYPE_V4SI_V16SI_HI, V16SI_FTYPE_SI_V16SI_HI,
	V16SI_FTYPE_V16HI_V16SI_HI, V16SI_FTYPE_V16QI_V16SI_HI,
	V8SI_FTYPE_V8DF_V8SI_QI, V8DI_FTYPE_V4DI_V8DI_QI,
	V8DI_FTYPE_V2DI_V8DI_QI, V8DI_FTYPE_DI_V8DI_QI,
	V16SF_FTYPE_PCV16SF_V16SF_HI, V8DF_FTYPE_PCV8DF_V8DF_QI,
	V16SI_FTYPE_PCV16SI_V16SI_HI, V8DI_FTYPE_PCV8DI_V8DI_QI,
	V2DF_FTYPE_PCDOUBLE_V2DF_QI, V4SF_FTYPE_PCFLOAT_V4SF_QI,
	V16QI_FTYPE_V16SI_V16QI_HI, V16HI_FTYPE_V16SI_V16HI_HI,
	V8SI_FTYPE_V8DI_V8SI_QI, V8HI_FTYPE_V8DI_V8HI_QI,
	V16QI_FTYPE_V8DI_V16QI_QI, VOID_FTYPE_PV8DF_V8DF_QI,
	VOID_FTYPE_PV16SF_V16SF_HI, VOID_FTYPE_PV8DI_V8DI_QI,
	VOID_FTYPE_PV16SI_V16SI_HI, VOID_FTYPE_PDOUBLE_V2DF_QI,
	VOID_FTYPE_PFLOAT_V4SF_QI, V16SI_FTYPE_V16SF_V16SI_HI,
	V8DI_FTYPE_V8DI_V8DI_V8DI_INT_QI,
	V16SI_FTYPE_V16SI_V16SI_V16SI_INT_HI, V8DI_FTYPE_V8DI_V8DI_V8DI,
	V16SI_FTYPE_V16SI_V16SI_V16SI, V8DF_FTYPE_V8DF_V8DI_V8DF,
	V16SF_FTYPE_V16SF_V16SI_V16SF, V4SF_FTYPE_V4SF_V4SF_INT_V4SF_QI,
	V2DF_FTYPE_V2DF_V2DF_INT_V2DF_QI, V8DI_FTYPE_V16SI_V16SI_V8DI_QI,
	UINT64_FTYPE_V2DF_INT, UINT64_FTYPE_V4SF_INT, UINT_FTYPE_V2DF_INT,
	UINT_FTYPE_V4SF_INT, INT64_FTYPE_V2DF_INT, INT64_FTYPE_V4SF_INT,
	INT_FTYPE_V2DF_INT, INT_FTYPE_V4SF_INT, V2DF_FTYPE_V2DF_UINT64_INT,
	V4SF_FTYPE_V4SF_UINT64_INT, V4SF_FTYPE_V4SF_UINT_INT,
	V2DF_FTYPE_V2DF_INT64_INT, V4SF_FTYPE_V4SF_INT64_INT,
	V4SF_FTYPE_V4SF_INT_INT, V16SI_FTYPE_V16SF_V16SI_HI_INT,
	V16SF_FTYPE_V16SI_V16SF_HI_INT, V16SF_FTYPE_V16SF_V16SF_HI_INT,
	V16SF_FTYPE_V16HI_V16SF_HI_INT, V8SI_FTYPE_V8DF_V8SI_QI_INT,
	V8SF_FTYPE_V8DF_V8SF_QI_INT, V8DF_FTYPE_V8DF_V8DF_QI_INT,
	V8DF_FTYPE_V8SF_V8DF_QI_INT, V16SF_FTYPE_V16SF_V16SF_V16SF_HI_INT,
	V8DF_FTYPE_V8DF_V8DF_V8DF_QI_INT, V4SF_FTYPE_V4SF_V4SF_V4SF_QI_INT,
	V4SF_FTYPE_V4SF_V2DF_V4SF_QI_INT, V2DF_FTYPE_V2DF_V2DF_V2DF_QI_INT,
	V2DF_FTYPE_V2DF_V4SF_V2DF_QI_INT, V2DF_FTYPE_V2DF_V2DF_V2DF_INT,
	V16SF_FTYPE_V16SF_INT_V16SF_HI_INT, V8DF_FTYPE_V8DF_INT_V8DF_QI_INT,
	V4SF_FTYPE_V4SF_V4SF_INT_V4SF_QI_INT,
	V2DF_FTYPE_V2DF_V2DF_INT_V2DF_QI_INT, V8DI_FTYPE_V8DI_SI_V8DI_V8DI,
	V16SF_FTYPE_V16SF_PCFLOAT_V16SI_HI_INT,
	V16SF_FTYPE_V16SF_PCFLOAT_V8DI_HI_INT,
	V8DF_FTYPE_V8DF_PCDOUBLE_V8SI_QI_INT,
	V8DF_FTYPE_V8DF_PCDOUBLE_V16SI_QI_INT,
	V8SF_FTYPE_V8SF_PCFLOAT_V8DI_QI_INT,
	V8DF_FTYPE_V8DF_PCDOUBLE_V8DI_QI_INT,
	V16SI_FTYPE_V16SI_PCINT_V16SI_HI_INT,
	V16SI_FTYPE_V16SI_PCINT_V8DI_HI_INT,
	V8DI_FTYPE_V8DI_PCINT64_V8SI_QI_INT,
	V8DI_FTYPE_V8DI_PCINT64_V16SI_QI_INT,
	V8SI_FTYPE_V8SI_PCINT_V8DI_QI_INT,
	V8DI_FTYPE_V8DI_PCINT64_V8DI_QI_INT,
	VOID_FTYPE_PFLOAT_HI_V16SI_V16SF_INT,
	VOID_FTYPE_PDOUBLE_QI_V8SI_V8DF_INT,
	VOID_FTYPE_PFLOAT_QI_V8DI_V8SF_INT,
	VOID_FTYPE_PDOUBLE_QI_V8DI_V8DF_INT,
	VOID_FTYPE_PINT_HI_V16SI_V16SI_INT,
	VOID_FTYPE_PLONGLONG_QI_V8SI_V8DI_INT,
	VOID_FTYPE_PINT_QI_V8DI_V8SI_INT,
	VOID_FTYPE_PLONGLONG_QI_V8DI_V8DI_INT,
	VOID_FTYPE_HI_V16SI_PCINT_INT_INT, VOID_FTYPE_QI_V8DI_PCINT_INT_INT.
	(ALIAS): Add DEF_FUNCTION_TYPE_ALIAS (V16SI_FTYPE_V8DF_V8DF, ROUND).
	* config/i386/i386.c (enum ix86_builtins): Add IX86_BUILTIN_ADDPD512,
	IX86_BUILTIN_ADDPS512, IX86_BUILTIN_ADDSD_MASK,
	IX86_BUILTIN_ADDSS_MASK, IX86_BUILTIN_ALIGND512,
	IX86_BUILTIN_ALIGNQ512, IX86_BUILTIN_BLENDMD512,
	IX86_BUILTIN_BLENDMPD512, IX86_BUILTIN_BLENDMPS512,
	IX86_BUILTIN_BLENDMQ512, IX86_BUILTIN_BROADCASTF32X4_512,
	IX86_BUILTIN_BROADCASTF64X4_512, IX86_BUILTIN_BROADCASTI32X4_512,
	IX86_BUILTIN_BROADCASTI64X4_512, IX86_BUILTIN_BROADCASTSD512,
	IX86_BUILTIN_BROADCASTSS512, IX86_BUILTIN_CMPD512,
	IX86_BUILTIN_CMPPD512, IX86_BUILTIN_CMPPS512, IX86_BUILTIN_CMPQ512,
	IX86_BUILTIN_CMPSD_MASK, IX86_BUILTIN_CMPSS_MASK, IX86_BUILTIN_COMIDF,
	IX86_BUILTIN_COMISF, IX86_BUILTIN_COMPRESSPD512,
	IX86_BUILTIN_COMPRESSPDSTORE512, IX86_BUILTIN_COMPRESSPS512,
	IX86_BUILTIN_COMPRESSPSSTORE512, IX86_BUILTIN_CVTDQ2PD512,
	IX86_BUILTIN_CVTDQ2PS512, IX86_BUILTIN_CVTPD2DQ512,
	IX86_BUILTIN_CVTPD2PS512, IX86_BUILTIN_CVTPD2UDQ512,
	IX86_BUILTIN_CVTPH2PS512, IX86_BUILTIN_CVTPS2DQ512,
	IX86_BUILTIN_CVTPS2PD512, IX86_BUILTIN_CVTPS2PH512,
	IX86_BUILTIN_CVTPS2UDQ512, IX86_BUILTIN_CVTSD2SS_MASK,
	IX86_BUILTIN_CVTSI2SD64, IX86_BUILTIN_CVTSI2SS32,
	IX86_BUILTIN_CVTSI2SS64, IX86_BUILTIN_CVTSS2SD_MASK,
	IX86_BUILTIN_CVTTPD2DQ512, IX86_BUILTIN_CVTTPD2UDQ512,
	IX86_BUILTIN_CVTTPS2DQ512, IX86_BUILTIN_CVTTPS2UDQ512,
	IX86_BUILTIN_CVTUDQ2PD512, IX86_BUILTIN_CVTUDQ2PS512,
	IX86_BUILTIN_CVTUSI2SD32, IX86_BUILTIN_CVTUSI2SD64,
	IX86_BUILTIN_CVTUSI2SS32, IX86_BUILTIN_CVTUSI2SS64,
	IX86_BUILTIN_DIVPD512, IX86_BUILTIN_DIVPS512, IX86_BUILTIN_DIVSD_MASK,
	IX86_BUILTIN_DIVSS_MASK, IX86_BUILTIN_EXPANDPD512,
	IX86_BUILTIN_EXPANDPD512Z, IX86_BUILTIN_EXPANDPDLOAD512,
	IX86_BUILTIN_EXPANDPDLOAD512Z, IX86_BUILTIN_EXPANDPS512,
	IX86_BUILTIN_EXPANDPS512Z, IX86_BUILTIN_EXPANDPSLOAD512,
	IX86_BUILTIN_EXPANDPSLOAD512Z, IX86_BUILTIN_EXTRACTF32X4,
	IX86_BUILTIN_EXTRACTF64X4, IX86_BUILTIN_EXTRACTI32X4,
	IX86_BUILTIN_EXTRACTI64X4, IX86_BUILTIN_FIXUPIMMPD512_MASK,
	IX86_BUILTIN_FIXUPIMMPD512_MASKZ, IX86_BUILTIN_FIXUPIMMPS512_MASK,
	IX86_BUILTIN_FIXUPIMMPS512_MASKZ, IX86_BUILTIN_FIXUPIMMSD128_MASK,
	IX86_BUILTIN_FIXUPIMMSD128_MASKZ, IX86_BUILTIN_FIXUPIMMSS128_MASK,
	IX86_BUILTIN_FIXUPIMMSS128_MASKZ, IX86_BUILTIN_GETEXPPD512,
	IX86_BUILTIN_GETEXPPS512, IX86_BUILTIN_GETEXPSD128,
	IX86_BUILTIN_GETEXPSS128, IX86_BUILTIN_GETMANTPD512,
	IX86_BUILTIN_GETMANTPS512, IX86_BUILTIN_GETMANTSD128,
	IX86_BUILTIN_GETMANTSS128, IX86_BUILTIN_INSERTF32X4,
	IX86_BUILTIN_INSERTF64X4, IX86_BUILTIN_INSERTI32X4,
	IX86_BUILTIN_INSERTI64X4, IX86_BUILTIN_LOADAPD512,
	IX86_BUILTIN_LOADAPS512, IX86_BUILTIN_LOADDQUDI512,
	IX86_BUILTIN_LOADDQUSI512, IX86_BUILTIN_LOADSD, IX86_BUILTIN_LOADSS,
	IX86_BUILTIN_LOADUPD512, IX86_BUILTIN_LOADUPS512,
	IX86_BUILTIN_MAXPD512, IX86_BUILTIN_MAXPS512, IX86_BUILTIN_MAXSD_MASK,
	IX86_BUILTIN_MAXSS_MASK, IX86_BUILTIN_MINPD512, IX86_BUILTIN_MINPS512,
	IX86_BUILTIN_MINSD_MASK, IX86_BUILTIN_MINSS_MASK,
	IX86_BUILTIN_MOVAPD512, IX86_BUILTIN_MOVAPS512,
	IX86_BUILTIN_MOVDDUP512, IX86_BUILTIN_MOVDQA32LOAD512,
	IX86_BUILTIN_MOVDQA32STORE512, IX86_BUILTIN_MOVDQA32_512,
	IX86_BUILTIN_MOVDQA64LOAD512, IX86_BUILTIN_MOVDQA64STORE512,
	IX86_BUILTIN_MOVDQA64_512, IX86_BUILTIN_MOVESD, IX86_BUILTIN_MOVESS,
	IX86_BUILTIN_MOVNTDQ512, IX86_BUILTIN_MOVNTPD512,
	IX86_BUILTIN_MOVNTPS512, IX86_BUILTIN_MOVSHDUP512,
	IX86_BUILTIN_MOVSLDUP512, IX86_BUILTIN_MULPD512,
	IX86_BUILTIN_MULPS512, IX86_BUILTIN_MULSD_MASK,
	IX86_BUILTIN_MULSS_MASK, IX86_BUILTIN_PABSD512, IX86_BUILTIN_PABSQ512,
	IX86_BUILTIN_PADDD512, IX86_BUILTIN_PADDQ512, IX86_BUILTIN_PANDD512,
	IX86_BUILTIN_PANDND512, IX86_BUILTIN_PANDNQ512, IX86_BUILTIN_PANDQ512,
	IX86_BUILTIN_PBROADCASTD512, IX86_BUILTIN_PBROADCASTD512_GPR,
	IX86_BUILTIN_PBROADCASTMB512, IX86_BUILTIN_PBROADCASTMW512,
	IX86_BUILTIN_PBROADCASTQ512, IX86_BUILTIN_PBROADCASTQ512_GPR,
	IX86_BUILTIN_PBROADCASTQ512_MEM, IX86_BUILTIN_PCMPEQD512_MASK,
	IX86_BUILTIN_PCMPEQQ512_MASK, IX86_BUILTIN_PCMPGTD512_MASK,
	IX86_BUILTIN_PCMPGTQ512_MASK, IX86_BUILTIN_PCOMPRESSD512,
	IX86_BUILTIN_PCOMPRESSDSTORE512, IX86_BUILTIN_PCOMPRESSQ512,
	IX86_BUILTIN_PCOMPRESSQSTORE512, IX86_BUILTIN_PEXPANDD512,
	IX86_BUILTIN_PEXPANDD512Z, IX86_BUILTIN_PEXPANDDLOAD512,
	IX86_BUILTIN_PEXPANDDLOAD512Z, IX86_BUILTIN_PEXPANDQ512,
	IX86_BUILTIN_PEXPANDQ512Z, IX86_BUILTIN_PEXPANDQLOAD512,
	IX86_BUILTIN_PEXPANDQLOAD512Z, IX86_BUILTIN_PMAXSD512,
	IX86_BUILTIN_PMAXSQ512, IX86_BUILTIN_PMAXUD512,
	IX86_BUILTIN_PMAXUQ512, IX86_BUILTIN_PMINSD512,
	IX86_BUILTIN_PMINSQ512, IX86_BUILTIN_PMINUD512,
	IX86_BUILTIN_PMINUQ512, IX86_BUILTIN_PMOVDB512,
	IX86_BUILTIN_PMOVDW512, IX86_BUILTIN_PMOVQB512,
	IX86_BUILTIN_PMOVQD512, IX86_BUILTIN_PMOVQW512,
	IX86_BUILTIN_PMOVSDB512, IX86_BUILTIN_PMOVSDW512,
	IX86_BUILTIN_PMOVSQB512, IX86_BUILTIN_PMOVSQD512,
	IX86_BUILTIN_PMOVSQW512, IX86_BUILTIN_PMOVSXBD512,
	IX86_BUILTIN_PMOVSXBQ512, IX86_BUILTIN_PMOVSXDQ512,
	IX86_BUILTIN_PMOVSXWD512, IX86_BUILTIN_PMOVSXWQ512,
	IX86_BUILTIN_PMOVUSDB512, IX86_BUILTIN_PMOVUSDW512,
	IX86_BUILTIN_PMOVUSQB512, IX86_BUILTIN_PMOVUSQD512,
	IX86_BUILTIN_PMOVUSQW512, IX86_BUILTIN_PMOVZXBD512,
	IX86_BUILTIN_PMOVZXBQ512, IX86_BUILTIN_PMOVZXDQ512,
	IX86_BUILTIN_PMOVZXWD512, IX86_BUILTIN_PMOVZXWQ512,
	IX86_BUILTIN_PMULDQ512, IX86_BUILTIN_PMULLD512,
	IX86_BUILTIN_PMULUDQ512, IX86_BUILTIN_PORD512, IX86_BUILTIN_PORQ512,
	IX86_BUILTIN_PROLD512, IX86_BUILTIN_PROLQ512, IX86_BUILTIN_PROLVD512,
	IX86_BUILTIN_PROLVQ512, IX86_BUILTIN_PRORD512, IX86_BUILTIN_PRORQ512,
	IX86_BUILTIN_PRORVD512, IX86_BUILTIN_PRORVQ512,
	IX86_BUILTIN_PSHUFD512, IX86_BUILTIN_PSLLD512, IX86_BUILTIN_PSLLDI512,
	IX86_BUILTIN_PSLLQ512, IX86_BUILTIN_PSLLQI512,
	IX86_BUILTIN_PSLLVV16SI, IX86_BUILTIN_PSLLVV8DI,
	IX86_BUILTIN_PSRAD512, IX86_BUILTIN_PSRADI512, IX86_BUILTIN_PSRAQ512,
	IX86_BUILTIN_PSRAQI512, IX86_BUILTIN_PSRAVV16SI,
	IX86_BUILTIN_PSRAVV8DI, IX86_BUILTIN_PSRLD512, IX86_BUILTIN_PSRLDI512,
	IX86_BUILTIN_PSRLQ512, IX86_BUILTIN_PSRLQI512,
	IX86_BUILTIN_PSRLVV16SI, IX86_BUILTIN_PSRLVV8DI,
	IX86_BUILTIN_PSUBD512, IX86_BUILTIN_PSUBQ512, IX86_BUILTIN_PTESTMD512,
	IX86_BUILTIN_PTESTMQ512, IX86_BUILTIN_PTESTNMD512,
	IX86_BUILTIN_PTESTNMQ512, IX86_BUILTIN_PUNPCKHDQ512,
	IX86_BUILTIN_PUNPCKHQDQ512, IX86_BUILTIN_PUNPCKLDQ512,
	IX86_BUILTIN_PUNPCKLQDQ512, IX86_BUILTIN_PXORD512,
	IX86_BUILTIN_PXORQ512, IX86_BUILTIN_RCP14PD512,
	IX86_BUILTIN_RCP14PS512, IX86_BUILTIN_RCP14SD, IX86_BUILTIN_RCP14SS,
	IX86_BUILTIN_RNDSCALEPD, IX86_BUILTIN_RNDSCALEPS,
	IX86_BUILTIN_RNDSCALESD, IX86_BUILTIN_RNDSCALESS,
	IX86_BUILTIN_RSQRT14PD512, IX86_BUILTIN_RSQRT14PS512,
	IX86_BUILTIN_RSQRT14SD, IX86_BUILTIN_RSQRT14SS,
	IX86_BUILTIN_SCALEFPD512, IX86_BUILTIN_SCALEFPS512,
	IX86_BUILTIN_SCALEFSD, IX86_BUILTIN_SCALEFSS, IX86_BUILTIN_SHUFPD512,
	IX86_BUILTIN_SHUFPS512, IX86_BUILTIN_SHUF_F32x4,
	IX86_BUILTIN_SHUF_F64x2, IX86_BUILTIN_SHUF_I32x4,
	IX86_BUILTIN_SHUF_I64x2,
	IX86_BUILTIN_SQRTPD512_MASK, IX86_BUILTIN_SQRTPS512_MASK,
	IX86_BUILTIN_SQRTSD_MASK,
	IX86_BUILTIN_SQRTSS_MASK, IX86_BUILTIN_STOREAPD512,
	IX86_BUILTIN_STOREAPS512, IX86_BUILTIN_STOREDQUDI512,
	IX86_BUILTIN_STOREDQUSI512, IX86_BUILTIN_STORESD,
	IX86_BUILTIN_STORESS, IX86_BUILTIN_STOREUPD512,
	IX86_BUILTIN_STOREUPS512, IX86_BUILTIN_SUBPD512,
	IX86_BUILTIN_SUBPS512, IX86_BUILTIN_SUBSD_MASK,
	IX86_BUILTIN_SUBSS_MASK, IX86_BUILTIN_UCMPD512, IX86_BUILTIN_UCMPQ512,
	IX86_BUILTIN_UNPCKHPD512, IX86_BUILTIN_UNPCKHPS512,
	IX86_BUILTIN_UNPCKLPD512, IX86_BUILTIN_UNPCKLPS512,
	IX86_BUILTIN_VCVTSD2SI32, IX86_BUILTIN_VCVTSD2SI64,
	IX86_BUILTIN_VCVTSD2USI32, IX86_BUILTIN_VCVTSD2USI64,
	IX86_BUILTIN_VCVTSS2SI32, IX86_BUILTIN_VCVTSS2SI64,
	IX86_BUILTIN_VCVTSS2USI32, IX86_BUILTIN_VCVTSS2USI64,
	IX86_BUILTIN_VCVTTSD2SI32, IX86_BUILTIN_VCVTTSD2SI64,
	IX86_BUILTIN_VCVTTSD2USI32, IX86_BUILTIN_VCVTTSD2USI64,
	IX86_BUILTIN_VCVTTSS2SI32, IX86_BUILTIN_VCVTTSS2SI64,
	IX86_BUILTIN_VCVTTSS2USI32, IX86_BUILTIN_VCVTTSS2USI64,
	IX86_BUILTIN_VFMADDPD512_MASK, IX86_BUILTIN_VFMADDPD512_MASK3,
	IX86_BUILTIN_VFMADDPD512_MASKZ, IX86_BUILTIN_VFMADDPS512_MASK,
	IX86_BUILTIN_VFMADDPS512_MASK3, IX86_BUILTIN_VFMADDPS512_MASKZ,
	IX86_BUILTIN_VFMADDSD3_MASK, IX86_BUILTIN_VFMADDSD3_MASK3,
	IX86_BUILTIN_VFMADDSD3_MASKZ, IX86_BUILTIN_VFMADDSS3_MASK,
	IX86_BUILTIN_VFMADDSS3_MASK3, IX86_BUILTIN_VFMADDSS3_MASKZ,
	IX86_BUILTIN_VFMADDSUBPD512_MASK, IX86_BUILTIN_VFMADDSUBPD512_MASK3,
	IX86_BUILTIN_VFMADDSUBPD512_MASKZ, IX86_BUILTIN_VFMADDSUBPS512_MASK,
	IX86_BUILTIN_VFMADDSUBPS512_MASK3, IX86_BUILTIN_VFMADDSUBPS512_MASKZ,
	IX86_BUILTIN_VFMSUBADDPD512_MASK3, IX86_BUILTIN_VFMSUBADDPS512_MASK3,
	IX86_BUILTIN_VFMSUBPD512_MASK3, IX86_BUILTIN_VFMSUBPS512_MASK3,
	IX86_BUILTIN_VFMSUBSD3_MASK3, IX86_BUILTIN_VFMSUBSS3_MASK3,
	IX86_BUILTIN_VFNMADDPD512_MASK, IX86_BUILTIN_VFNMADDPS512_MASK,
	IX86_BUILTIN_VFNMSUBPD512_MASK, IX86_BUILTIN_VFNMSUBPD512_MASK3,
	IX86_BUILTIN_VFNMSUBPS512_MASK, IX86_BUILTIN_VFNMSUBPS512_MASK3,
	IX86_BUILTIN_VPCLZCNTD512, IX86_BUILTIN_VPCLZCNTQ512,
	IX86_BUILTIN_VPCONFLICTD512, IX86_BUILTIN_VPCONFLICTQ512,
	IX86_BUILTIN_VPERMDF512, IX86_BUILTIN_VPERMDI512,
	IX86_BUILTIN_VPERMI2VARD512, IX86_BUILTIN_VPERMI2VARPD512,
	IX86_BUILTIN_VPERMI2VARPS512, IX86_BUILTIN_VPERMI2VARQ512,
	IX86_BUILTIN_VPERMILPD512, IX86_BUILTIN_VPERMILPS512,
	IX86_BUILTIN_VPERMILVARPD512, IX86_BUILTIN_VPERMILVARPS512,
	IX86_BUILTIN_VPERMT2VARD512, IX86_BUILTIN_VPERMT2VARD512_MASKZ,
	IX86_BUILTIN_VPERMT2VARPD512, IX86_BUILTIN_VPERMT2VARPD512_MASKZ,
	IX86_BUILTIN_VPERMT2VARPS512, IX86_BUILTIN_VPERMT2VARPS512_MASKZ,
	IX86_BUILTIN_VPERMT2VARQ512, IX86_BUILTIN_VPERMT2VARQ512_MASKZ,
	IX86_BUILTIN_VPERMVARDF512, IX86_BUILTIN_VPERMVARDI512,
	IX86_BUILTIN_VPERMVARSF512, IX86_BUILTIN_VPERMVARSI512,
	IX86_BUILTIN_VTERNLOGD512_MASK, IX86_BUILTIN_VTERNLOGD512_MASKZ,
	IX86_BUILTIN_VTERNLOGQ512_MASK, IX86_BUILTIN_VTERNLOGQ512_MASKZ,
	IX86_BUILTIN_KAND16, IX86_BUILTIN_KANDN16, IX86_BUILTIN_KNOT16,
	IX86_BUILTIN_KOR16, IX86_BUILTIN_KORTESTC16, IX86_BUILTIN_KORTESTZ16,
	IX86_BUILTIN_KUNPCKBW, IX86_BUILTIN_KXNOR16, IX86_BUILTIN_KXOR16,
	IX86_BUILTIN_GATHER3SIV8DI,
	IX86_BUILTIN_SCATTERDIV16SF, IX86_BUILTIN_SCATTERDIV16SI,
	IX86_BUILTIN_SCATTERDIV8DF, IX86_BUILTIN_SCATTERDIV8DI,
	IX86_BUILTIN_SCATTERSIV16SF, IX86_BUILTIN_SCATTERSIV16SI,
	IX86_BUILTIN_SCATTERSIV8DF, IX86_BUILTIN_SCATTERSIV8DI,
	IX86_BUILTIN_GATHERPFDPS, IX86_BUILTIN_GATHERPFQPS,
	IX86_BUILTIN_SCATTERPFDPS, IX86_BUILTIN_SCATTERPFQPS,
	IX86_BUILTIN_EXP2PD_MASK, IX86_BUILTIN_EXP2PS_MASK,
	IX86_BUILTIN_RCP28PD, IX86_BUILTIN_RCP28PS,
	IX86_BUILTIN_RSQRT28PD, IX86_BUILTIN_RSQRT28PS.
	(bdesc_special_args): Add __builtin_ia32_compressstoresf512_mask,
	__builtin_ia32_compressstoresi512_mask,
	__builtin_ia32_compressstoredf512_mask,
	__builtin_ia32_compressstoredi512_mask,
	__builtin_ia32_expandloadsf512_mask,
	__builtin_ia32_expandloadsf512_maskz,
	__builtin_ia32_expandloadsi512_mask,
	__builtin_ia32_expandloadsi512_maskz,
	__builtin_ia32_expandloaddf512_mask,
	__builtin_ia32_expandloaddf512_maskz,
	__builtin_ia32_expandloaddi512_mask,
	__builtin_ia32_expandloaddi512_maskz,
	__builtin_ia32_loaddqusi512_mask, __builtin_ia32_loaddqudi512_mask,
	__builtin_ia32_loadsd_mask, __builtin_ia32_loadss_mask,
	__builtin_ia32_loadupd512_mask, __builtin_ia32_loadups512_mask,
	__builtin_ia32_loadaps512_mask, __builtin_ia32_movdqa32load512_mask,
	__builtin_ia32_loadapd512_mask, __builtin_ia32_movdqa64load512_mask,
	__builtin_ia32_movntps512, __builtin_ia32_movntpd512,
	__builtin_ia32_movntdq512, __builtin_ia32_storedqusi512_mask,
	__builtin_ia32_storedqudi512_mask, __builtin_ia32_storesd_mask,
	__builtin_ia32_storess_mask, __builtin_ia32_storeupd512_mask,
	__builtin_ia32_storeups512_mask, __builtin_ia32_storeaps512_mask,
	__builtin_ia32_movdqa32store512_mask, __builtin_ia32_storeapd512_mask,
	__builtin_ia32_movdqa64store512_mask, __builtin_ia32_alignd512_mask,
	__builtin_ia32_alignq512_mask, __builtin_ia32_blendmd_512_mask,
	__builtin_ia32_blendmpd_512_mask, __builtin_ia32_blendmps_512_mask,
	__builtin_ia32_blendmq_512_mask, __builtin_ia32_broadcastf32x4_512,
	__builtin_ia32_broadcastf64x4_512, __builtin_ia32_broadcasti32x4_512,
	__builtin_ia32_broadcasti64x4_512, __builtin_ia32_broadcastsd512,
	__builtin_ia32_broadcastss512, __builtin_ia32_cmpd512_mask,
	__builtin_ia32_cmpq512_mask, __builtin_ia32_compressdf512_mask,
	__builtin_ia32_compresssf512_mask, __builtin_ia32_cvtdq2pd512_mask,
	__builtin_ia32_vcvtps2ph512_mask, __builtin_ia32_cvtudq2pd512_mask,
	__builtin_ia32_cvtusi2sd32, __builtin_ia32_expanddf512_mask,
	__builtin_ia32_expanddf512_maskz, __builtin_ia32_expandsf512_mask,
	__builtin_ia32_expandsf512_maskz, __builtin_ia32_extractf32x4_mask,
	__builtin_ia32_extractf64x4_mask, __builtin_ia32_extracti32x4_mask,
	__builtin_ia32_extracti64x4_mask, __builtin_ia32_insertf32x4_mask,
	__builtin_ia32_insertf64x4_mask, __builtin_ia32_inserti32x4_mask,
	__builtin_ia32_inserti64x4_mask, __builtin_ia32_movapd512_mask,
	__builtin_ia32_movaps512_mask, __builtin_ia32_movddup512_mask,
	__builtin_ia32_movdqa32_512_mask, __builtin_ia32_movdqa64_512_mask,
	__builtin_ia32_movesd_mask, __builtin_ia32_movess_mask,
	__builtin_ia32_movshdup512_mask, __builtin_ia32_movsldup512_mask,
	__builtin_ia32_pabsd512_mask, __builtin_ia32_pabsq512_mask,
	__builtin_ia32_paddd512_mask, __builtin_ia32_paddq512_mask,
	__builtin_ia32_pandd512_mask, __builtin_ia32_pandnd512_mask,
	__builtin_ia32_pandnq512_mask, __builtin_ia32_pandq512_mask,
	__builtin_ia32_pbroadcastd512, __builtin_ia32_pbroadcastd512_gpr_mask,
	__builtin_ia32_broadcastmb512, __builtin_ia32_broadcastmw512,
	__builtin_ia32_pbroadcastq512, __builtin_ia32_pbroadcastq512_gpr_mask,
	__builtin_ia32_pbroadcastq512_mem_mask,
	__builtin_ia32_pcmpeqd512_mask, __builtin_ia32_pcmpeqq512_mask,
	__builtin_ia32_pcmpgtd512_mask, __builtin_ia32_pcmpgtq512_mask,
	__builtin_ia32_compresssi512_mask, __builtin_ia32_compressdi512_mask,
	__builtin_ia32_expandsi512_mask, __builtin_ia32_expandsi512_maskz,
	__builtin_ia32_expanddi512_mask, __builtin_ia32_expanddi512_maskz,
	__builtin_ia32_pmaxsd512_mask, __builtin_ia32_pmaxsq512_mask,
	__builtin_ia32_pmaxud512_mask, __builtin_ia32_pmaxuq512_mask,
	__builtin_ia32_pminsd512_mask, __builtin_ia32_pminsq512_mask,
	__builtin_ia32_pminud512_mask, __builtin_ia32_pminuq512_mask,
	__builtin_ia32_pmovdb512_mask, __builtin_ia32_pmovdw512_mask,
	__builtin_ia32_pmovqb512_mask, __builtin_ia32_pmovqd512_mask,
	__builtin_ia32_pmovqw512_mask, __builtin_ia32_pmovsdb512_mask,
	__builtin_ia32_pmovsdw512_mask, __builtin_ia32_pmovsqb512_mask,
	__builtin_ia32_pmovsqd512_mask, __builtin_ia32_pmovsqw512_mask,
	__builtin_ia32_pmovsxbd512_mask, __builtin_ia32_pmovsxbq512_mask,
	__builtin_ia32_pmovsxdq512_mask, __builtin_ia32_pmovsxwd512_mask,
	__builtin_ia32_pmovsxwq512_mask, __builtin_ia32_pmovusdb512_mask,
	__builtin_ia32_pmovusdw512_mask, __builtin_ia32_pmovusqb512_mask,
	__builtin_ia32_pmovusqd512_mask, __builtin_ia32_pmovusqw512_mask,
	__builtin_ia32_pmovzxbd512_mask, __builtin_ia32_pmovzxbq512_mask,
	__builtin_ia32_pmovzxdq512_mask, __builtin_ia32_pmovzxwd512_mask,
	__builtin_ia32_pmovzxwq512_mask, __builtin_ia32_pmuldq512_mask,
	__builtin_ia32_pmulld512_mask, __builtin_ia32_pmuludq512_mask,
	__builtin_ia32_pord512_mask, __builtin_ia32_porq512_mask,
	__builtin_ia32_prold512_mask, __builtin_ia32_prolq512_mask,
	__builtin_ia32_prolvd512_mask, __builtin_ia32_prolvq512_mask,
	__builtin_ia32_prord512_mask, __builtin_ia32_prorq512_mask,
	__builtin_ia32_prorvd512_mask, __builtin_ia32_prorvq512_mask,
	__builtin_ia32_pshufd512_mask, __builtin_ia32_pslld512_mask,
	__builtin_ia32_pslldi512_mask, __builtin_ia32_psllq512_mask,
	__builtin_ia32_psllqi512_mask, __builtin_ia32_psllv16si_mask,
	__builtin_ia32_psllv8di_mask, __builtin_ia32_psrad512_mask,
	__builtin_ia32_psradi512_mask, __builtin_ia32_psraq512_mask,
	__builtin_ia32_psraqi512_mask, __builtin_ia32_psrav16si_mask,
	__builtin_ia32_psrav8di_mask, __builtin_ia32_psrld512_mask,
	__builtin_ia32_psrldi512_mask, __builtin_ia32_psrlq512_mask,
	__builtin_ia32_psrlqi512_mask, __builtin_ia32_psrlv16si_mask,
	__builtin_ia32_psrlv8di_mask, __builtin_ia32_psubd512_mask,
	__builtin_ia32_psubq512_mask, __builtin_ia32_ptestmd512,
	__builtin_ia32_ptestmq512, __builtin_ia32_ptestnmd512,
	__builtin_ia32_ptestnmq512, __builtin_ia32_punpckhdq512_mask,
	__builtin_ia32_punpckhqdq512_mask, __builtin_ia32_punpckldq512_mask,
	__builtin_ia32_punpcklqdq512_mask, __builtin_ia32_pxord512_mask,
	__builtin_ia32_pxorq512_mask, __builtin_ia32_rcp14pd512_mask,
	__builtin_ia32_rcp14ps512_mask, __builtin_ia32_rcp14sd_mask,
	__builtin_ia32_rcp14ss_mask, __builtin_ia32_rsqrt14pd512_mask,
	__builtin_ia32_rsqrt14ps512_mask, __builtin_ia32_rsqrt14sd_mask,
	__builtin_ia32_rsqrt14ss_mask, __builtin_ia32_shufpd512_mask,
	__builtin_ia32_shufps512_mask, __builtin_ia32_shuf_f32x4_mask,
	__builtin_ia32_shuf_f64x2_mask, __builtin_ia32_shuf_i32x4_mask,
	__builtin_ia32_shuf_i64x2_mask, __builtin_ia32_ucmpd512_mask,
	__builtin_ia32_ucmpq512_mask, __builtin_ia32_unpckhpd512_mask,
	__builtin_ia32_unpckhps512_mask, __builtin_ia32_unpcklpd512_mask,
	__builtin_ia32_unpcklps512_mask, __builtin_ia32_vplzcntd_512_mask,
	__builtin_ia32_vplzcntq_512_mask,
	__builtin_ia32_vpconflictsi_512_mask,
	__builtin_ia32_vpconflictdi_512_mask, __builtin_ia32_permdf512_mask,
	__builtin_ia32_permdi512_mask, __builtin_ia32_vpermi2vard512_mask,
	__builtin_ia32_vpermi2varpd512_mask,
	__builtin_ia32_vpermi2varps512_mask,
	__builtin_ia32_vpermi2varq512_mask, __builtin_ia32_vpermilpd512_mask,
	__builtin_ia32_vpermilps512_mask, __builtin_ia32_vpermilvarpd512_mask,
	__builtin_ia32_vpermilvarps512_mask,
	__builtin_ia32_vpermt2vard512_mask,
	__builtin_ia32_vpermt2vard512_maskz,
	__builtin_ia32_vpermt2varpd512_mask,
	__builtin_ia32_vpermt2varpd512_maskz,
	__builtin_ia32_vpermt2varps512_mask,
	__builtin_ia32_vpermt2varps512_maskz,
	__builtin_ia32_vpermt2varq512_mask,
	__builtin_ia32_vpermt2varq512_maskz, __builtin_ia32_permvardf512_mask,
	__builtin_ia32_permvardi512_mask, __builtin_ia32_permvarsf512_mask,
	__builtin_ia32_permvarsi512_mask, __builtin_ia32_pternlogd512_mask,
	__builtin_ia32_pternlogd512_maskz, __builtin_ia32_pternlogq512_mask,
	__builtin_ia32_pternlogq512_maskz, __builtin_ia32_copysignps512,
	__builtin_ia32_copysignpd512, __builtin_ia32_sqrtpd512,
	__builtin_ia32_sqrtps512, __builtin_ia32_exp2ps,
	__builtin_ia32_roundpd_az_vec_pack_sfix512,
	__builtin_ia32_floorpd_vec_pack_sfix512,
	__builtin_ia32_ceilpd_vec_pack_sfix512, __builtin_ia32_kandhi,
	__builtin_ia32_kandnhi, __builtin_ia32_knothi, __builtin_ia32_korhi,
	__builtin_ia32_kortestchi, __builtin_ia32_kortestzhi,
	__builtin_ia32_kunpckhi, __builtin_ia32_kxnorhi,
	__builtin_ia32_kxorhi, __builtin_ia32_addpd512_mask,
	__builtin_ia32_addps512_mask, __builtin_ia32_addsd_mask,
	__builtin_ia32_addss_mask, __builtin_ia32_cmppd512_mask,
	__builtin_ia32_cmpps512_mask, __builtin_ia32_cmpsd_mask,
	__builtin_ia32_cmpss_mask, __builtin_ia32_vcomisd,
	__builtin_ia32_vcomiss, __builtin_ia32_cvtdq2ps512_mask,
	__builtin_ia32_cvtpd2dq512_mask, __builtin_ia32_cvtpd2ps512_mask,
	__builtin_ia32_cvtpd2udq512_mask, __builtin_ia32_vcvtph2ps512_mask,
	__builtin_ia32_cvtps2dq512_mask, __builtin_ia32_cvtps2pd512_mask,
	__builtin_ia32_cvtps2udq512_mask, __builtin_ia32_cvtsd2ss_mask,
	__builtin_ia32_cvtsi2sd64, __builtin_ia32_cvtsi2ss32,
	__builtin_ia32_cvtsi2ss64, __builtin_ia32_cvtss2sd_mask,
	__builtin_ia32_cvttpd2dq512_mask, __builtin_ia32_cvttpd2udq512_mask,
	__builtin_ia32_cvttps2dq512_mask, __builtin_ia32_cvttps2udq512_mask,
	__builtin_ia32_cvtudq2ps512_mask, __builtin_ia32_cvtusi2sd64,
	__builtin_ia32_cvtusi2ss32, __builtin_ia32_cvtusi2ss64,
	__builtin_ia32_divpd512_mask, __builtin_ia32_divps512_mask,
	__builtin_ia32_divsd_mask, __builtin_ia32_divss_mask,
	__builtin_ia32_fixupimmpd512_mask, __builtin_ia32_fixupimmpd512_maskz,
	__builtin_ia32_fixupimmps512_mask, __builtin_ia32_fixupimmps512_maskz,
	__builtin_ia32_fixupimmsd_mask, __builtin_ia32_fixupimmsd_maskz,
	__builtin_ia32_fixupimmss_mask, __builtin_ia32_fixupimmss_maskz,
	__builtin_ia32_getexppd512_mask, __builtin_ia32_getexpps512_mask,
	__builtin_ia32_getexpsd128_mask, __builtin_ia32_getexpss128_mask,
	__builtin_ia32_getmantpd512_mask, __builtin_ia32_getmantps512_mask,
	__builtin_ia32_getmantsd_mask, __builtin_ia32_getmantss_mask,
	__builtin_ia32_maxpd512_mask, __builtin_ia32_maxps512_mask,
	__builtin_ia32_maxsd_mask, __builtin_ia32_maxss_mask,
	__builtin_ia32_minpd512_mask, __builtin_ia32_minps512_mask,
	__builtin_ia32_minsd_mask, __builtin_ia32_minss_mask,
	__builtin_ia32_mulpd512_mask, __builtin_ia32_mulps512_mask,
	__builtin_ia32_mulsd_mask, __builtin_ia32_mulss_mask,
	__builtin_ia32_rndscalepd_mask, __builtin_ia32_rndscaleps_mask,
	__builtin_ia32_rndscalesd_mask, __builtin_ia32_rndscaless_mask,
	__builtin_ia32_scalefpd512_mask, __builtin_ia32_scalefps512_mask,
	__builtin_ia32_scalefsd_mask, __builtin_ia32_scalefss_mask,
	__builtin_ia32_sqrtpd512_mask, __builtin_ia32_sqrtps512_mask,
	__builtin_ia32_sqrtsd_mask, __builtin_ia32_sqrtss_mask,
	__builtin_ia32_subpd512_mask, __builtin_ia32_subps512_mask,
	__builtin_ia32_subsd_mask, __builtin_ia32_subss_mask,
	__builtin_ia32_vcvtsd2si32, __builtin_ia32_vcvtsd2si64,
	__builtin_ia32_vcvtsd2usi32, __builtin_ia32_vcvtsd2usi64,
	__builtin_ia32_vcvtss2si32, __builtin_ia32_vcvtss2si64,
	__builtin_ia32_vcvtss2usi32, __builtin_ia32_vcvtss2usi64,
	__builtin_ia32_vcvttsd2si32, __builtin_ia32_vcvttsd2si64,
	__builtin_ia32_vcvttsd2usi32, __builtin_ia32_vcvttsd2usi64,
	__builtin_ia32_vcvttss2si32, __builtin_ia32_vcvttss2si64,
	__builtin_ia32_vcvttss2usi32, __builtin_ia32_vcvttss2usi64,
	__builtin_ia32_vfmaddpd512_mask, __builtin_ia32_vfmaddpd512_mask3,
	__builtin_ia32_vfmaddpd512_maskz, __builtin_ia32_vfmaddps512_mask,
	__builtin_ia32_vfmaddps512_mask3, __builtin_ia32_vfmaddps512_maskz,
	__builtin_ia32_vfmaddsd3_mask, __builtin_ia32_vfmaddsd3_mask3,
	__builtin_ia32_vfmaddsd3_maskz, __builtin_ia32_vfmaddss3_mask,
	__builtin_ia32_vfmaddss3_mask3, __builtin_ia32_vfmaddss3_maskz,
	__builtin_ia32_vfmaddsubpd512_mask,
	__builtin_ia32_vfmaddsubpd512_mask3,
	__builtin_ia32_vfmaddsubpd512_maskz,
	__builtin_ia32_vfmaddsubps512_mask,
	__builtin_ia32_vfmaddsubps512_mask3,
	__builtin_ia32_vfmaddsubps512_maskz,
	__builtin_ia32_vfmsubaddpd512_mask3,
	__builtin_ia32_vfmsubaddps512_mask3, __builtin_ia32_vfmsubpd512_mask3,
	__builtin_ia32_vfmsubps512_mask3, __builtin_ia32_vfmsubsd3_mask3,
	__builtin_ia32_vfmsubss3_mask3, __builtin_ia32_vfnmaddpd512_mask,
	__builtin_ia32_vfnmaddps512_mask, __builtin_ia32_vfnmsubpd512_mask,
	__builtin_ia32_vfnmsubpd512_mask3, __builtin_ia32_vfnmsubps512_mask,
	__builtin_ia32_vfnmsubps512_mask3, __builtin_ia32_exp2pd_mask,
	__builtin_ia32_exp2ps_mask, __builtin_ia32_rcp28pd_mask,
	__builtin_ia32_rcp28ps_mask, __builtin_ia32_rsqrt28pd_mask,
	__builtin_ia32_rsqrt28ps_mask, __builtin_ia32_gathersiv16sf,
	__builtin_ia32_gathersiv8df, __builtin_ia32_gatherdiv16sf,
	__builtin_ia32_gatherdiv8df, __builtin_ia32_gathersiv16si,
	__builtin_ia32_gathersiv8di, __builtin_ia32_gatherdiv16si,
	__builtin_ia32_gatherdiv8di, __builtin_ia32_gatheraltsiv8df ,
	__builtin_ia32_gatheraltdiv8sf , __builtin_ia32_gatheraltsiv8di ,
	__builtin_ia32_gatheraltdiv8si , __builtin_ia32_scattersiv16sf,
	__builtin_ia32_scattersiv8df, __builtin_ia32_scatterdiv16sf,
	__builtin_ia32_scatterdiv8df, __builtin_ia32_scattersiv16si,
	__builtin_ia32_scattersiv8di, __builtin_ia32_scatterdiv16si,
	__builtin_ia32_scatterdiv8di, __builtin_ia32_gatherpfdps,
	__builtin_ia32_gatherpfqps, __builtin_ia32_scatterpfdps,
	__builtin_ia32_scatterpfqps.
	(ix86_init_mmx_sse_builtins): Handle builtins with AVX512 embeded
	rounding, builtins for AVX512 gathers/scatters.
	(ix86_expand_args_builtin): Handle new functions types, add warnings
	for masked builtins.
	(ix86_erase_embedded_rounding): Handle patterns with embedded rounding.
	(ix86_expand_sse_comi_round): Ditto.
	(ix86_expand_round_builtin): Ditto.
	(ix86_expand_builtin): Handle AVX512's gathers/scatters and kortest{z}.
	Call ix86_expand_round_builtin.
	* config/i386/immintrin.h: Add avx512fintrin.h, avx512erintrin.h,
	avx512pfintrin.h, avx512cdintrin.h.

testsuite/

	* gcc.target/i386/avx-1.c: Extend to AVX-512.
	* gcc.target/i386/sse-22.c: Ditto.
	* gcc.target/i386/sse-23.c: Ditto.


Co-Authored-By: Andrey Turetskiy <andrey.turetskiy@intel.com>
Co-Authored-By: Anna Tikhonova <anna.tikhonova@intel.com>
Co-Authored-By: Ilya Tocar <ilya.tocar@intel.com>
Co-Authored-By: Ilya Verbin <ilya.verbin@intel.com>
Co-Authored-By: Kirill Yukhin <kirill.yukhin@intel.com>
Co-Authored-By: Maxim Kuznetsov <maxim.kuznetsov@intel.com>
Co-Authored-By: Michael Zolotukhin <michael.v.zolotukhin@intel.com>
Co-Authored-By: Sergey Lega <sergey.s.lega@intel.com>

From-SVN: r206261

committed 11 years ago

756c5857 Browse Directory

i386.c (MAX_CLASSES): Increase number of classes. · d3c2fee0

gcc/
	* config/i386/i386.c (MAX_CLASSES): Increase number of classes.
	(classify_argument): Extend for 512 bit vectors.
	(construct_container): Ditto.
	(function_arg_advance_32): Ditto.
	(function_arg_advance_64): Ditto.
	(function_arg_32): Ditto.
	(function_arg_64): Ditto.
	(function_value_32): Ditto.
	(return_in_memory_32): Ditto.
	(ix86_gimplify_va_arg): Ditto.
	(standard_sse_constant_p): Ditto.
	(standard_sse_constant_opcode): Ditto.
	(ix86_expand_vector_convert_uns_vsivsf): Ditto.
	(ix86_build_const_vector): Ditto.
	(ix86_build_signbit_mask): Ditto.
	(ix86_expand_sse_cmp): Extend for AVX512.
	(ix86_expand_sse_movcc): Ditto.
	(ix86_expand_int_vcond): Ditto.
	(ix86_expand_vec_perm): Ditto.
	(ix86_expand_sse_unpack): Ditto.
	(ix86_constant_alignment): Ditto.
	(ix86_builtin_vectorized_function): Ditto.
	(ix86_vectorize_builtin_gather): Ditto.
	(avx_vpermilp_parallel): Ditto.
	(ix86_rtx_costs): Ditto.
	(ix86_expand_vector_init_duplicate): Ditto.
	(ix86_expand_vector_init_concat): Ditto.
	(ix86_expand_vector_init_general): Ditto.
	(ix86_expand_vector_extract): Ditto.
	(emit_reduc_half): Ditto.
	(ix86_vector_mode_supported_p): Ditto.
	(ix86_emit_swdivsf): Ditto.
	(ix86_emit_swsqrtsf): Ditto.
	(expand_vec_perm_1): Ditto.
	(ix86_vectorize_vec_perm_const_ok): Ditto.
	(ix86_expand_mul_widen_evenodd): Ditto.
	(ix86_expand_sse2_mulvxdi3): Ditto.
	(ix86_preferred_simd_mode): Ditto.
	(ix86_autovectorize_vector_sizes): Ditto.
	(ix86_expand_vec_perm_vpermi2): New.
	(ix86_vector_duplicate_value): Ditto.
	(IX86_BUILTIN_SQRTPD512, IX86_BUILTIN_EXP2PS, IX86_BUILTIN_SQRTPS_NR512,
	IX86_BUILTIN_GATHER3ALTDIV16SF, IX86_BUILTIN_GATHER3ALTDIV16SI,
	IX86_BUILTIN_GATHER3ALTSIV8DF, IX86_BUILTIN_GATHER3ALTSIV8DI,
	IX86_BUILTIN_GATHER3DIV16SF, IX86_BUILTIN_GATHER3DIV16SI,
	IX86_BUILTIN_GATHER3DIV8DF, IX86_BUILTIN_GATHER3DIV8DI,
	IX86_BUILTIN_GATHER3SIV16SF, IX86_BUILTIN_GATHER3SIV16SI,
	IX86_BUILTIN_GATHER3SIV8DF, IX86_BUILTIN_CEILPD_VEC_PACK_SFIX512,
	IX86_BUILTIN_CPYSGNPS512, IX86_BUILTIN_CPYSGNPD512,
	IX86_BUILTIN_FLOORPD_VEC_PACK_SFIX512,
	IX86_BUILTIN_ROUNDPD_AZ_VEC_PACK_SFIX512): Ditto.
	* config/i386/sse.md (*mov<mode>_internal): Disable SSE typeless
	stores vectors > 128bit (AVX*).
	(<sse>_storeu<ssemodesuffix><avxsizesuffix>): Ditto.
	(<sse2_avx_avx512f>_storedqu<mode>): Extend for AVX-512, disable
	SSE typeless stores vectors > 128bit (AVX*).
	(fixuns_trunc<mode><sseintvecmodelower>2): Extend for AVX-512.
	(vec_pack_ufix_trunc_<mode>): Ditto.
	(vec_unpacku_float_hi_v16si): New.
	* tree-vect-stmts.c (vectorizable_load): Support AVX512's gathers.
	* tree-vectorizer.h (MAX_VECTORIZATION_FACTOR): Extend for 512 bit
	vectors.

testsuite/
	* gcc.target/i386/pr49002-2.c: allow vmovapd generation.


Co-Authored-By: Andrey Turetskiy <andrey.turetskiy@intel.com>
Co-Authored-By: Anna Tikhonova <anna.tikhonova@intel.com>
Co-Authored-By: Ilya Tocar <ilya.tocar@intel.com>
Co-Authored-By: Ilya Verbin <ilya.verbin@intel.com>
Co-Authored-By: Kirill Yukhin <kirill.yukhin@intel.com>
Co-Authored-By: Maxim Kuznetsov <maxim.kuznetsov@intel.com>
Co-Authored-By: Michael Zolotukhin <michael.v.zolotukhin@intel.com>
Co-Authored-By: Sergey Lega <sergey.s.lega@intel.com>

From-SVN: r206260

committed 11 years ago

d3c2fee0 Browse Directory

Fix typo in PR number (59613) of recent commit. · 41a82845
```
From-SVN: r206258
```
Nick Clifton committed 11 years ago
41a82845 Browse Directory

Commit of nios2 port to trunk: · e430824f

contrib/
2013-12-31  Chung-Lin Tang  <cltang@codesourcery.com>

	* config-list.mk: Add nios2-elf, nios2-linux-gnu. Corrected
	ordering of some configs.

gcc/
2013-12-31  Chung-Lin Tang  <cltang@codesourcery.com>
	    Sandra Loosemore  <sandra@codesourcery.com>
	    Based on patches from Altera Corporation

	* config.gcc (nios2-*-*): Add nios2 config targets.
	* configure.ac (TLS_SECTION_ASM_FLAG): Add nios2 case.
	("$cpu_type"): Add nios2 as new cpu type.
	* configure: Regenerate.
	* config/nios2/nios2.c: New file.
	* config/nios2/nios2.h: New file.
	* config/nios2/nios2-opts.h: New file.
	* config/nios2/nios2-protos.h: New file.
	* config/nios2/elf.h: New file.
	* config/nios2/elf.opt: New file.
	* config/nios2/linux.h: New file.
	* config/nios2/nios2.opt: New file.
	* config/nios2/nios2.md: New file.
	* config/nios2/predicates.md: New file.
	* config/nios2/constraints.md: New file.
	* config/nios2/t-nios2: New file.
	* common/config/nios2/nios2-common.c: New file.
	* doc/invoke.texi (Nios II options): Document Nios II specific
	options.
	* doc/md.texi (Nios II family): Document Nios II specific
	constraints.
	* doc/extend.texi (Function Specific Option Pragmas): Document
	Nios II supported target pragma functionality.

gcc/testsuite/
2013-12-31  Sandra Loosemore  <sandra@codesourcery.com>
	    Chung-Lin Tang  <cltang@codesourcery.com>
	    Based on patches from Altera Corporation

	* gcc.dg/stack-usage-1.c (SIZE): Define case for __nios2__.
	* gcc.dg/20040813-1.c: Skip for nios2-*-*.
	* gcc.dg/20020312-2.c: Add __nios2__ case.
	* g++.dg/other/PR23205.C: Skip for nios2-*-*.
	* g++.dg/other/pr23205-2.C: Skip for nios2-*-*.
	* g++.dg/cpp0x/constexpr-rom.C: Skip for nios2-*-*.
	* g++.dg/cpp0x/alias-decl-debug-0.C: Skip for nios2-*-*.
	* g++.old-deja/g++.jason/thunk3.C: Skip for nios2-*-*.
	* lib/target-supports.exp (check_profiling_available): Check for
	nios2-*-elf.
	* gcc.c-torture/execute/pr47237.x:: Skip for nios2-*-*.
	* gcc.c-torture/execute/20101011-1.c: Skip for nios2-*-*.
	* gcc.c-torture/execute/builtins/lib/chk.c (memset): Place
	char-based memset loop before inline check, to prevent
	problems when called to initialize .bss. Update comments.
	* gcc.target/nios2/nios2.exp: New DejaGNU file.
	* gcc.target/nios2/nios2-custom-1.c: New test.
	* gcc.target/nios2/nios2-trap-insn.c: New test.
	* gcc.target/nios2/nios2-builtin-custom.c: New test.
	* gcc.target/nios2/nios2-builtin-io.c: New test.
	* gcc.target/nios2/nios2-stack-check-1.c: New test.
	* gcc.target/nios2/nios2-stack-check-2.c: New test.
	* gcc.target/nios2/nios2-rdctl.c: New test.
	* gcc.target/nios2/nios2-wrctl.c: New test.
	* gcc.target/nios2/nios2-wrctl-zero.c: New test.
	* gcc.target/nios2/nios2-wrctl-not-zero.c: New test.
	* gcc.target/nios2/nios2-rdwrctl-1.c: New test.
	* gcc.target/nios2/nios2-reg-constraints.c: New test.
	* gcc.target/nios2/nios2-ashlsi3-one_shift.c: New test.
	* gcc.target/nios2/nios2-mul-options-1.c: New test.
	* gcc.target/nios2/nios2-mul-options-2.c: New test.
	* gcc.target/nios2/nios2-mul-options-3.c: New test.
	* gcc.target/nios2/nios2-mul-options-4.c: New test.
	* gcc.target/nios2/nios2-nor.c: New test.
	* gcc.target/nios2/nios2-stxio.c: New test.
	* gcc.target/nios2/custom-fp-1.c: New test.
	* gcc.target/nios2/custom-fp-2.c: New test.
	* gcc.target/nios2/custom-fp-3.c: New test.
	* gcc.target/nios2/custom-fp-4.c: New test.
	* gcc.target/nios2/custom-fp-5.c: New test.
	* gcc.target/nios2/custom-fp-6.c: New test.
	* gcc.target/nios2/custom-fp-7.c: New test.
	* gcc.target/nios2/custom-fp-8.c: New test.
	* gcc.target/nios2/custom-fp-cmp-1.c: New test.
	* gcc.target/nios2/custom-fp-conversion.c: New test.
	* gcc.target/nios2/custom-fp-double.c: New test.
	* gcc.target/nios2/custom-fp-float.c: New test.
	* gcc.target/nios2/nios2-int-types.c: New test.
	* gcc.target/nios2/nios2-cache-1.c: New test.
	* gcc.target/nios2/nios2-cache-2.c: New test.

libgcc/
2013-12-31  Sandra Loosemore  <sandra@codesourcery.com>
	    Chung-Lin Tang  <cltang@codesourcery.com>
	    Based on patches from Altera Corporation

	* config.host (nios2-*-*,nios2-*-linux*): Add nios2 host cases.
	* config/nios2/lib2-nios2.h: New file.
	* config/nios2/lib2-divmod-hi.c: New file.
	* config/nios2/linux-unwind.h: New file.
	* config/nios2/lib2-divmod.c: New file.
	* config/nios2/linux-atomic.c: New file.
	* config/nios2/t-nios2: New file.
	* config/nios2/crti.asm: New file.
	* config/nios2/t-linux: New file.
	* config/nios2/lib2-divtable.c: New file.
	* config/nios2/lib2-mul.c: New file.
	* config/nios2/tramp.c: New file.
	* config/nios2/crtn.asm: New file.

From-SVN: r206256

committed 11 years ago

e430824f Browse Directory

30 Dec, 2013 6 commits

re PR c++/59631 (ICE using _Cilk_spawn without -fcilkplus) · e1a55837

	PR target/59631
	* stor-layout.c (get_mode_bounds): Use GET_MODE_PRECISION instead
	of GET_MODE_BITSIZE.

Co-Authored-By: Peter Bigot <bigotp@acm.org>

From-SVN: r206250

committed 11 years ago

e1a55837 Browse Directory

re PR tree-optimization/59591 (ICE in vect_get_vec_def_for_stmt_copy, at… · acdcd61b

re PR tree-optimization/59591 (ICE in vect_get_vec_def_for_stmt_copy, at tree-vect-stmts.c:156 for -march=core-avx2)

	PR tree-optimization/59591
	* tree-vect-stmts.c (vectorizable_mask_load_store): Fix up handling
	of modifier = NARROW masked gathers.
	(permute_vec_elements): Use gimple_get_lhs instead of
	gimple_assign_lhs.

	* gcc.dg/vect/pr59591-1.c: New test.
	* gcc.dg/vect/pr59591-2.c: New test.
	* gcc.target/i386/pr59591-1.c: New test.
	* gcc.target/i386/pr59591-2.c: New test.

From-SVN: r206248

committed 11 years ago

acdcd61b Browse Directory

msp430.c (msp430_print_operand): Rename %B to %b and %A to %Q. · 51ac3042

	* config/msp430/msp430.c (msp430_print_operand): Rename %B to %b
	and %A to %Q.  Add %A, %B, %C and %D as selectors for 16-bit parts
	of a 64-bit operand.
	* config/msp430/msp430.md: Replace uses of %B with %b and uses of
	%A with %q.

From-SVN: r206247

committed 11 years ago

51ac3042 Browse Directory

ira-costs.c (cost_classes_hasher::equal): Check equality of memcmp and 0 if no… · c99ebd4d

ira-costs.c (cost_classes_hasher::equal): Check equality of memcmp and 0 if no difference exists for HV1 and HV2.

2013-12-30  Felix Yang  <felix.yang@huawei.com>

	* ira-costs.c (cost_classes_hasher::equal): Check equality of
	memcmp and 0 if no difference exists for HV1 and HV2.

From-SVN: r206246

committed 11 years ago

c99ebd4d Browse Directory

re PR tree-optimization/59501 (Vector Gather with GCC 4.9 2013-12-08 Snapshot) · 8e728475

	PR target/59501
	* config/i386/i386.c (ix86_save_reg): Don't return true for drap_reg
	if !crtl->stack_realign_needed.
	(ix86_finalize_stack_realign_flags): If drap_reg isn't live on entry
	and stack_realign_needed will be false, clear drap_reg and need_drap.
	Optimize leaf functions that don't need stack frame even if
	crtl->need_drap.

	* gcc.target/i386/pr59501-1.c: New test.
	* gcc.target/i386/pr59501-1a.c: New test.
	* gcc.target/i386/pr59501-2.c: New test.
	* gcc.target/i386/pr59501-2a.c: New test.
	* gcc.target/i386/pr59501-3.c: New test.
	* gcc.target/i386/pr59501-3a.c: New test.
	* gcc.target/i386/pr59501-4.c: New test.
	* gcc.target/i386/pr59501-4a.c: New test.
	* gcc.target/i386/pr59501-5.c: New test.
	* gcc.target/i386/pr59501-6.c: New test.

From-SVN: r206243

committed 11 years ago

8e728475 Browse Directory

re PR target/59605 (error: wrong number of branch edges after unconditional jump in bb 11) · 5cf5a0e5

	PR target/59605
	* config/i386/i386.c (ix86_expand_set_or_movmem): Create
	jump_around_label only if it doesn't exist.

	* gcc.dg/pr59605.c: New test.

From-SVN: r206242

committed 11 years ago

5cf5a0e5 Browse Directory

28 Dec, 2013 1 commit
- * doc/invoke.texi (output file options): Document -fada-spec-parent. · 24879fd0
```
From-SVN: r206229
```
  Eric Botcazou committed 11 years ago
  24879fd0 Browse Directory
27 Dec, 2013 4 commits

sse.md (avx512f_fixupimm<mode>_maskz): Extend to support EVEX's RC. · 4de67111

        * config/i386/sse.md (avx512f_fixupimm<mode>_maskz): Extend to support
        EVEX's RC.
        (avx512f_sfixupimm<mode>_maskz): Ditto.
        * config/i386/subst.md (round_saeonly_expand_name): New.
        (round_saeonly_expand_nimm_predicate): Ditto.
        (round_saeonly_expand_operand6): Ditto.
        (round_saeonly_expand): Ditto.


Co-Authored-By: Andrey Turetskiy <andrey.turetskiy@intel.com>
Co-Authored-By: Anna Tikhonova <anna.tikhonova@intel.com>
Co-Authored-By: Ilya Tocar <ilya.tocar@intel.com>
Co-Authored-By: Ilya Verbin <ilya.verbin@intel.com>
Co-Authored-By: Kirill Yukhin <kirill.yukhin@intel.com>
Co-Authored-By: Maxim Kuznetsov <maxim.kuznetsov@intel.com>
Co-Authored-By: Michael Zolotukhin <michael.v.zolotukhin@intel.com>
Co-Authored-By: Sergey Lega <sergey.s.lega@intel.com>

From-SVN: r206223

committed 11 years ago

4de67111 Browse Directory

sse.md (avx512f_fmadd_<mode>_maskz): Extend to support EVEX's RC. · 7cf78561

        * config/i386/sse.md (avx512f_fmadd_<mode>_maskz): Extend to support
        EVEX's RC.
        (avx512f_fmaddsub_<mode>_maskz): Ditto.
        * config/i386/subst.md (round_expand_name): New.
        (round_expand_nimm_predicate): Ditto.
        (round_expand_operand): Ditto.
        (round_expand): Ditto.


Co-Authored-By: Andrey Turetskiy <andrey.turetskiy@intel.com>
Co-Authored-By: Anna Tikhonova <anna.tikhonova@intel.com>
Co-Authored-By: Ilya Tocar <ilya.tocar@intel.com>
Co-Authored-By: Ilya Verbin <ilya.verbin@intel.com>
Co-Authored-By: Kirill Yukhin <kirill.yukhin@intel.com>
Co-Authored-By: Maxim Kuznetsov <maxim.kuznetsov@intel.com>
Co-Authored-By: Michael Zolotukhin <michael.v.zolotukhin@intel.com>
Co-Authored-By: Sergey Lega <sergey.s.lega@intel.com>

From-SVN: r206222

committed 11 years ago

7cf78561 Browse Directory

sse.md (<code><mode>3<mask_name>): Extend to support EVEX's SAE mode. · 8a6ef760

        * config/i386/sse.md (<code><mode>3<mask_name>): Extend to support
        EVEX's SAE mode.
        (*<code><mode>3_finite<mask_name>): Ditto.
        (*<code><mode>3<mask_name>): Ditto.
        (avx512f_cmp<mode>3<mask_scalar_merge_name>): Ditto.
        (avx512f_vmcmp<mode>3): Ditto.
        (avx512f_vmcmp<mode>3_mask): Ditto.
        (<sse>_comi): Ditto.
        (<sse>_ucomi): Ditto.
        (sse_cvttss2si): Ditto.
        (sse_cvttss2siq): Ditto.
        (<fixsuffix>fix_truncv16sfv16si2<mask_name>): Ditto.
        (avx512f_vcvttss2usi): Ditto.
        (avx512f_vcvttss2usiq): Ditto.
        (avx512f_vcvttsd2usi): Ditto.
        (avx512f_vcvttsd2usiq): Ditto.
        (sse2_cvttsd2si): Ditto.
        (sse2_cvttsd2siq): Ditto.
        (<fixsuffix>fix_truncv8dfv8si2<mask_name>): Ditto.
        (<sse2_avx_avx512f>_cvtps2pd<avxsizesuffix><mask_name>): Ditto.
        (avx512f_getexp<mode><mask_name>): Ditto.
        (avx512f_fixupimm<mode><sd_maskz_name>): Ditto.
        (avx512f_fixupimm<mode>_mask): Ditto.
        (avx512f_sfixupimm<mode><sd_maskz_name>): Ditto.
        (avx512f_sfixupimm<mode>_mask): Ditto.
        (avx512f_rndscale<mode><mask_name>): Ditto.
        (<mask_codefor>avx512f_vcvtph2ps512<mask_name>): Ditto.
        (avx512f_getmant<mode><mask_name>): Ditto.
        * config/i386/subst.md (round_saeonly_name): New.
        (round_saeonly_mask_operand2): Ditto.
        (round_saeonly_mask_operand3): Ditto.
        (round_saeonly_mask_scalar_operand3): Ditto.
        (round_saeonly_mask_scalar_operand4): Ditto.
        (round_saeonly_mask_scalar_merge_operand4): Ditto.
        (round_saeonly_sd_mask_operand5): Ditto.
        (round_saeonly_op2): Ditto.
        (round_saeonly_op4): Ditto.
        (round_saeonly_op5): Ditto.
        (round_saeonly_op6): Ditto.
        (round_saeonly_mask_op2): Ditto.
        (round_saeonly_mask_op3): Ditto.
        (round_saeonly_mask_scalar_op3): Ditto.
        (round_saeonly_mask_scalar_op4): Ditto.
        (round_saeonly_mask_scalar_merge_op4): Ditto.
        (round_saeonly_sd_mask_op5): Ditto.
        (round_saeonly_constraint): Ditto.
        (round_saeonly_constraint2): Ditto.
        (round_saeonly_nimm_predicate): Ditto.
        (round_saeonly_mode512bit_condition): Ditto.
        (round_saeonly): Ditto.


Co-Authored-By: Andrey Turetskiy <andrey.turetskiy@intel.com>
Co-Authored-By: Anna Tikhonova <anna.tikhonova@intel.com>
Co-Authored-By: Ilya Tocar <ilya.tocar@intel.com>
Co-Authored-By: Ilya Verbin <ilya.verbin@intel.com>
Co-Authored-By: Kirill Yukhin <kirill.yukhin@intel.com>
Co-Authored-By: Maxim Kuznetsov <maxim.kuznetsov@intel.com>
Co-Authored-By: Michael Zolotukhin <michael.v.zolotukhin@intel.com>
Co-Authored-By: Sergey Lega <sergey.s.lega@intel.com>

From-SVN: r206221

committed 11 years ago

8a6ef760 Browse Directory

i386.c (ix86_print_operand): Print EVEX's RC modifiers. · 06bc9e41

        * config/i386/i386.c (ix86_print_operand): Print EVEX's RC modifiers.
        * config/i386/i386.md (define_constants): Define EVEx's RC constants.
        * gcc/config/i386/sse.md (<plusminus_insn><mode>3<mask_name>): Extend
        to support EVEX's rounding control.
        (*<plusminus_insn><mode>3<mask_name>): Ditto.
        (mul<mode>3<mask_name>): Ditto.
        (*mul<mode>3<mask_name>): Ditto.
        (<sse>_div<mode>3<mask_name>): Ditto.
        (<sse>_sqrt<mode>2<mask_name>): Ditto.
        (<sd_mask_codefor>fma_fmadd_<mode><sd_maskz_name>): Ditto.
        (avx512f_fmadd_<mode>_mask): Ditto.
        (avx512f_fmadd_<mode>_mask3): Ditto.
        (<sd_mask_codefor>fma_fmsub_<mode><sd_maskz_name>): Ditto.
        (avx512f_fmsub_<mode>_mask): Ditto.
        (avx512f_fmsub_<mode>_mask3): Ditto.
        (<sd_mask_codefor>fma_fnmadd_<mode><sd_maskz_name>): Ditto.
        (avx512f_fnmadd_<mode>_mask): Ditto.
        (avx512f_fnmadd_<mode>_mask3): Ditto.
        (<sd_mask_codefor>fma_fnmsub_<mode><sd_maskz_name>): Ditto.
        (avx512f_fnmsub_<mode>_mask): Ditto.
        (avx512f_fnmsub_<mode>_mask3): Ditto.
        (<sd_mask_codefor>fma_fmaddsub_<mode><sd_maskz_name>): Ditto.
        (avx512f_fmaddsub_<mode>_mask): Ditto.
        (avx512f_fmaddsub_<mode>_mask3): Ditto.
        (<sd_mask_codefor>fma_fmsubadd_<mode><sd_maskz_name>): Ditto.
        (avx512f_fmsubadd_<mode>_mask): Ditto.
        (avx512f_fmsubadd_<mode>_mask3): Ditto.
        (fmai_vmfmadd_<mode>): Ditto.
        (*fmai_fmadd_<mode>): Ditto.
        (*fmai_fmsub_<mode>): Ditto.
        (*fmai_fnmadd_<mode>): Ditto.
        (*fmai_fnmsub_<mode>): Ditto.
        (sse_cvtsi2ss): Ditto.
        (sse_cvtsi2ssq): Ditto.
        (sse_cvtss2si): Ditto.
        (sse_cvtss2siq): Ditto.
        (cvtusi2<ssescalarmodesuffix>32): Ditto.
        (cvtusi2<ssescalarmodesuffix>64): Ditto.
        (float<sseintvecmodelower><mode>2<mask_name>): Ditto.
        (ufloatv16siv16sf2<mask_name>): Ditto.
        (<mask_codefor>avx512f_fix_notruncv16sfv16si<mask_name>): Ditto.
        (<mask_codefor>avx512f_ufix_notruncv16sfv16si<mask_name>): Ditto.
        (sse2_cvtsi2sdq): Ditto.
        (avx512f_vcvtss2usi): Ditto.
        (avx512f_vcvtss2usiq): Ditto.
        (avx512f_vcvtsd2usi): Ditto.
        (avx512f_vcvtsd2usiq): Ditto.
        (sse2_cvtsd2si): Ditto.
        (sse2_cvtsd2siq): Ditto.
        (<mask_codefor>avx512f_cvtpd2dq512<mask_name>): Ditto.
        (avx512f_ufix_notruncv8dfv8si<mask_name>): Ditto.
        (<mask_codefor>avx512f_cvtpd2ps512<mask_name>): Ditto.
        (avx512f_scalef<mode><mask_name>): Ditto.
        (<code><mode>3<mask_name>): Ditto.
        (*avx2_<code><mode>3<mask_name>): Ditto.
        (avx512er_exp2<mode><mask_name): Ditto.
        (<mask_codefor>avx512er_rcp28<mode><mask_name>): Ditto.
        (<mask_codefor>avx512er_rsqrt28<mode><mask_name>): Ditto.
        (avx512f_fmadd_<mode>_maskz): New.
        * config/i386/subst.md (SUBST_A): New.
        (round_name): Ditto.
        (round_mask_operand2): Ditto.
        (round_mask_operand3): Ditto.
        (round_mask_scalar_operand3): Ditto.
        (round_sd_mask_operand4): Ditto.
        (round_op2): Ditto.
        (round_op3): Ditto.
        (round_op4): Ditto.
        (round_op5): Ditto.
        (round_op6): Ditto.
        (round_mask_op2): Ditto.
        (round_mask_op3): Ditto.
        (round_mask_scalar_op3): Ditto.
        (round_sd_mask_op4): Ditto.
        (round_constraint): Ditto.
        (round_constraint2): Ditto.
        (round_constraint3): Ditto.
        (round_nimm_predicate): Ditto.
        (round_mode512bit_condition): Ditto.
        (round_modev4sf_condition): Ditto.
        (round_codefor): Ditto.
        (round_opnum): Ditto.
        (round): Ditto.


Co-Authored-By: Andrey Turetskiy <andrey.turetskiy@intel.com>
Co-Authored-By: Anna Tikhonova <anna.tikhonova@intel.com>
Co-Authored-By: Ilya Tocar <ilya.tocar@intel.com>
Co-Authored-By: Ilya Verbin <ilya.verbin@intel.com>
Co-Authored-By: Kirill Yukhin <kirill.yukhin@intel.com>
Co-Authored-By: Maxim Kuznetsov <maxim.kuznetsov@intel.com>
Co-Authored-By: Michael Zolotukhin <michael.v.zolotukhin@intel.com>
Co-Authored-By: Sergey Lega <sergey.s.lega@intel.com>

From-SVN: r206220

committed 11 years ago

06bc9e41 Browse Directory

26 Dec, 2013 4 commits

Don't check/change generic/i686 tuning · dd908cc5

gcc/

	PR target/59588
	* config/i386/i386.c (ix86_option_override_internal): Don't
	check generic tuning.  Don't change i686 tuning.

gcc/testsuite/

	PR target/59588
	* gcc.target/i386/pr59588-1.c: New file.
	* gcc.target/i386/pr59588-2.c: Likewise.

From-SVN: r206213

committed 11 years ago

dd908cc5 Browse Directory

Map "arch=corei7"/"arch=nehalem" to M_INTEL_COREI7 · 806ac507

After Intel processor name cleanup,

__attribute__ ((target("arch=corei7"))) is translated to PROCESSOR_NEHALEM
and mapped to M_INTEL_COREI7_NEHALEM.

__attribute__ ((target("arch=corei7")))

used to cover M_INTEL_COREI7_XXXX. Now it only covers M_INTEL_COREI7_NEHALEM.
We have PROCESSOR_SANDYBRIDGE and PROCESSOR_HASWELL.  But there is nothing
to mark Westmere and Ivy Bridge.  Since function versioning doesn't support
extra ISAs in Westmere and Ivy Bridge, we don't lose anything. The solution
is to map

__attribute__ ((target("arch=corei7")))

and

__attribute__ ((target("arch=nehalem")))

to M_INTEL_COREI7.

gcc/

	PR target/59601
	* config/i386/i386.c (get_builtin_code_for_version): Map
	PROCESSOR_NEHALEM to "corei7".

gcc/testsuite/

	PR target/59601
	* g++.dg/ext/mv14.C: New tests.
	* g++.dg/ext/mv15.C: Likewise.

From-SVN: r206212

committed 11 years ago

806ac507 Browse Directory

Change AMD cpu names · f4a4bdbb
```
From-SVN: r206210
```
Ganesh Gopalasubramanian committed 11 years ago
f4a4bdbb Browse Directory
driver-i386.c (decode_caches_intel): Add missing entries. · f313cce5
```
	* config/i386/driver-i386.c (decode_caches_intel): Add missing entries.

From-SVN: r206203
```
Uros Bizjak committed 11 years ago
f313cce5 Browse Directory

25 Dec, 2013 2 commits

Remove target_cpu_default/cpu_names · b97de419

Add processor names to processor_target_table and use it instead of
target_cpu_default and cpu_names.

	PR target/59587
	* config/i386/i386.c (struct ptt): Add a field for processor
	name.
	(processor_target_table): Sync with processor_type.  Add
	processor names.
	(cpu_names): Removed.
	(ix86_option_override_internal): Default x_ix86_tune_string
	to processor_target_table[TARGET_CPU_DEFAULT].name.
	(ix86_function_specific_print): Assert arch and tune <
	PROCESSOR_max.  Use processor_target_table to print arch and
	tune names.
	* config/i386/i386.h (TARGET_CPU_DEFAULT): Default to
	PROCESSOR_GENERIC.
	(target_cpu_default): Removed.
	(processor_type): Reordered.

From-SVN: r206202

committed 11 years ago

b97de419 Browse Directory

re PR target/59422 (Support more targets for function multi versioning) · 74924838

gcc/

2013-12-25  Allan Sandfeld Jensen  <sandfeld@kde.org>
	    H.J. Lu  <hongjiu.lu@intel.com>

	PR target/59422
	* config/i386/i386.c (get_builtin_code_for_version): Handle
	PROCESSOR_HASWELL, PROCESSOR_SILVERMONT, PROCESSOR_BTVER1,
	PROCESSOR_BTVER2, PROCESSOR_BDVER3 and PROCESSOR_BDVER4.
	Change priority of PROCESSOR_BDVER1 to P_PROC_XOP.
	(fold_builtin_cpu): Add "ivybridge", "haswell", "bonnell",
	"silvermont", "bobcat" and "jaguar" CPU names.  Add "sse4a",
	"fma4", "xop" and "fma" ISA names.

libgcc/

2013-12-25  Allan Sandfeld Jensen  <sandfeld@kde.org>
	    H.J. Lu  <hongjiu.lu@intel.com>

        PR target/59422
        * config/i386/cpuinfo.c (enum processor_types):  Add AMD_BOBCAT
	and AMD_JAGUAR.
	(enum processor_subtypes): Add AMDFAM15H_BDVER3, AMDFAM15H_BDVER4,
	INTEL_COREI7_IVYBRIDGE and INTEL_COREI7_HASWELL.
	(enum processor_features): Add  FEATURE_SSE4_A, FEATURE_FMA4,
	FEATURE_XOP and FEATURE_FMA.
	(get_amd_cpu): Handle AMD_BOBCAT, AMD_JAGUAR, AMDFAM15H_BDVER2 and
	AMDFAM15H_BDVER3.
	(get_intel_cpu): Handle INTEL_COREI7 and INTEL_COREI7_HASWELL.
        (get_available_features): Handle FEATURE_FMA, FEATURE_SSE4_A,
	FEATURE_FMA4 and FEATURE_XOP.

testsuite/

2013-12-25  Allan Sandfeld Jensen  <sandfeld@kde.org>

	PR target/59422
	* gcc.target/i386/funcspec-5.c (test_fma, test_xop, test_no_fma,
	test_no_xop, test_arch_corei7, test_arch_corei7_avx,
	test_arch_core_avx2, test_arch_bdver1, test_arch_bdver2,
	test_arch_bdver3, test_tune_corei7, test_tune_corei7_avx,
	test_tune_core_avx2, test_tune_bdver1, test_tune_bdver2 and
	test_tune_bdver3): New function prototypes.

From-SVN: r206200

committed 11 years ago

74924838 Browse Directory

24 Dec, 2013 2 commits

Check opts->x_ix86_arch_string · 50a1f111

	* config/i386/i386.c (ix86_option_override_internal): Check
	opts->x_ix86_arch_string instead of ix86_arch_string.

From-SVN: r206196

committed 11 years ago

50a1f111 Browse Directory

arm-protos.h (vfp_const_double_for_bits): Declare. · c75d51aa

gcc/

2013-12-24  Renlin Li  <Renlin.Li@arm.com>

	* config/arm/arm-protos.h (vfp_const_double_for_bits): Declare.
	* config/arm/constraints.md (Dp): Define new constraint.
	* config/arm/predicates.md (const_double_vcvt_power_of_two): Define
	new predicate.
	* config/arm/arm.c (arm_print_operand): Add print for new fucntion.
	(vfp3_const_double_for_bits): New function.
	* config/arm/vfp.md (combine_vcvtf2i): Define new instruction.

gcc/testsuite/

2013-12-24  Renlin Li  <Renlin.Li@arm.com>

	* gcc.target/arm/fixed_float_conversion.c: New test case.

From-SVN: r206195

committed 11 years ago

c75d51aa Browse Directory

23 Dec, 2013 9 commits

re PR target/59203 (config/cris/cris.c:2491: possible typo ?) · c09c8f70

	PR target/59203
	* config/cris/cris.c (cris_pic_symbol_type_of): Fix typo,
	checking t1 twice instead of t1 and t2 respectively.

From-SVN: r206188

committed 11 years ago

c09c8f70 Browse Directory

re PR middle-end/59584 (regressions related to __builtin_stack_restore) · a13a866e

	PR middle-end/59584
	* config/cris/predicates.md (cris_nonsp_register_operand):
	New define_predicate.
	* config/cris/cris.md: Replace register_operand with
	cris_nonsp_register_operand for destinations in all
	define_splits where a register is set more than once.

From-SVN: r206187

committed 11 years ago

a13a866e Browse Directory

* gdbinit.in (input_line, input_filename): Define. · 2a0da5ad
```
From-SVN: r206183
```
Jason Merrill committed 11 years ago
2a0da5ad Browse Directory

re PR c++/41090 (Using static label reference in c++ class constructor produces wrong code) · 1f26ac87

	PR c++/41090
	Add -fdeclone-ctor-dtor.
gcc/cp/
	* optimize.c (can_alias_cdtor, populate_clone_array): Split out
	from maybe_clone_body.
	(maybe_thunk_body): New function.
	(maybe_clone_body): Call it.
	* mangle.c (write_mangled_name): Remove code to suppress
	writing of mangled name for cloned constructor or destructor.
	(write_special_name_constructor): Handle decloned constructor.
	(write_special_name_destructor): Handle decloned destructor.
	* method.c (trivial_fn_p): Handle decloning.
	* semantics.c (expand_or_defer_fn_1): Clone after setting linkage.
gcc/c-family/
	* c.opt: Add -fdeclone-ctor-dtor.
	* c-opts.c (c_common_post_options): Default to on iff -Os.
gcc/
	* cgraph.h (struct cgraph_node): Add calls_comdat_local.
	(symtab_comdat_local_p, symtab_in_same_comdat_p): New.
	* cif-code.def: Add USES_COMDAT_LOCAL.
	* symtab.c (verify_symtab_base): Make sure we don't refer to a
	comdat-local symbol from outside its comdat.
	* cgraph.c (verify_cgraph_node): Likewise.
	* cgraphunit.c (mark_functions_to_output): Don't mark comdat-locals.
	* ipa.c (symtab_remove_unreachable_nodes): Likewise.
	(function_and_variable_visibility): Handle comdat-local fns.
	* ipa-cp.c (determine_versionability): Don't clone comdat-locals.
	* ipa-inline-analysis.c (compute_inline_parameters): Update
	calls_comdat_local.
	* ipa-inline-transform.c (inline_call): Likewise.
	(save_inline_function_body): Don't clear DECL_COMDAT_GROUP.
	* ipa-inline.c (can_inline_edge_p): Check calls_comdat_local.
	* lto-cgraph.c (input_overwrite_node): Read calls_comdat_local.
	(lto_output_node): Write it.
	* symtab.c (symtab_dissolve_same_comdat_group_list): Clear
	DECL_COMDAT_GROUP for comdat-locals.
include/
	* demangle.h (enum gnu_v3_ctor_kinds):
	Added literal gnu_v3_unified_ctor.
	(enum gnu_v3_ctor_kinds):
	Added literal gnu_v3_unified_dtor.
libiberty/
	* cp-demangle.c (cplus_demangle_fill_ctor,cplus_demangle_fill_dtor):
	Handle unified ctor/dtor.
	(d_ctor_dtor_name): Handle unified ctor/dtor.

From-SVN: r206182

committed 11 years ago

1f26ac87 Browse Directory

Move Bonnell and Silvermont entries before generic · 7c2539fc

	* config/i386/i386.c (processor_target_table): Move Bonnell and
	Silvermont entries before generic.

From-SVN: r206180

committed 11 years ago

7c2539fc Browse Directory

re PR middle-end/59569 (r206148 causes internal compiler error: in… · f234d260

re PR middle-end/59569 (r206148 causes internal compiler error: in vect_create_destination_var, at tree-vect-data-refs.c:4294)

2013-12-23  Bingfeng Mei  <bmei@broadcom.com>

	PR middle-end/59569
	* tree-vect-stmts.c (vectorizable_store): Skip permutation for
	consant operand, and add a few missing \n.

	* gcc.c-torture/compile/pr59569-1.c: New test.
	* gcc.c-torture/compile/pr59569-2.c: Ditto.

From-SVN: r206179

committed 11 years ago

f234d260 Browse Directory

Use proper Intel processor names for -march=/-mtune= · d3c11974

gcc/

	* config/i386/core2.md: Replace corei7 with nehalem.

	* config/i386/driver-i386.c (host_detect_local_cpu): Use nehalem,
	westmere, sandybridge, ivybridge, haswell, bonnell, silvermont
	for cpu names.

	* config/i386/i386-c.c (ix86_target_macros_internal): Replace
	PROCESSOR_COREI7, PROCESSOR_COREI7_AVX, PROCESSOR_ATOM,
	PROCESSOR_SLM with PROCESSOR_NEHALEM, PROCESSOR_SANDYBRIDGE,
	PROCESSOR_BONNELL, PROCESSOR_SILVERMONT.  Define
	__nehalem/__nehalem__, __sandybridge/__sandybridge__,
	__haswell/__haswell__, __tune_nehalem__, __tune_sandybridge__,
	__tune_haswell__, __bonnell/__bonnell__,
	__silvermont/__silvermont__, __tune_bonnell__,
	__tune_silvermont__.

	* config/i386/i386.c (m_COREI7): Renamed to ...
	(m_NEHALEM): This.
	(m_COREI7_AVX): Renamed to ...
	(m_SANDYBRIDGE): This.
	(m_ATOM): Renamed to ...
	(m_BONNELL): This.
	(m_SLM): Renamed to ...
	(m_SILVERMONT): This.
	(m_CORE_ALL): Updated.
	(cpu_names): Add "nehalem", "westmere", "sandybridge",
	"ivybridge", "haswell", "broadwell", "bonnell", "silvermont".
	(PTA_CORE2): New.
	(PTA_NEHALEM): Likewise.
	(PTA_WESTMERE): Likewise.
	(PTA_SANDYBRIDGE): Likewise.
	(PTA_IVYBRIDGE): Likewise.
	(PTA_HASWELL): Likewise.
	(PTA_BROADWELL): Likewise.
	(PTA_BONNELL): Likewise.
	(PTA_SILVERMONT): Likewise.
	(ix86_option_override_internal): Use new PTA_XXX.  Add nehalem,
	westmere, sandybridge, ivybridge, haswell, bonnell, silvermont.
	(ix86_lea_outperforms): Updated.
	(ix86_issue_rate): Likewise.
	(ix86_adjust_cost): Likewise.
	(ia32_multipass_dfa_lookahead): Likewise.
	(do_reorder_for_imul): Likewise.
	(swap_top_of_ready_list): Likewise.
	(ix86_sched_reorder): Likewise.
	(ix86_sched_init_global): Likewise.
	(get_builtin_code_for_version): Likewise.
	(processor_model): Replace M_INTEL_ATOM, M_INTEL_SLM with
	M_INTEL_BONNELL, M_INTEL_SILVERMONT.
	(arch_names_table): Updated.

	* config/i386/i386.h (TARGET_COREI7): Removed.
	(TARGET_COREI7_AVX): Likewise.
	(TARGET_ATOM): Likewise.
	(TARGET_SLM): Likewise.
	(TARGET_NEHALEM): New.
	(TARGET_SANDYBRIDGE): Likewise.
	(TARGET_BONNELL): Likewise.
	(TARGET_SILVERMONT): Likewise.
	(target_cpu_default): Add TARGET_CPU_DEFAULT_core_avx2,
	TARGET_CPU_DEFAULT_nehalem, TARGET_CPU_DEFAULT_westmere,
	TARGET_CPU_DEFAULT_sandybridge, TARGET_CPU_DEFAULT_ivybridge,
	TARGET_CPU_DEFAULT_broadwell, TARGET_CPU_DEFAULT_bonnell,
	TARGET_CPU_DEFAULT_silvermont.  Move TARGET_CPU_DEFAULT_haswell
	before TARGET_CPU_DEFAULT_broadwell.
	(processor_type): Replace PROCESSOR_COREI7, PROCESSOR_COREI7_AVX,
	PROCESSOR_ATOM, PROCESSOR_SLM with PROCESSOR_NEHALEM,
	PROCESSOR_SANDYBRIDGE, PROCESSOR_BONNELL, PROCESSOR_SILVERMONT.

	* config/i386/i386.md (cpu): Replace corei7 with nehalem.

	* config/i386/x86-tune.def: Updated.

	* doc/invoke.texi: Replace corei7, corei7-avx, core-avx-i,
	core-avx2, atom, slm with nehalem, sandybridge, ivybridge,
	haswell, bonnel, silvermont.  Add westmere.

libgcc/

	* config/i386/cpuinfo.c (processor_subtypes): Replace INTEL_ATOM,
	INTEL_SLM with INTEL_BONNELL, INTEL_SILVERMONT.
	(get_intel_cpu): Updated.

Co-Authored-By: Tocar Ilya <ilya.tocar@intel.com>

From-SVN: r206178

committed 11 years ago

d3c11974 Browse Directory

re PR rtl-optimization/57422 (ICE: SIGSEGV in dominated_by_p with custom flags) · c64476f1

        PR rtl-optimization/57422
        * sel-sched.c (fill_vec_av_set): Assert that the fence insn
        can always be scheduled in its current form.

From-SVN: r206174

committed 11 years ago

c64476f1 Browse Directory

re PR rtl-optimization/57422 (ICE: SIGSEGV in dominated_by_p with custom flags) · d0381b37

        PR rtl-optimization/57422
        * sel-sched.c (mark_unavailable_hard_regs): Fix typo when calling
        add_to_hard_reg_set.

From-SVN: r206173

committed 11 years ago

d0381b37 Browse Directory

21 Dec, 2013 1 commit

Makefile.in: Add optinfo.texi. · b1055be0

2013-12-20  Sharad Singhai  <singhai@google.com>

	* Makefile.in: Add optinfo.texi.
	* doc/invoke.texi: Fix typo.
	* doc/optinfo.texi: New documentation for optimization info.
	* doc/passes.texi: Add new node.

From-SVN: r206161

committed 11 years ago

b1055be0 Browse Directory