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riscv-gcc-1
Commit 8a6ef760 by Alexander Ivchenko Committed by Kirill Yukhin
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sse.md (<code><mode>3<mask_name>): Extend to support EVEX's SAE mode. 

        * config/i386/sse.md (<code><mode>3<mask_name>): Extend to support
        EVEX's SAE mode.
        (*<code><mode>3_finite<mask_name>): Ditto.
        (*<code><mode>3<mask_name>): Ditto.
        (avx512f_cmp<mode>3<mask_scalar_merge_name>): Ditto.
        (avx512f_vmcmp<mode>3): Ditto.
        (avx512f_vmcmp<mode>3_mask): Ditto.
        (<sse>_comi): Ditto.
        (<sse>_ucomi): Ditto.
        (sse_cvttss2si): Ditto.
        (sse_cvttss2siq): Ditto.
        (<fixsuffix>fix_truncv16sfv16si2<mask_name>): Ditto.
        (avx512f_vcvttss2usi): Ditto.
        (avx512f_vcvttss2usiq): Ditto.
        (avx512f_vcvttsd2usi): Ditto.
        (avx512f_vcvttsd2usiq): Ditto.
        (sse2_cvttsd2si): Ditto.
        (sse2_cvttsd2siq): Ditto.
        (<fixsuffix>fix_truncv8dfv8si2<mask_name>): Ditto.
        (<sse2_avx_avx512f>_cvtps2pd<avxsizesuffix><mask_name>): Ditto.
        (avx512f_getexp<mode><mask_name>): Ditto.
        (avx512f_fixupimm<mode><sd_maskz_name>): Ditto.
        (avx512f_fixupimm<mode>_mask): Ditto.
        (avx512f_sfixupimm<mode><sd_maskz_name>): Ditto.
        (avx512f_sfixupimm<mode>_mask): Ditto.
        (avx512f_rndscale<mode><mask_name>): Ditto.
        (<mask_codefor>avx512f_vcvtph2ps512<mask_name>): Ditto.
        (avx512f_getmant<mode><mask_name>): Ditto.
        * config/i386/subst.md (round_saeonly_name): New.
        (round_saeonly_mask_operand2): Ditto.
        (round_saeonly_mask_operand3): Ditto.
        (round_saeonly_mask_scalar_operand3): Ditto.
        (round_saeonly_mask_scalar_operand4): Ditto.
        (round_saeonly_mask_scalar_merge_operand4): Ditto.
        (round_saeonly_sd_mask_operand5): Ditto.
        (round_saeonly_op2): Ditto.
        (round_saeonly_op4): Ditto.
        (round_saeonly_op5): Ditto.
        (round_saeonly_op6): Ditto.
        (round_saeonly_mask_op2): Ditto.
        (round_saeonly_mask_op3): Ditto.
        (round_saeonly_mask_scalar_op3): Ditto.
        (round_saeonly_mask_scalar_op4): Ditto.
        (round_saeonly_mask_scalar_merge_op4): Ditto.
        (round_saeonly_sd_mask_op5): Ditto.
        (round_saeonly_constraint): Ditto.
        (round_saeonly_constraint2): Ditto.
        (round_saeonly_nimm_predicate): Ditto.
        (round_saeonly_mode512bit_condition): Ditto.
        (round_saeonly): Ditto.


Co-Authored-By: Andrey Turetskiy <andrey.turetskiy@intel.com>
Co-Authored-By: Anna Tikhonova <anna.tikhonova@intel.com>
Co-Authored-By: Ilya Tocar <ilya.tocar@intel.com>
Co-Authored-By: Ilya Verbin <ilya.verbin@intel.com>
Co-Authored-By: Kirill Yukhin <kirill.yukhin@intel.com>
Co-Authored-By: Maxim Kuznetsov <maxim.kuznetsov@intel.com>
Co-Authored-By: Michael Zolotukhin <michael.v.zolotukhin@intel.com>
Co-Authored-By: Sergey Lega <sergey.s.lega@intel.com>

From-SVN: r206221
parent 06bc9e41
Showing with 92 additions and 0 deletions
gcc/ChangeLog
......@@ -8,6 +8,67 @@
Kirill Yukhin <kirill.yukhin@intel.com>
Michael Zolotukhin <michael.v.zolotukhin@intel.com>
* config/i386/sse.md (<code><mode>3<mask_name>): Extend to support
EVEX's SAE mode.
(*<code><mode>3_finite<mask_name>): Ditto.
(*<code><mode>3<mask_name>): Ditto.
(avx512f_cmp<mode>3<mask_scalar_merge_name>): Ditto.
(avx512f_vmcmp<mode>3): Ditto.
(avx512f_vmcmp<mode>3_mask): Ditto.
(<sse>_comi): Ditto.
(<sse>_ucomi): Ditto.
(sse_cvttss2si): Ditto.
(sse_cvttss2siq): Ditto.
(<fixsuffix>fix_truncv16sfv16si2<mask_name>): Ditto.
(avx512f_vcvttss2usi): Ditto.
(avx512f_vcvttss2usiq): Ditto.
(avx512f_vcvttsd2usi): Ditto.
(avx512f_vcvttsd2usiq): Ditto.
(sse2_cvttsd2si): Ditto.
(sse2_cvttsd2siq): Ditto.
(<fixsuffix>fix_truncv8dfv8si2<mask_name>): Ditto.
(<sse2_avx_avx512f>_cvtps2pd<avxsizesuffix><mask_name>): Ditto.
(avx512f_getexp<mode><mask_name>): Ditto.
(avx512f_fixupimm<mode><sd_maskz_name>): Ditto.
(avx512f_fixupimm<mode>_mask): Ditto.
(avx512f_sfixupimm<mode><sd_maskz_name>): Ditto.
(avx512f_sfixupimm<mode>_mask): Ditto.
(avx512f_rndscale<mode><mask_name>): Ditto.
(<mask_codefor>avx512f_vcvtph2ps512<mask_name>): Ditto.
(avx512f_getmant<mode><mask_name>): Ditto.
* config/i386/subst.md (round_saeonly_name): New.
(round_saeonly_mask_operand2): Ditto.
(round_saeonly_mask_operand3): Ditto.
(round_saeonly_mask_scalar_operand3): Ditto.
(round_saeonly_mask_scalar_operand4): Ditto.
(round_saeonly_mask_scalar_merge_operand4): Ditto.
(round_saeonly_sd_mask_operand5): Ditto.
(round_saeonly_op2): Ditto.
(round_saeonly_op4): Ditto.
(round_saeonly_op5): Ditto.
(round_saeonly_op6): Ditto.
(round_saeonly_mask_op2): Ditto.
(round_saeonly_mask_op3): Ditto.
(round_saeonly_mask_scalar_op3): Ditto.
(round_saeonly_mask_scalar_op4): Ditto.
(round_saeonly_mask_scalar_merge_op4): Ditto.
(round_saeonly_sd_mask_op5): Ditto.
(round_saeonly_constraint): Ditto.
(round_saeonly_constraint2): Ditto.
(round_saeonly_nimm_predicate): Ditto.
(round_saeonly_mode512bit_condition): Ditto.
(round_saeonly): Ditto.
2013-12-27 Alexander Ivchenko <alexander.ivchenko@intel.com>
Maxim Kuznetsov <maxim.kuznetsov@intel.com>
Sergey Lega <sergey.s.lega@intel.com>
Anna Tikhonova <anna.tikhonova@intel.com>
Ilya Tocar <ilya.tocar@intel.com>
Andrey Turetskiy <andrey.turetskiy@intel.com>
Ilya Verbin <ilya.verbin@intel.com>
Kirill Yukhin <kirill.yukhin@intel.com>
Michael Zolotukhin <michael.v.zolotukhin@intel.com>
* config/i386/i386.c (ix86_print_operand): Print EVEX's RC modifiers.
* config/i386/i386.md (define_constants): Define EVEx's RC constants.
* gcc/config/i386/sse.md (<plusminus_insn><mode>3<mask_name>): Extend
gcc/config/i386/subst.md
......@@ -129,3 +129,34 @@
(set (match_dup 0)
(match_dup 1))
(unspec [(match_operand:SI 2 "const_0_to_4_operand")] UNSPEC_EMBEDDED_ROUNDING)])])
(define_subst_attr "round_saeonly_name" "round_saeonly" "" "_round")
(define_subst_attr "round_saeonly_mask_operand2" "mask" "%R2" "%R4")
(define_subst_attr "round_saeonly_mask_operand3" "mask" "%R3" "%R5")
(define_subst_attr "round_saeonly_mask_scalar_operand3" "mask_scalar" "%R3" "%R5")
(define_subst_attr "round_saeonly_mask_scalar_operand4" "mask_scalar" "%R4" "%R6")
(define_subst_attr "round_saeonly_mask_scalar_merge_operand4" "mask_scalar_merge" "%R4" "%R5")
(define_subst_attr "round_saeonly_sd_mask_operand5" "sd" "%R5" "%R7")
(define_subst_attr "round_saeonly_op2" "round_saeonly" "" "%R2")
(define_subst_attr "round_saeonly_op4" "round_saeonly" "" "%R4")
(define_subst_attr "round_saeonly_op5" "round_saeonly" "" "%R5")
(define_subst_attr "round_saeonly_op6" "round_saeonly" "" "%R6")
(define_subst_attr "round_saeonly_mask_op2" "round_saeonly" "" "<round_saeonly_mask_operand2>")
(define_subst_attr "round_saeonly_mask_op3" "round_saeonly" "" "<round_saeonly_mask_operand3>")
(define_subst_attr "round_saeonly_mask_scalar_op3" "round_saeonly" "" "<round_saeonly_mask_scalar_operand3>")
(define_subst_attr "round_saeonly_mask_scalar_op4" "round_saeonly" "" "<round_saeonly_mask_scalar_operand4>")
(define_subst_attr "round_saeonly_mask_scalar_merge_op4" "round_saeonly" "" "<round_saeonly_mask_scalar_merge_operand4>")
(define_subst_attr "round_saeonly_sd_mask_op5" "round_saeonly" "" "<round_saeonly_sd_mask_operand5>")
(define_subst_attr "round_saeonly_constraint" "round_saeonly" "vm" "v")
(define_subst_attr "round_saeonly_constraint2" "round_saeonly" "m" "v")
(define_subst_attr "round_saeonly_nimm_predicate" "round_saeonly" "nonimmediate_operand" "register_operand")
(define_subst_attr "round_saeonly_mode512bit_condition" "round_saeonly" "1" "(<MODE>mode == V16SFmode || <MODE>mode == V8DFmode)")
(define_subst "round_saeonly"
[(set (match_operand:SUBST_A 0)
(match_operand:SUBST_A 1))]
"TARGET_AVX512F"
[(parallel[
(set (match_dup 0)
(match_dup 1))
(unspec [(match_operand:SI 2 "const_4_to_5_operand")] UNSPEC_EMBEDDED_ROUNDING)])])
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