Commit 4de67111 by Alexander Ivchenko Committed by Kirill Yukhin

sse.md (avx512f_fixupimm<mode>_maskz): Extend to support EVEX's RC.

        * config/i386/sse.md (avx512f_fixupimm<mode>_maskz): Extend to support
        EVEX's RC.
        (avx512f_sfixupimm<mode>_maskz): Ditto.
        * config/i386/subst.md (round_saeonly_expand_name): New.
        (round_saeonly_expand_nimm_predicate): Ditto.
        (round_saeonly_expand_operand6): Ditto.
        (round_saeonly_expand): Ditto.


Co-Authored-By: Andrey Turetskiy <andrey.turetskiy@intel.com>
Co-Authored-By: Anna Tikhonova <anna.tikhonova@intel.com>
Co-Authored-By: Ilya Tocar <ilya.tocar@intel.com>
Co-Authored-By: Ilya Verbin <ilya.verbin@intel.com>
Co-Authored-By: Kirill Yukhin <kirill.yukhin@intel.com>
Co-Authored-By: Maxim Kuznetsov <maxim.kuznetsov@intel.com>
Co-Authored-By: Michael Zolotukhin <michael.v.zolotukhin@intel.com>
Co-Authored-By: Sergey Lega <sergey.s.lega@intel.com>

From-SVN: r206223
parent 7cf78561
...@@ -8,6 +8,24 @@ ...@@ -8,6 +8,24 @@
Kirill Yukhin <kirill.yukhin@intel.com> Kirill Yukhin <kirill.yukhin@intel.com>
Michael Zolotukhin <michael.v.zolotukhin@intel.com> Michael Zolotukhin <michael.v.zolotukhin@intel.com>
* config/i386/sse.md (avx512f_fixupimm<mode>_maskz): Extend to support
EVEX's RC.
(avx512f_sfixupimm<mode>_maskz): Ditto.
* config/i386/subst.md (round_saeonly_expand_name): New.
(round_saeonly_expand_nimm_predicate): Ditto.
(round_saeonly_expand_operand6): Ditto.
(round_saeonly_expand): Ditto.
2013-12-27 Alexander Ivchenko <alexander.ivchenko@intel.com>
Maxim Kuznetsov <maxim.kuznetsov@intel.com>
Sergey Lega <sergey.s.lega@intel.com>
Anna Tikhonova <anna.tikhonova@intel.com>
Ilya Tocar <ilya.tocar@intel.com>
Andrey Turetskiy <andrey.turetskiy@intel.com>
Ilya Verbin <ilya.verbin@intel.com>
Kirill Yukhin <kirill.yukhin@intel.com>
Michael Zolotukhin <michael.v.zolotukhin@intel.com>
* config/i386/sse.md (avx512f_fmadd_<mode>_maskz): Extend to support * config/i386/sse.md (avx512f_fmadd_<mode>_maskz): Extend to support
EVEX's RC. EVEX's RC.
(avx512f_fmaddsub_<mode>_maskz): Ditto. (avx512f_fmaddsub_<mode>_maskz): Ditto.
...@@ -6626,18 +6626,19 @@ ...@@ -6626,18 +6626,19 @@
}) })
(define_expand "avx512f_fixupimm<mode>_maskz" (define_expand "avx512f_fixupimm<mode>_maskz<round_saeonly_expand_name>"
[(match_operand:VF_512 0 "register_operand") [(match_operand:VF_512 0 "register_operand")
(match_operand:VF_512 1 "register_operand") (match_operand:VF_512 1 "register_operand")
(match_operand:VF_512 2 "register_operand") (match_operand:VF_512 2 "register_operand")
(match_operand:<sseintvecmode> 3 "nonimmediate_operand") (match_operand:<sseintvecmode> 3 "<round_saeonly_expand_nimm_predicate>")
(match_operand:SI 4 "const_0_to_255_operand") (match_operand:SI 4 "const_0_to_255_operand")
(match_operand:<avx512fmaskmode> 5 "register_operand")] (match_operand:<avx512fmaskmode> 5 "register_operand")]
"TARGET_AVX512F" "TARGET_AVX512F"
{ {
emit_insn (gen_avx512f_fixupimm<mode>_maskz_1 ( emit_insn (gen_avx512f_fixupimm<mode>_maskz_1<round_saeonly_expand_name> (
operands[0], operands[1], operands[2], operands[3], operands[0], operands[1], operands[2], operands[3],
operands[4], CONST0_RTX (<MODE>mode), operands[5])); operands[4], CONST0_RTX (<MODE>mode), operands[5]
<round_saeonly_expand_operand6>));
DONE; DONE;
}) })
...@@ -6670,18 +6671,19 @@ ...@@ -6670,18 +6671,19 @@
[(set_attr "prefix" "evex") [(set_attr "prefix" "evex")
(set_attr "mode" "<MODE>")]) (set_attr "mode" "<MODE>")])
(define_expand "avx512f_sfixupimm<mode>_maskz" (define_expand "avx512f_sfixupimm<mode>_maskz<round_saeonly_expand_name>"
[(match_operand:VF_128 0 "register_operand") [(match_operand:VF_128 0 "register_operand")
(match_operand:VF_128 1 "register_operand") (match_operand:VF_128 1 "register_operand")
(match_operand:VF_128 2 "register_operand") (match_operand:VF_128 2 "register_operand")
(match_operand:<sseintvecmode> 3 "nonimmediate_operand") (match_operand:<sseintvecmode> 3 "<round_saeonly_expand_nimm_predicate>")
(match_operand:SI 4 "const_0_to_255_operand") (match_operand:SI 4 "const_0_to_255_operand")
(match_operand:<avx512fmaskmode> 5 "register_operand")] (match_operand:<avx512fmaskmode> 5 "register_operand")]
"TARGET_AVX512F" "TARGET_AVX512F"
{ {
emit_insn (gen_avx512f_sfixupimm<mode>_maskz_1 ( emit_insn (gen_avx512f_sfixupimm<mode>_maskz_1<round_saeonly_expand_name> (
operands[0], operands[1], operands[2], operands[3], operands[0], operands[1], operands[2], operands[3],
operands[4], CONST0_RTX (<MODE>mode), operands[5])); operands[4], CONST0_RTX (<MODE>mode), operands[5]
<round_saeonly_expand_operand6>));
DONE; DONE;
}) })
......
...@@ -178,3 +178,23 @@ ...@@ -178,3 +178,23 @@
(match_dup 3) (match_dup 3)
(match_dup 4) (match_dup 4)
(unspec [(match_operand:SI 5 "const_0_to_4_operand")] UNSPEC_EMBEDDED_ROUNDING)]) (unspec [(match_operand:SI 5 "const_0_to_4_operand")] UNSPEC_EMBEDDED_ROUNDING)])
(define_subst_attr "round_saeonly_expand_name" "round_saeonly_expand" "" "_round")
(define_subst_attr "round_saeonly_expand_nimm_predicate" "round_saeonly_expand" "nonimmediate_operand" "register_operand")
(define_subst_attr "round_saeonly_expand_operand6" "round_saeonly_expand" "" ", operands[6]")
(define_subst "round_saeonly_expand"
[(match_operand:SUBST_V 0)
(match_operand:SUBST_V 1)
(match_operand:SUBST_V 2)
(match_operand:SUBST_A 3)
(match_operand:SI 4)
(match_operand:SUBST_S 5)]
"TARGET_AVX512F"
[(match_dup 0)
(match_dup 1)
(match_dup 2)
(match_dup 3)
(match_dup 4)
(match_dup 5)
(unspec [(match_operand:SI 6 "const_4_to_5_operand")] UNSPEC_EMBEDDED_ROUNDING)])
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