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  1. 06 Jan, 2017 1 commit
    • [ARM] Implement support for ACLE Coprocessor CDP intrinsics · d57daa0c 
      gcc/ChangeLog:
2017-01-06  Andre Vieira  <andre.simoesdiasvieira@arm.com>

	* config/arm/arm.md (<cdp>): New.
	* config/arm/arm.c (neon_const_bounds): Rename this ...
	(arm_const_bounds): ... this.
	(arm_coproc_builtin_available): New.
	* config/arm/arm-builtins.c (SIMD_MAX_BUILTIN_ARGS): Increase.
	(arm_type_qualifiers): Add 'qualifier_unsigned_immediate'.
	(CDP_QUALIFIERS): Define to...
	(arm_cdp_qualifiers): ... this. New.
	(void_UP): Define.
	(arm_expand_builtin_args): Add case for 6 arguments.
	* config/arm/arm-protos.h (neon_const_bounds): Rename this ...
	(arm_const_bounds): ... this.
	(arm_coproc_builtin_available): New.
	* config/arm/arm_acle.h (__arm_cdp): New.
	(__arm_cdp2): New.
	* config/arm/arm_acle_builtins.def (cdp): New.
	(cdp2): New.
	* config/arm/iterators.md (CDPI,CDP,cdp): New.
	* config/arm/neon.md: Rename all 'neon_const_bounds' to
	'arm_const_bounds'.
	* config/arm/types.md (coproc): New.
	* config/arm/unspecs.md (VUNSPEC_CDP, VUNSPEC_CDP2): New.
	* gcc/doc/extend.texi (ACLE): Add a mention of Coprocessor intrinsics.
	* gcc/doc/sourcebuild.texi (arm_coproc1_ok, arm_coproc2_ok,
	arm_coproc3_ok, arm_coproc4_ok): Document new effective targets.

gcc/testsuite/ChangeLog:
2017-01-06  Andre Vieira  <andre.simoesdiasvieira@arm.com>

	* gcc.target/arm/acle/acle.exp: Run tests for different options
	and make sure fat-lto-objects is used such that we can still do
	assemble scans.
	* gcc.target/arm/acle/cdp.c: New.
	* gcc.target/arm/acle/cdp2.c: New.
	* lib/target-supports.exp (check_effective_target_arm_coproc1_ok): New.
	(check_effective_target_arm_coproc1_ok_nocache): New.
	(check_effective_target_arm_coproc2_ok): New.
	(check_effective_target_arm_coproc2_ok_nocache): New.
	(check_effective_target_arm_coproc3_ok): New.
	(check_effective_target_arm_coproc3_ok_nocache): New.
	(check_effective_target_arm_coproc4_ok): New.
	(check_effective_target_arm_coproc4_ok_nocache): New.

From-SVN: r244172
      Andre Vieira committed
  3. 01 Jan, 2017 1 commit
  5. 23 Nov, 2016 1 commit
    • [Patch 16/17 libgcc ARM] Half to double precision conversions · 5e0f10a0 
      gcc/

	* config/arm/arm.c (arm_convert_to_type): Delete.
	(TARGET_CONVERT_TO_TYPE): Delete.
	(arm_init_libfuncs): Enable trunc_optab from DFmode to HFmode.
	(arm_libcall_uses_aapcs_base): Add trunc_optab from DF- to HFmode.
	* config/arm/arm.h (TARGET_FP16_TO_DOUBLE): New.
	* config/arm/arm.md (truncdfhf2): Only convert through SFmode if we
	are in fast math mode, and have no single step hardware instruction.
	(extendhfdf2): Only expand through SFmode if we don't have a
	single-step hardware instruction.
	* config/arm/vfp.md (*truncdfhf2): New.
	(extendhfdf2): Likewise.

gcc/testsuite/

	* gcc.target/arm/fp16-rounding-alt-1.c (ROUNDED): Change expected
	result.
	* gcc.target/arm/fp16-rounding-ieee-1.c (ROUNDED): Change expected
	result.

From-SVN: r242783
      James Greenhalgh committed
  7. 22 Nov, 2016 1 commit
  9. 10 Nov, 2016 1 commit
    • [ARM] Remove duplicated enum type for CPU identifiers · b854516c 
      	* arm.h (target_cpus): Delete.
	* arm-opts.h (enum processor_type): Prefix entires with TARGET_CPU_.
	* arm.c (all_cores): Prefix IDENT with TARGET_CPU_.
	(all_architectures): Likewise.
	(arm_option_override): Adjust use of CPU enums.
	(arm_sched_reorder): Likewise.
	* vfp.md (movdi_vfp, movdi_vfp_cortexa8): Likewise.
	* arm.opt (mcpu, mtune): Adjust use of CPU enums.
	* arm/genopt.sh (processor_type): Prefix enumeration entries with
	TARGET_CPU_.
	* arm-tables.opt: Regenerated.

From-SVN: r242034
      Richard Earnshaw committed
  11. 13 Oct, 2016 1 commit
    • [ARM] Remove redundant TARGET_VFP · 00ea1506 
      	* arm.h (TARGET_VFP): Delete.
	(TARGET_VFPD32): Remove references to TARGET_VFP.
	(TARGET_VFP3, TARGET_VFP5): Likewise.
	(TARGET_VFP_SINGLE, TARGET_VFP_DOUBLE): Likewise.
	(TARGET_NEON_FP16): Likewise.
	(TARGET_FMA): Likewise.
	(TARGET_CRYPTO): Likewise.
	(TARGET_NEON): Likewise.
	(SECONDARY_OUTPUT_RELOAD_CLASS): Likewise.
	(FUNCTION_ARG_REGNO_P): Likewise.
	* arm.c (arm_option_check_internal): Likewise.
	(arm_option_override): Likewise.
	(use_return_insn): Likewise.
	(arm_function_value_regno_p): Likewise.
	(arm_apply_result_size): Likewise.
	(use_vfp_abi): Likewise.
	(arm_legitimate_address_outer_p): Likewise.
	(thumb2_legitimate_address_p): Likewise.
	(arm_legitimate_index_p): Likewise.
	(thumb2_legitimate_index_p): Likewise.
	(arm_legitimate_address): Likewise.
	(arm_get_vfp_saved_size): Likewise.
	(arm_emit_vfp_multi_reg_pop): Likewise.
	(arm_get_frame_offsets): Likewise.
	(arm_save_coproc_regs): Likewise.
	(arm_hard_regno_mode_ok): Likewise.
	(arm_expand_epilogue_apcs_frame): Likewise.
	(arm_expand_epilogue): Likewise.
	(arm_file_start): Likewise.
	(arm_conditional_register_usage): Likewise.
	(arm_validize_comparison): Use vfp_compare_operand directly.
	* arm-builtins.c (arm_init_builtins): Remove references to TARGET_VFP.
	(arm_expand_vfp_builtin): Use TARGET_HARD_FLOAT for detecting
	unsupported usage.
	(arm_atomic_assign_expand_fenv): Likewise.
	* arm.md (divsf3): Likewise.
	(arm_negsi2): Likewise.
	(absdf2): Likewise.
	(arm_movdi): Likewise.
	(arm_movt): Likewise.
	(cbranchsf4): Change predicate to vfp_compare_operand.
	(cbranchdf4): Change predicate to vfp_compare_operand.
	(cstorehf4): Change predicate to vfp_compare_operand.
	(cstoresf4): Change predicate to vfp_compare_operand.
	(cstoredf4): Change predicate to vfp_compare_operand.
	(vfp_pop_multiple_with_writeback): Remove references to TARGET_VFP.
	(movhi_insn_arch4, movhi_bytes): Likewise.
	* constraints.md (Dt): Likewise.
	(Dp): Likewise.
	* iterators.md (SDF): Likewise.
	* predicates.md (arm_float_compare_operand): Delete.
	(const_double_vcvt_power_of_two_reciprocal): Remove references to
	TARGET_VFP.
	(const_double_vcvt_power_of_two): Likewise.
	* thumb2.md thumb2_movsi_insn): Likewise.
	* vfp.md (arm_movhi_vfp, thumb2_movhi_vfp): Likewise.
	(movhf_vfp): Likewise.
	(arm_movsi_vfp, thumb2_movsi_vfp): Likewise.
	(movdi_vfp, movdi_vfp_cortexa8): Likewise.
	(movsf_vfp, thumb2_movsf_vfp): Likewise.
	(movdf_vfp, thumb2_movdf_vfp): Likewise.
	(movsfcc_vfp, abssf2_vfp, negsf2_vfp, addsf3_vfp): Likewise.
	(subsf3_vfp, divsf3_vfp): Likewise.
	(mulsf3_vfp, mulsf3negsf_vfp, negmulsf3_vfp): Likewise.
	(mulsf3addsf_vfp, (mulsf3subsf_vfp, mulsf3negsfaddsf_vfp): Likewise.
	(mulsf3negsfsubsf_vfp): Likewise.
	(truncsisf2_vfp, fixuns_truncsfsi2, floatsisf2_vfp): Likewise.
	(floatunssisf2, sqrtsf2_vfp): Likewise.
	(movcc_vfp): Likewise.
	(cmpsf_split_vfp, cmpsf_trap_split_vfp): Likewise.
	(cmpsf_vfp, cmpsf_trap_vfp): Likewise.
	(push_multi_vfp): Likewise.
	(set_fpscr, get_fpscr): Likewise.
	* arm-c.c (arm_cpu_builtins): Unconditionally define __VFP_FP__.

From-SVN: r241118
      Richard Earnshaw committed
  13. 29 Sep, 2016 1 commit
    • [ARM] Fix new constraints and attributes of SI/HI data movement patterns · 69ba69c9 
      	* config/arm/arm.md (*arm_movsi_insn): Replace "t2" arch attribute
	with "v6t2".  Move "arch" attribute above "pool_range".
	* config/arm/vfp.md (*arm_movhi_vfp): Replace "t2" arch attribute
	with "v6t2".
	(*thumb2_movhi_vfp): Likewise.
	(*arm_movhi_fp16): Likewise.
	(*thumb2_movhi_fp16): Likewise.
	(*arm_movsi_vfp): Remove "arch" attribute.
	(*thumb2_movsi_vfp): Likewise.

From-SVN: r240622
      Matthew Wahab committed
  15. 27 Sep, 2016 1 commit
  17. 23 Sep, 2016 3 commits
    • [PATCH 8/17][ARM] Add VFP FP16 arithmetic instructions. · d403b8d4 
      gcc/
2016-09-23  Matthew Wahab  <matthew.wahab@arm.com>

	* config/arm/iterators.md (Code iterators): Fix some white-space
	in the comments.
	(GLTE): New.
	(ABSNEG): New
	(FCVT): Moved from vfp.md.
	(VCVT_HF_US_N): New.
	(VCVT_SI_US_N): New.
	(VCVT_HF_US): New.
	(VCVTH_US): New.
	(FP16_RND): New.
	(absneg_str): New.
	(FCVTI32typename): Moved from vfp.md.
	(sup): Add UNSPEC_VCVTA_S, UNSPEC_VCVTA_U, UNSPEC_VCVTM_S,
	UNSPEC_VCVTM_U, UNSPEC_VCVTN_S, UNSPEC_VCVTN_U, UNSPEC_VCVTP_S,
	UNSPEC_VCVTP_U, UNSPEC_VCVT_HF_S_N, UNSPEC_VCVT_HF_U_N,
	UNSPEC_VCVT_SI_S_N, UNSPEC_VCVT_SI_U_N,  UNSPEC_VCVTH_S_N,
	UNSPEC_VCVTH_U_N, UNSPEC_VCVTH_S and UNSPEC_VCVTH_U.
	(vcvth_op): New.
	(fp16_rnd_str): New.
	(fp16_rnd_insn): New.
	* config/arm/unspecs.md (UNSPEC_VCVT_HF_S_N): New.
	(UNSPEC_VCVT_HF_U_N): New.
	(UNSPEC_VCVT_SI_S_N): New.
	(UNSPEC_VCVT_SI_U_N): New.
	(UNSPEC_VCVTH_S): New.
	(UNSPEC_VCVTH_U): New.
	(UNSPEC_VCVTA_S): New.
	(UNSPEC_VCVTA_U): New.
	(UNSPEC_VCVTM_S): New.
	(UNSPEC_VCVTM_U): New.
	(UNSPEC_VCVTN_S): New.
	(UNSPEC_VCVTN_U): New.
	(UNSPEC_VCVTP_S): New.
	(UNSPEC_VCVTP_U): New.
	(UNSPEC_VCVTP_S): New.
	(UNSPEC_VCVTP_U): New.
	(UNSPEC_VRND): New.
	(UNSPEC_VRNDA): New.
	(UNSPEC_VRNDI): New.
	(UNSPEC_VRNDM): New.
	(UNSPEC_VRNDN): New.
	(UNSPEC_VRNDP): New.
	(UNSPEC_VRNDX): New.
	* config/arm/vfp.md (<absneg_str>hf2): New.
	(neon_vabshf): New.
	(neon_v<fp16_rnd_str>hf): New.
	(neon_vrndihf): New.
	(addhf3): New.
	(subhf3): New.
	(divhf3): New.
	(mulhf3): New.
	(*mulsf3neghf_vfp): New.
	(*negmulhf3_vfp): New.
	(*mulsf3addhf_vfp): New.
	(*mulhf3subhf_vfp): New.
	(*mulhf3neghfaddhf_vfp): New.
	(*mulhf3neghfsubhf_vfp): New.
	(fmahf4): New.
	(neon_vfmahf): New.
	(fmsubhf4_fp16): New.
	(neon_vfmshf): New.
	(*fnmsubhf4): New.
	(*fnmaddhf4): New.
	(neon_vsqrthf): New.
	(neon_vrsqrtshf): New.
	(FCVT): Move to iterators.md.
	(FCVTI32typename): Likewise.
	(neon_vcvth<sup>hf): New.
	(neon_vcvth<sup>si): New.
	(neon_vcvth<sup>_nhf_unspec): New.
	(neon_vcvth<sup>_nhf): New.
	(neon_vcvth<sup>_nsi_unspec): New.
	(neon_vcvth<sup>_nsi): New.
	(neon_vcvt<vcvth_op>h<sup>si): New.
	(neon_<fmaxmin_op>hf): New.

testsuite/
2016-09-23  Matthew Wahab  <matthew.wahab@arm.com>

	* gcc.target/arm/armv8_2-fp16-arith-1.c: New.
	* gcc.target/arm/armv8_2-fp16-conv-1.c: New.

From-SVN: r240411
      Matthew Wahab committed
    • [PATCH 7/17][ARM] Add FP16 data movement instructions. · 4ffc8099 
      gcc/
2016-09-23  Matthew Wahab  <matthew.wahab@arm.com>
	    Jiong Wang <jiong.wang@arm.com>

	* config/arm/arm.c (coproc_secondary_reload_class): Make HFmode
	available when FP16 instructions are available.
	(output_move_vfp): Add support for 16-bit data moves.
	(arm_validize_comparison): Fix some white-space.  Support HFmode
	by conversion to SFmode.
	* config/arm/arm.md (truncdfhf2): Fix a comment.
	(extendhfdf2): Likewise.
	(cstorehf4): New.
	(movsicc): Fix some white-space.
	(movhfcc): New.
	(movsfcc): Fix some white-space.
	(*cmovhf): New.
	* config/arm/vfp.md (*arm_movhi_vfp): Disable when VFP FP16
	instructions are available.
	(*thumb2_movhi_vfp): Likewise.
	(*arm_movhi_fp16): New.
	(*thumb2_movhi_fp16): New.
	(*movhf_vfp_fp16): New.
	(*movhf_vfp_neon): Disable when VFP FP16 instructions are
	available.
	(*movhf_vfp): Likewise.
	(extendhfsf2): Enable when VFP FP16 instructions are available.
	(truncsfhf2):  Enable when VFP FP16 instructions are available.

testsuite/
2016-09-23  Matthew Wahab  <matthew.wahab@arm.com>

	* gcc.target/arm/armv8_2_fp16-move-1.c: New.
	* gcc.target/arm/fp16-aapcs-1.c: Update expected output.


Co-Authored-By: Jiong Wang <jiong.wang@arm.com>

From-SVN: r240407
      Matthew Wahab committed
    • [PATCH 5/17][ARM] Enable HI mode moves for floating point values. · 50df9464 
      gcc/
2016-09-23  Jiong Wang  <jiong.wang@arm.com>
	    Matthew Wahab  <matthew.wahab@arm.com>

	* config/arm/arm.c (output_move_vfp): Weaken assert to allow
	HImode.
	(arm_hard_regno_mode_ok): Allow HImode values in VFP registers.
	* config/arm/arm.md (*movhi_bytes): Disable when VFP registers are
	available.  Also fix some white-space.
	* config/arm/vfp.md (*arm_movhi_vfp): New.
	(*thumb2_movhi_vfp): New.

testsuite/
2016-09-23  Matthew Wahab  <matthew.wahab@arm.com>

	* gcc.target/arm/short-vfp-1.c: New.

From-SVN: r240403
      Matthew Wahab committed
  19. 16 May, 2016 1 commit
    • [ARM] Enable __fp16 as a function parameter and return type. · 1b81a1c1 
      gcc/
2016-05-16  Matthew Wahab  <matthew.wahab@arm.com>
	    Ramana Radhakrishnan  <ramana.radhakrishnan@arm.com>
	    Jiong Wang  <jiong.wang@arm.com>

	* config/arm/arm-c.c (arm_cpu_builtins): Use def_or_undef_macro
	for __ARM_FP16_FORMAT_IEEE and __ARM_FP16_FORMAT_ALTERNATIVE.
	Define __ARM_FP16_ARGS when appropriate.
	* config/arm/arm.c (arm_invalid_parameter_type): Remove
	declaration.
	(arm_invalid_return_type): Likewise.
	(TARGET_INVALID_PARAMETER_TYPE): Remove.
	(TARGET_INVALID_RETURN_TYPE): Remove.
	(aapcs_vfp_sub_candidate): Allow HFmode.
	(aapcs_vfp_allocate): Add comment.  Support HFmode.
	(aapcs_vfp_allocate_return_reg): Likewise.
	(struct aapcs_cp_arg_layout): Slightly reword comments for
	is_return_candidate and allocate_return_reg.
	(output_mov_vfp): Update assert.
	(arm_hard_regno_mode_ok): Remove comment, update HF-mode
	condition.
	(arm_invalid_parameter_type): Remove.
	(amr_invalid_return_type): Remove.
	* config/arm/arm.h (TARGET_NEON_FP16): Fix definition.
	* config/arm/arm.md (*arm32_movhf): Disable for TARGET_VFP.
	* config/arm/vfp.md (*movhf_vfp): Enable for TARGET_VFP.

gcc/testsuite/
2016-05-16  Matthew Wahab  <matthew.wahab@arm.com>

	* g++.dg/ext/arm-fp16/fp16-param-1.c: Update expected output.  Add
	test for __ARM_FP16_ARGS.
	* g++.dg/ext/arm-fp16/fp16-return-1.c: Update expected output.
	* gcc.target/arm/aapcs/neon-vect10.c: New.
	* gcc.target/arm/aapcs/neon-vect9.c: New.
	* gcc.target/arm/aapcs/vfp18.c: New.
	* gcc.target/arm/aapcs/vfp19.c: New.
	* gcc.target/arm/aapcs/vfp20.c: New.
	* gcc.target/arm/aapcs/vfp21.c: New.
	* gcc.target/arm/fp16-aapcs-1.c: New.
	* g++.target/arm/fp16-param-1.c: Update expected output.  Add
	test for __ARM_FP16_ARGS.
	* g++.target/arm/fp16-return-1.c: Update expected output.


Co-Authored-By: Jiong Wang <jiong.wang@arm.com>
Co-Authored-By: Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>

From-SVN: r236269
      Matthew Wahab committed
  21. 07 May, 2016 1 commit
    • Emit vmov.i64 to load 0.0 into FP reg when neon enabled. · c76623e7 
      	* config/arm/arm.md: (arch): Add neon.
	(arch_enabled): Return yes for arch neon when TARGET_NEON.
	* config/arm/vfp.md (movdf_vfp): Add w/G as alternative 3.  Add
	neon_move as type for alt 3.  Add arch attr enabling alt 3 for neon.
	Emit vmov.i64 for alt 3.  Renumber alternatives 3 to 8.  Adjust
	attributes for alt renumbering.  Mark alt 3 as non-predicable.
	(thumb2_movdf_vfp): Likewise.

From-SVN: r235998
      Jim Wilson committed
  23. 19 Jan, 2016 1 commit
  25. 04 Jan, 2016 1 commit
  27. 23 Dec, 2015 1 commit
    • iterators.md (VMAXMINFNM): New int iterator. · 0a18c19f 
      2015-12-23  David Sherwood  <david.sherwood@arm.com>

    gcc/
        * config/arm/iterators.md (VMAXMINFNM): New int iterator.
        (fmaxmin): New int attribute.
        (fmaxmin_op): Likewise.
        * config/arm/unspecs.md (UNSPEC_VMAXNM): New unspec.
        (UNSPEC_VMINNM): Likewise.
        * config/arm/neon.md (fmaxmin): New pattern.
        * config/arm/vfp.md (fmaxmin): Likewise.
    gcc/testsuite
        * gcc.target/arm/fmaxmin.x: New file used by tests below.
        * gcc.target/arm/fmaxmin.c: New test.
        * gcc.target/arm/vect-fmaxmin.c: Likewise.

From-SVN: r231924
      David Sherwood committed
  29. 05 Oct, 2015 1 commit
    • Remove REAL_VALUE_FROM_CONST_DOUBLE · 34a72c33 
      To maintain symmetry after the previous removal of
CONST_DOUBLE_FROM_REAL_VALUE, this patch also gets rid of
REAL_VALUE_FROM_CONST_DOUBLE.  All the macro did was copy the
contents of CONST_DOUBLE_REAL_VALUE into a temporary real_value
structure.  In many cases there was no need for this temporary
and we could simply use the CONST_DOUBLE_REAL_VALUE directly.
For that reason this patch is less automatic than the others.

Bootstrapped & regression-tested on x86_64-linux-gnu.  Also tested by
building one target per CPU directory and checking that there were
no new warnings and no changes in testsuite output at -O2.

gcc/
	* real.h (REAL_VALUE_FROM_CONST_DOUBLE): Delete.
	* config/aarch64/aarch64.c (aarch64_float_const_zero_rtx_p)
	(aarch64_print_operand, aarch64_float_const_representable_p)
	(aarch64_output_simd_mov_immediate): Use CONST_DOUBLE_REAL_VALUE
	instead of REAL_VALUE_FROM_CONST_DOUBLE.
	* config/arc/arc.c (arc_print_operand): Likewise.
	* config/arm/arm.c (arm_const_double_rtx, vfp3_const_double_index)
	(neon_valid_immediate, arm_print_operand, arm_emit_fp16_const)
	(vfp3_const_double_for_fract_bits, vfp3_const_double_for_bits):
	Likewise.
	* config/arm/arm.md (*arm32_movhf, consttable_4, consttable_8)
	(consttable_16): Likewise.
	* config/arm/vfp.md (*movhf_vfp_neon, *movhf_vfp): Likewise.
	* config/avr/avr.c (avr_print_operand): Likewise.
	* config/bfin/bfin.md: Likewise (in a define_split).
	* config/c6x/c6x.md: Likewise (in a define_split).
	* config/cr16/cr16.c (cr16_const_double_ok): Likewise.
	(cr16_print_operand): Likewise.
	* config/cris/cris.c (cris_print_operand): Likewise.
	* config/epiphany/epiphany.c (epiphany_print_operand): Likewise.
	* config/fr30/fr30.c (fr30_print_operand): Likewise.
	(fr30_const_double_is_zero): Likewise.
	* config/frv/frv.c (frv_print_operand, output_move_single): Likewise.
	* config/frv/frv.md: Likewise (in a define_split).
	* config/frv/predicates.md (int_2word_operand): Likewise.
	* config/h8300/h8300.c (h8300_print_operand): Likewise.
	* config/i386/i386.c (standard_80387_constant_p): Likewise.
	(ix86_print_operand, ix86_split_to_parts): Likewise.
	* config/i386/i386.md: Likewise (in a define_split).
	* config/ia64/ia64.c (ia64_split_tmode, ia64_print_operand): Likewise.
	* config/iq2000/iq2000.md (movsf_lo_sum, movsf_high): Likewise.
	* config/m32r/m32r.c (easy_df_const, m32r_print_operand): Likewise.
	* config/m68k/m68k.c (handle_move_double, standard_68881_constant_p)
	(print_operand): Likewise.
	* config/m68k/m68k.md (movsf_cf_hard, movdf_cf_hard): Likewise.
	* config/mep/mep.md: Likewise (in define_split).
	* config/microblaze/microblaze.c (microblaze_const_double_ok)
	(print_operand): Likewise.
	* config/mips/mips.md (consttable_float): Likewise.
	* config/mmix/mmix.c (mmix_intval): Likewise.
	* config/mn10300/mn10300.c (mn10300_print_operand): Likewise.
	* config/nvptx/nvptx.c (nvptx_print_operand): Likewise.
	* config/pa/pa.c (pa_singlemove_string): Likewise.
	* config/pdp11/pdp11.c (pdp11_expand_operands): Likewise.
	(pdp11_asm_print_operand, legitimate_const_double_p): Likewise.
	* config/rs6000/rs6000.c (num_insns_constant, rs6000_emit_cmove)
	(output_toc): Likewise.
	* config/rs6000/rs6000.md: Likewise (in define_splits).
	* config/rx/rx.c (rx_print_operand): Likewise.
	* config/s390/s390.c (s390_output_pool_entry): Likewise.
	* config/sh/sh.c (fp_zero_operand, fp_one_operand): Likewise.
	* config/sh/sh.md (consttable_sf, consttable_df): Likewise
	(and also in define_splits).
	* config/sparc/sparc.c (fp_sethi_p, fp_mov_p): Likewise.
	(fp_high_losum_p): Likewise.
	* config/sparc/sparc.md (*movsf_insn, *movsf_lo_sum): Likewise.
	(*movsf_high): Likewise.
	* config/spu/spu.c (const_double_to_hwint): Likewise.
	* config/v850/v850.c (const_double_split): Likewise.
	* config/vax/vax.c (vax_float_literal): Likewise.
	* config/visium/visium.c (visium_expand_copysign): Likewise.
	* config/visium/visium.md: Likewise (in define_split).
	* config/xtensa/predicates.md (const_float_1_operand): Likewise.
	* config/xtensa/xtensa.c (print_operand): Likewise.
	(xtensa_output_literal): Likewise.
	* cprop.c (implicit_set_cond_p): Likewise.
	* dwarf2out.c (insert_float): Likewise.
	* expmed.c (expand_mult, make_tree): Likewise.
	* expr.c (compress_float_constant): Likewise.
	* rtlanal.c (split_double): Likewise.
	* simplify-rtx.c (avoid_constant_pool_reference): Likewise.
	(simplify_const_unary_operation, simplify_binary_operation_1)
	(simplify_const_binary_operation): Likewise.
	(simplify_const_relational_operation): Likewise.
	* varasm.c (output_constant_pool_2): Likewise.

From-SVN: r228478
      Richard Sandiford committed
  31. 03 Aug, 2015 1 commit
    • [ARM] PR target/66731 Fix vnmul insn with -frounding-math · 1f71aee9 
      gcc:

	PR target/66731
	* config/arm/vfp.md (negmuldf3_vfp): Add new pattern.
	(negmulsf3_vfp): Likewise.
	(muldf3negdf_vfp): Disable for -frounding-math.
	(mulsf3negsf_vfp): Likewise.
	* config/arm/arm.c (arm_new_rtx_costs): Fix NEG cost for VNMUL,
	fix MULT cost with -frounding-math.

gcc/testsuite:

	PR target/66731
	* gcc.target/arm/vnmul-1.c: New.
	* gcc.target/arm/vnmul-2.c: New.
	* gcc.target/arm/vnmul-3.c: New.
	* gcc.target/arm/vnmul-4.c: New.

From-SVN: r226496
      Szabolcs Nagy committed
  33. 07 May, 2015 1 commit
    • rtl.h (always_void_p): New function. · f7df4a84 
      gcc/
	* rtl.h (always_void_p): New function.
	* gengenrtl.c (always_void_p): Likewise.
	(genmacro): Don't add a mode parameter to gen_rtx_foo if rtxes
	with code foo are always VOIDmode.
	* genemit.c (gen_exp): Update gen_rtx_foo calls accordingly.
	* builtins.c, caller-save.c, calls.c, cfgexpand.c, combine.c,
	compare-elim.c, config/aarch64/aarch64.c,
	config/aarch64/aarch64.md, config/alpha/alpha.c,
	config/alpha/alpha.md, config/arc/arc.c, config/arc/arc.md,
	config/arm/arm-fixed.md, config/arm/arm.c, config/arm/arm.md,
	config/arm/ldrdstrd.md, config/arm/thumb2.md, config/arm/vfp.md,
	config/avr/avr.c, config/bfin/bfin.c, config/c6x/c6x.c,
	config/c6x/c6x.md, config/cr16/cr16.c, config/cris/cris.c,
	config/cris/cris.md, config/darwin.c, config/epiphany/epiphany.c,
	config/epiphany/epiphany.md, config/fr30/fr30.c, config/frv/frv.c,
	config/frv/frv.md, config/h8300/h8300.c, config/i386/i386.c,
	config/i386/i386.md, config/i386/sse.md, config/ia64/ia64.c,
	config/ia64/vect.md, config/iq2000/iq2000.c,
	config/iq2000/iq2000.md, config/lm32/lm32.c, config/lm32/lm32.md,
	config/m32c/m32c.c, config/m32r/m32r.c, config/m68k/m68k.c,
	config/m68k/m68k.md, config/mcore/mcore.c, config/mcore/mcore.md,
	config/mep/mep.c, config/microblaze/microblaze.c,
	config/mips/mips.c, config/mips/mips.md, config/mmix/mmix.c,
	config/mn10300/mn10300.c, config/msp430/msp430.c,
	config/nds32/nds32-memory-manipulation.c, config/nds32/nds32.c,
	config/nds32/nds32.md, config/nios2/nios2.c, config/nvptx/nvptx.c,
	config/pa/pa.c, config/pa/pa.md, config/rl78/rl78.c,
	config/rs6000/altivec.md, config/rs6000/rs6000.c,
	config/rs6000/rs6000.md, config/rs6000/vector.md,
	config/rs6000/vsx.md, config/rx/rx.c, config/rx/rx.md,
	config/s390/s390.c, config/s390/s390.md, config/sh/sh.c,
	config/sh/sh.md, config/sh/sh_treg_combine.cc,
	config/sparc/sparc.c, config/sparc/sparc.md, config/spu/spu.c,
	config/spu/spu.md, config/stormy16/stormy16.c,
	config/tilegx/tilegx.c, config/tilegx/tilegx.md,
	config/tilepro/tilepro.c, config/tilepro/tilepro.md,
	config/v850/v850.c, config/v850/v850.md, config/vax/vax.c,
	config/visium/visium.c, config/xtensa/xtensa.c, cprop.c, dse.c,
	expr.c, gcse.c, ifcvt.c, ira.c, jump.c, lower-subreg.c,
	lra-constraints.c, lra-eliminations.c, lra.c, postreload.c, ree.c,
	reg-stack.c, reload.c, reload1.c, reorg.c, sel-sched.c,
	var-tracking.c: Update calls accordingly.

From-SVN: r222883
      Richard Sandiford committed
  35. 05 Jan, 2015 1 commit
  37. 30 Sep, 2014 1 commit
    • arm-cores.def (cortex-m7): New core name. · 2f6403f1 
      2014-09-30  Terry Guo  <terry.guo@arm.com>

	* config/arm/arm-cores.def (cortex-m7): New core name.
	* config/arm/arm-fpus.def (fpv5-sp-d16): New fpu name.
	(fpv5-d16): Ditto.
	* config/arm/arm-tables.opt: Regenerated.
	* config/arm/arm-tune.md: Regenerated.
	* config/arm/arm.h (TARGET_VFP5): New macro.
	* config/arm/bpabi.h (BE8_LINK_SPEC): Include cortex-m7.
	* config/arm/vfp.md (<vrint_pattern><SDF:mode>2,
	smax<mode>3, smin<mode>3): Enabled for FPU FPv5.
	* doc/invoke.texi: Document new cpu and fpu names.

From-SVN: r215711
      Terry Guo committed
  39. 09 Sep, 2014 7 commits
    • [ARM][7/7] Convert FP mnemonics to UAL | f{ld,st}m -> v{ld,st}m · b27832ed 
      	* config/arm/arm.md (vfp_pop_multiple_with_writeback): Use vldm
	mnemonic instead of fldmfdd.
	* config/arm/arm.c (vfp_output_fstmd): Rename to...
	(vfp_output_vstmd): ... This.  Convert output to UAL syntax.
	Output vpush when address register is SP.
	* config/arm/arm-protos.h (vfp_output_fstmd): Rename to...
	(vfp_output_vstmd): ... This.
	* config/arm/vfp.md (push_multi_vfp): Update call to
	vfp_output_vstmd.

From-SVN: r215056
      Kyrylo Tkachov committed
    • [ARM][6/7] Convert FP mnemonics to UAL | movcc_vfp (fmstat) · 5a150108 
      	* config/arm/vfp.md (*movcc_vfp): Use UAL syntax.

From-SVN: r215055
      Kyrylo Tkachov committed
    • [ARM][5/7] Convert FP mnemonics to UAL | sqrt and FP compare patterns · c2786584 
      	* config/arm/vfp.md (*sqrtsf2_vfp): Use UAL assembly syntax.
	(*sqrtdf2_vfp): Likewise.
	(*cmpsf_vfp): Likewise.
	(*cmpsf_trap_vfp): Likewise.
	(*cmpdf_vfp): Likewise.
	(*cmpdf_trap_vfp): Likewise.

	* gcc.target/arm/vfp-1.c: Updated expected assembly.

From-SVN: r215054
      Kyrylo Tkachov committed
    • [ARM][4/7] Convert FP mnemonics to UAL | vcvt patterns · 14a082a3 
      	* config/arm/vfp.md (*extendsfdf2_vfp): Use UAL assembly syntax.
	(*truncdfsf2_vfp): Likewise.
	(*truncsisf2_vfp): Likewise.
	(*truncsidf2_vfp): Likewise.
	(fixuns_truncsfsi2): Likewise.
	(fixuns_truncdfsi2): Likewise.
	(*floatsisf2_vfp): Likewise.
	(*floatsidf2_vfp): Likewise.
	(floatunssisf2): Likewise.
	(floatunssidf2): Likewise.

	* gcc.target/arm/vfp-1.c: Updated expected assembly.

From-SVN: r215053
      Kyrylo Tkachov committed
    • [3/7] Convert FP mnemonics to UAL | mul+add patterns · 14d9aa9f 
      	* config/arm/vfp.md (*mulsf3_vfp): Use UAL assembly syntax.
	(*muldf3_vfp): Likewise.
	(*mulsf3negsf_vfp): Likewise.
	(*muldf3negdf_vfp): Likewise.
	(*mulsf3addsf_vfp): Likewise.
	(*muldf3adddf_vfp): Likewise.
	(*mulsf3subsf_vfp): Likewise.
	(*muldf3subdf_vfp): Likewise.
	(*mulsf3negsfaddsf_vfp): Likewise.
	(*fmuldf3negdfadddf_vfp): Likewise.
	(*mulsf3negsfsubsf_vfp): Likewise.
	(*muldf3negdfsubdf_vfp): Likewise.

	* gcc.target/arm/vfp-1.c: Updated expected assembly.

From-SVN: r215052
      Kyrylo Tkachov committed
    • [ARM][2/7] Convert FP mnemonics to UAL | add/sub/div/abs patterns. · 436c249d 
      	* config/arm/vfp.md (*abssf2_vfp): Use UAL assembly syntax.
	(*absdf2_vfp): Likewise.
	(*negsf2_vfp): Likewise.
	(*negdf2_vfp): Likewise.
	(*addsf3_vfp): Likewise.
	(*adddf3_vfp): Likewise.
	(*subsf3_vfp): Likewise.
	(*subdf3_vfp): Likewise.
	(*divsf3_vfp): Likewise.
	(*divdf3_vfp): Likewise.

	* gcc.target/arm/vfp-1.c: Updated expected assembly.

From-SVN: r215051
      Kyrylo Tkachov committed
    • [ARM][1/7] Convert FP mnemonics to UAL | mov patterns. · 35cb3e53 
      	* config/arm/arm.c (output_move_vfp): Use UAL syntax for load/store
	multiple.
	(arm_print_operand): Don't convert real values to decimal
	representation in default case.
	(fp_immediate_constant): Delete.
	* config/arm/arm-protos.h (fp_immediate_constant): Likewise.
	* config/arm/vfp.md (*arm_movsi_vfp): Convert to VFP moves to UAL
	syntax.
	(*thumb2_movsi_vfp): Likewise.
	(*movdi_vfp): Likewise.
	(*movdi_vfp_cortexa8): Likewise.
	(*movhf_vfp_neon): Likewise.
	(*movhf_vfp): Likewise.
	(*movsf_vfp): Likewise.
	(*thumb2_movsf_vfp): Likewise.
	(*movdf_vfp): Likewise.
	(*thumb2_movdf_vfp): Likewise.
	(*movsfcc_vfp): Likewise.
	(*thumb2_movsfcc_vfp): Likewise.
	(*movdfcc_vfp): Likewise.
	(*thumb2_movdfcc_vfp): Likewise.

	* gcc.target/arm/pr51835.c: Update expected assembly.
	* gcc.target/arm/vfp-1.c: Likewise.
	* gcc.target/arm/vfp-ldmdbd.c: Likewise.
	* gcc.target/arm/vfp-ldmdbs.c: Likewise.
	* gcc.target/arm/vfp-ldmiad.c: Likewise.
	* gcc.target/arm/vfp-ldmias.c: Likewise.
	* gcc.target/arm/vfp-stmdbd.c: Likewise.
	* gcc.target/arm/vfp-stmdbs.c: Likewise.
	* gcc.target/arm/vfp-stmiad.c: Likewise.
	* gcc.target/arm/vfp-stmias.c: Likewise.

From-SVN: r215050
      Kyrylo Tkachov committed
  41. 02 Sep, 2014 1 commit
  43. 12 Aug, 2014 1 commit
  45. 03 Jul, 2014 1 commit
  47. 17 Jun, 2014 1 commit
    • arm.c (arm_atomic_assign_expand_fenv): call default_atomic_assign_expand_fenv… · 5db37871 
      arm.c (arm_atomic_assign_expand_fenv): call default_atomic_assign_expand_fenv for !TARGET_HARD_FLOAT.

gcc/
2014-06-17  Kugan Vivekanandarajah  <kuganv@linaro.org>

	* config/arm/arm.c (arm_atomic_assign_expand_fenv): call
	default_atomic_assign_expand_fenv for !TARGET_HARD_FLOAT.
	(arm_init_builtins) : Initialize builtins __builtins_arm_set_fpscr and
	__builtins_arm_get_fpscr only when TARGET_HARD_FLOAT.
	* config/arm/vfp.md (set_fpscr): Make pattern conditional on
	TARGET_HARD_FLOAT.
	(get_fpscr) : Likewise.

From-SVN: r211717
      Kugan Vivekanandarajah committed
  49. 31 May, 2014 1 commit
    • arm.c (TARGET_ATOMIC_ASSIGN_EXPAND_FENV): New define. · f10743d3 
      gcc/

2014-05-31  Kugan Vivekanandarajah  <kuganv@linaro.org>

	* config/arm/arm.c (TARGET_ATOMIC_ASSIGN_EXPAND_FENV): New define.
	(arm_builtins) : Add ARM_BUILTIN_GET_FPSCR and ARM_BUILTIN_SET_FPSCR.
	(bdesc_2arg) : Add description for builtins __builtins_arm_set_fpscr
	and __builtins_arm_get_fpscr.
	(arm_init_builtins) : Initialize builtins __builtins_arm_set_fpscr and
	__builtins_arm_get_fpscr.
	(arm_expand_builtin) : Expand builtins __builtins_arm_set_fpscr and
	__builtins_arm_ldfpscr.
	(arm_atomic_assign_expand_fenv): New function.
	* config/arm/vfp.md (set_fpscr): New pattern.
	(get_fpscr) : Likewise.
	* config/arm/unspecs.md (unspecv): Add VUNSPEC_GET_FPSCR and
	VUNSPEC_SET_FPSCR.
	* doc/extend.texi (AARCH64 Built-in Functions) : Document
	__builtins_arm_set_fpscr, __builtins_arm_get_fpscr.

From-SVN: r211103
      Kugan Vivekanandarajah committed
  51. 30 May, 2014 1 commit
  53. 02 Jan, 2014 1 commit
  55. 24 Dec, 2013 1 commit
    • arm-protos.h (vfp_const_double_for_bits): Declare. · c75d51aa 
      gcc/

2013-12-24  Renlin Li  <Renlin.Li@arm.com>

	* config/arm/arm-protos.h (vfp_const_double_for_bits): Declare.
	* config/arm/constraints.md (Dp): Define new constraint.
	* config/arm/predicates.md (const_double_vcvt_power_of_two): Define
	new predicate.
	* config/arm/arm.c (arm_print_operand): Add print for new fucntion.
	(vfp3_const_double_for_bits): New function.
	* config/arm/vfp.md (combine_vcvtf2i): Define new instruction.

gcc/testsuite/

2013-12-24  Renlin Li  <Renlin.Li@arm.com>

	* gcc.target/arm/fixed_float_conversion.c: New test case.

From-SVN: r206195
      Renlin Li committed
  57. 28 Nov, 2013 1 commit
    • iterators.md (vrint_conds): New int attribute. · fca0efeb 
      [gcc/]
2013-11-28  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>

	* config/arm/iterators.md (vrint_conds): New int attribute.
	* config/arm/vfp.md (<vrint_pattern><SDF:mode>2): Set conds attribute.
	(smax<mode>3): Likewise.
	(smin<mode>3): Likewise.

[gcc/testsuite/]
2013-11-28  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>

	* gcc.target/arm/vrinta-ce.c: New testcase.

From-SVN: r205492
      Kyrylo Tkachov committed
  59. 15 Oct, 2013 1 commit
    • [ARM] [Neon types 3/10] Update Current type attributes to new Neon Types. · f7379e5e 
      gcc/
	* config/arm/iterators.md (V_elem_ch): New.
	(q): Likewise.
	(VQH_type): Likewise.
	* config/arm/arm.md (is_neon_type): New.
	(conds): Use is_neon_type.
	(anddi3_insn): Update type attribute.
	(xordi3_insn): Likewise.
	(one_cmpldi2): Likewise.
	* gcc/config/arm/vfp.md (movhf_vfp_neon): Update type attribute.
	* gcc/config/arm/neon.md (neon_mov): Update type attributes for
	all patterns.

From-SVN: r203613
      James Greenhalgh committed
  61. 10 Sep, 2013 1 commit
  63. 06 Sep, 2013 1 commit
    • [AArch64, ARM] Rename the FCPYS type to FMOV · 292b89b3 
      gcc/
	* config/arm/types.md (type): Rename fcpys to fmov.
	* config/arm/vfp.md
	(*arm_movsi_vfp): Rename type fcpys as fmov.
	(*thumb2_movsi_vfp): Likewise
	(*movhf_vfp_neon): Likewise
	(*movhf_vfp): Likewise
	(*movsf_vfp): Likewise
	(*thumb2_movsf_vfp): Likewise
	(*movsfcc_vfp): Likewise
	(*thumb2_movsfcc_vfp): Likewise
	* config/aarch64/aarch64-simd.md
	(move_lo_quad_<mode>): Replace type mov_reg with fmovs.
	* config/aarch64/aarch64.md
	(*movsi_aarch64): Replace type mov_reg with fmovs.
	(*movdi_aarch64): Likewise
	(*movsf_aarch64): Likewise
	(*movdf_aarch64): Likewise
	* config/arm/arm.c
	(cortexa7_older_only): Rename TYPE_FCPYS to TYPE_FMOV.
	* config/arm/iwmmxt.md
	(*iwmmxt_movsi_insn): Rename type fcpys as fmov.
	* config/arm/arm1020e.md: Update with new attributes.
	* config/arm/cortex-a15-neon.md: Update with new attributes.
	* config/arm/cortex-a5.md: Update with new attributes.
	* config/arm/cortex-a53.md: Update with new attributes.
	* config/arm/cortex-a7.md: Update with new attributes.
	* config/arm/cortex-a8-neon.md: Update with new attributes.
	* config/arm/cortex-a9.md: Update with new attributes.
	* config/arm/cortex-m4-fpu.md: Update with new attributes.
	* config/arm/cortex-r4f.md: Update with new attributes.
	* config/arm/marvell-pj4.md: Update with new attributes.
	* config/arm/vfp11.md: Update with new attributes.

From-SVN: r202331
      James Greenhalgh committed