gcc/testsuite/
	* gcc.target/mips/mips.exp (mips-dg-options):
	Add mips_option_dependency msoft-float vs no-mmi and
	mips16/micromips vs no-mmi/ext/ext2 only gcc
	config with Loongson target.

From-SVN: r265908

2018-11-07  Sandra Loosemore  <sandra@codesourcery.com>

	PR middle-end/42726

	gcc/
	* doc/invoke.texi (Code Gen Options): Clarify -fno-common behavior.

From-SVN: r265906

2018-11-07  Sandra Loosemore  <sandra@codesourcery.com>

	gcc/
	* doc/invoke.texi: Remove leading dash from @opindex entries
	throughout the file.

From-SVN: r265904

2018-11-07  Sandra Loosemore  <sandra@codesourcery.com>

	PR driver/80828

	gcc/
	* doc/invoke.texi (Option Summary): Add -e and --entry.
	(Link Options): Likewise.

From-SVN: r265903

From-SVN: r265902

https://gcc.gnu.org/ml/gcc-patches/2018-11/msg00502.html
	PR 87926
	* Makefile.in (bitmap.o-warn): Add -Wno-error to unbreak
	--disable-checking bootstrap.

From-SVN: r265899

2018-11-06  Hafiz Abid Qadeer  <abidh@codesourcery.com>

	* config/iconv.m4 (AM_ICONV_LINK): Don't overwrite CPPFLAGS.
	Append $INCICONV to it.

gcc/
	* configure: Regenerated.

libcpp/
	* configure: Likewise.

libstdc++-v3/
	* configure: Likewise.

intl/
	* configure: Likewise.

From-SVN: r265896

2018-11-07  Jozef Lawrynowicz  <jozef.l@mittosystems.com>

	* gcc.c-torture/compile/pr65595.c: Change type of "num" argument to
	memcpy from "unsigned long" to __SIZE_TYPE__.

From-SVN: r265895

2018-11-07  Jozef Lawrynowicz  <jozef.l@mittosystems.com>

	PR c/87691
	
	gcc/ChangeLog:
	* stor-layout.c (compute_record_mode): Set TYPE_MODE of UNION_TYPE
	to the mode of the widest field iff the widest field has mode class
	MODE_INT, or MODE_PARTIAL_INT and the union would be passed by
	reference.

	gcc/testsuite/ChangeLog:
	* gcc.target/msp430/pr87691.c: New test.

From-SVN: r265894

         * common.opt: Add -Wattribute-warning.
         * doc/invoke.texi: Add documentation for -Wno-attribute-warning.
         * expr.c (expand_expr_real_1): Add new attribute to warning_at
         call to allow user configure behavior of "warning" attribute.

         * gcc.dg/Wno-attribute-warning.c: New test.

From-SVN: r265891

	* config/abi/pre/gnu.ver: Fix patterns for size_t parameters.

From-SVN: r265884

When an abbreviation ends with a dot followed by whitespace, Texinfo
thinks the dot ends a sentence, and applies spacing rules etc. based
on that.  To prevent this, there is the @: macro.

This patch puts @: after every vs., e.g., and i.e. where it is needed.
In a few cases there was "@ " already, or "@\n", but @: is slightly
better, and more consistent.


	* target.def: Put @: after every vs., e.g., and i.e. where it is
	followed by whitespace.
	* doc/extend.texi: Ditto.
	* doc/fragments.texi: Ditto.
	* doc/gimple.texi: Ditto.
	* doc/implement-c.texi: Ditto.
	* doc/install.texi: Ditto.
	* doc/invoke.texi: Ditto.
	* doc/md.texi: Ditto.
	* doc/plugins.texi: Ditto.
	* doc/rtl.texi: Ditto.
	* doc/sourcebuild.texi: Ditto.
	* doc/tm.texi.in: Ditto.
	* doc/ux.texi: Ditto.
	* doc/tm.texi: Regenerate.

From-SVN: r265882

This adds support for the Arm Ares CPU for in the arm port.
It implements the Armv8.2-A architecture with the optional features
of statistical profiling, dot product and FP16 on by default.

Note: Ares is a codename to enable early adopters and in time
we will add the final product name once it's announced. 

	* config/arm/arm-cpus.in (ares): New entry.
	* config/arm/arm-tables.opt: Regenerate.
	* config/arm/arm-tune.md: Likewise.
	* doc/invoke.texi (ARM Options): Document ares.

From-SVN: r265881

This adds support for the Arm Ares CPU for AArch64.
It implements the Armv8.2-A architecture with the optional features
of statistical profiling, dot product and FP16 on by default.

Note: Ares is a codename to enable early adopters and in time
we will add the final product name once it's announced. 

	* config/aarch64/aarch64-cores.def (ares): Define.
	* config/aarch64/aarch64-tune.md: Regenerate.
	* doc/invoke.texi (AArch64 Options): Document ares value for mtune.

From-SVN: r265880

https://gcc.gnu.org/ml/gcc-patches/2018-11/msg00468.html
	PR c++/87904
	* cp-tree.h (struct tree_overload): Fix comment.
	* tree.c (ovl_iterator::reveal_node): Propagate OVL_DEDUP_P.

	PR c++/87904
	* g++.dg/lookup/pr87904.C: New.

From-SVN: r265879

	* gcc.dg/pr87874.c: Compile only for int128 effective target.

From-SVN: r265878

	* tree.c (fld_incomplete_type_of): Clear TREE_ADDRESSABLE.
	(free_lang_data_in_decl): Set TREE_ADDRESSABLE for public vars and
	functions; clear TYPE_DECL_SUPPRESS_DEBUG and DECL_MODE for
	TYPE_DECL.

From-SVN: r265877

2018-11-07  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/87914
	* tree-vect-loop.c (vect_is_simple_reduction): Improve detection
	of nested cycles.
	(vectorizable_reduction): Handle shifts and rotates by dispatching
	to vectorizable_shift.
	* tree-vect-stmts.c (vect_get_vec_def_for_operand_1): Handle
	in-loop uses of vect_nested_cycle defs.  Merge cycle and internal
	def cases.
	(vectorizable_shift): Export and handle being called as
	vect_nested_cycle.
	(vect_analyze_stmt): Call vectorizable_shift after
	vectorizable_reduction.
	* tree-vectorizer.h (vectorizable_shift): Declare.

	* lib/target-supports.exp (check_effective_target_vect_var_shift): New.
	(check_avx2_available): Likewise.
	* g++.dg/vect/pr87914.cc: New testcase.

From-SVN: r265876

	* ipa-devirt.c (odr_types_equivalent_p): Expect constants
	than const decls in TREE_VALUE of enum.
	(dump_type_inheritance_graph): Improve duplicate dumping.
	(free_enum_values): New.
	(build_type_inheritance_graph): Use it.
	* tree.c (free_lang_data_in_type): Free TYPE_VALUES of enums
	which are not main variants or not ODR types.
	(verify_type_variant): Expect variants to have no TYPE_VALUES.

From-SVN: r265875

This patch extends update-quadmath.py to update fmaq from glibc.

The issue in that function was that quadmath-imp.h had a struct in a
union with mant_high and mant_low fields (up to 64-bit) whereas glibc
has mantissa0, mantissa1, mantissa2 and mantissa3 (up to 32-bit).  The
patch changes those fields to be the same as in glibc, moving printf /
strtod code that also uses those fields back to closer to the glibc
form.  This allows fmaq to be updated automatically from glibc (which
brings in at least one bug fix from glibc from 2015).

nanq was also using the mant_high field name, and had other issues: it
only partly initialized the union from which a value was returned, and
setting mant_high to 1 meant a signaling NaN would be returned rather
than a quiet NaN.  This patch fixes those issues as part of updating
it to use the changed interfaces (but does not fix the issue of not
using the argument).

Bootstrapped with no regressions on x86_64-pc-linux-gnu.

	* quadmath-imp.h (ieee854_float128): Use mantissa0, mantissa1,
	mantissa2 and mantissa3 fields instead of mant_high and mant_low.
	Change nan field to ieee_nan.
	* update-quadmath.py (update_sources): Also update fmaq.c.
	* math/nanq.c (nanq): Use ieee_nan field of union.
	Zero-initialize f.  Set quiet_nan field.
	* printf/flt1282mpn.c, printf/printf_fphex.c, strtod/mpn2flt128.c,
	strtod/strtoflt128.c: Use mantissa0, mantissa1, mantissa2 and
	mantissa3 fields.  Use ieee_nan and quiet_nan field.
	* math/fmaq.c: Regenerate from glibc sources with
	update-quadmath.py.

From-SVN: r265874

2018-11-07  Richard Biener  <rguenther@suse.de>

	* ipa-inline.c (want_inline_small_function_p): Compute
	big_speedup_p lazily and last.

From-SVN: r265873

tree.c (fld_type_variant_equal_p): Skip TYPE_ALIGN check when building incomplete variant of complete type.


	* tree.c (fld_type_variant_equal_p): Skip TYPE_ALIGN check when
	building incomplete variant of complete type.
	(fld_type_variant): Do not copy TYPE_ALIGN when building incomplete
	variant of complete type.

From-SVN: r265872

gcc/
	* config/mips/mips.c: Fix typo in documentation of
	mips_loongson_ext2_prefetch_cookie.
	(mips_option_override): fix brain twister logical.
	* config/mips/mips.h: Fix typo in documentation of
	ISA_HAS_CTZ_CTO and define pattern.
	* config/mips/mips.md (prefetch): Hoist EXT2 above
	the 2EF/EXT block.
	(prefetch_indexed): Hoist EXT2 above the EXT block.

gcc/testsuite/
	* gcc.target/mips/loongson-ctz.c: Fix typo.
	* gcc.target/mips/loongson-dctz.c: Fix typo.

From-SVN: r265871

tree.c (free_lang_data_in_type): Add fld parameter; simplify return and parameter types of function and method types.


	* tree.c (free_lang_data_in_type): Add fld parameter; simplify
	return and parameter types of function and method types.
	(free_lang_data_in_cgraph): Update.

From-SVN: r265870

2018-11-07  Martin Liska  <mliska@suse.cz>

	PR rtl-optimization/87868
	* postreload-gcse.c (eliminate_partially_redundant_load): Set
	threshold to max_count if we would overflow.
	* profile-count.h: Make max_count a public constant.

From-SVN: r265869

2018-11-07  Martin Liska  <mliska@suse.cz>

	* mem-stats.h: Fix GNU coding style.

From-SVN: r265868

gcc/
	* config/mips/gs264e.md: New.
	* config/mips/mips-cpus.def: Define gs264e.
	* config/mips/mips-tables.opt: Regenerate.
	* config/mips/mips.c (mips_rtx_cost_data): Add DEFAULT_COSTS for
	gs264e.
	(mips_issue_rate): Add support for gs264e.
	(mips_multipass_dfa_lookahead): Likewise.
	* config/mips/mips.h: Define TARGET_GS264E and TUNE_GS264E.
	(MIPS_ISA_LEVEL_SPEC): Infer mips64r2 from gs264e.
	(MIPS_ASE_MSA_SPEC): New.
	(BASE_DRIVER_SELF_SPECS): march=gs264e implies -mmsa.
	(ISA_HAS_FUSED_MADD4): Enable for TARGET_GS264E.
	(ISA_HAS_UNFUSED_MADD4): Exclude TARGET_GS264E.
	* config/mips/mips.md: Include gs264e.md.
	(processor): Add gs264e.
	* config/mips/mips.opt (MSA): Use Mask instead of Var.
	* doc/invoke.texi: Add gs264e to supported architectures.

From-SVN: r265867

gcc/
	* config/mips/gs464e.md: New.
	* config/mips/mips-cpus.def: Define gs464e.
	* config/mips/mips-tables.opt: Regenerate.
	* config/mips/mips.c (mips_rtx_cost_data): Add DEFAULT_COSTS for
	gs464e.
	(mips_issue_rate): Add support for gs464e.
	(mips_multipass_dfa_lookahead): Likewise.
	(mips_option_override): Enable MMI, EXT and EXT2 for gs464e.
	* config/mips/mips.h: Define TARGET_GS464E and TUNE_GS464E.
	(MIPS_ISA_LEVEL_SPEC): Infer mips64r2 from gs464e.
	(ISA_HAS_FUSED_MADD4): Enable for TARGET_GS464E.
	(ISA_HAS_UNFUSED_MADD4): Exclude TARGET_GS464E.
	* config/mips/mips.md: Include gs464e.md.
	(processor): Add gs464e.
	* doc/invoke.texi: Add gs464e to supported architectures.

From-SVN: r265866

gcc/
	* config/mips/loongson3a.md: Rename to ...
	* config/mips/gs464.md: ... here.
	* config/mips/mips-cpus.def: Define gs464; Add loongson3a
	as an alias of gs464 processor.
	* config/mips/mips-tables.opt: Regenerate.
	* config/mips/mips.c (mips_issue_rate): Use PROCESSOR_GS464
	instead of PROCESSOR_LOONGSON_3A.
	(mips_multipass_dfa_lookahead): Use TUNE_GS464 instead of
	TUNE_LOONGSON_3A.
	(mips_option_override): Enable MMI and EXT for gs464.
	* config/mips/mips.h: Rename TARGET_LOONGSON_3A to TARGET_GS464;
	Rename TUNE_LOONGSON_3A to TUNE_GS464.
	(MIPS_ISA_LEVEL_SPEC): Infer mips64r2 from gs464.
	(ISA_HAS_ODD_SPREG, ISA_AVOID_DIV_HILO, ISA_HAS_FUSED_MADD4,
	ISA_HAS_UNFUSED_MADD4): Use TARGET_GS464 instead of
	TARGET_LOONGSON_3A.
	* config/mips/mips.md: Include gs464.md instead of loongson3a.md.
	(processor): Add gs464;
	* doc/invoke.texi: Add gs464 to supported architectures.

From-SVN: r265865

gcc/
	* config/mips/mips-protos.h
	(mips_loongson_ext2_prefetch_cookie): New prototype.
	* config/mips/mips.c (mips_loongson_ext2_prefetch_cookie): New.
	(mips_option_override): Enable TARGET_LOONGSON_EXT when
	TARGET_LOONGSON_EXT2 is true.
	* config/mips/mips.h (TARGET_CPU_CPP_BUILTINS): Define
	__mips_loongson_ext2, __mips_loongson_ext_rev=2.
	(ISA_HAS_CTZ_CTO): New, true if TARGET_LOONGSON_EXT2.
	(ISA_HAS_PREFETCH): Include TARGET_LOONGSON_EXT and
	TARGET_LOONGSON_EXT2.
	(ASM_SPEC): Add mloongson-ext2 and mno-loongson-ext2.
	(define_insn "ctz<mode>2"): New insn pattern.
	(define_insn "prefetch"): Include TARGET_LOONGSON_EXT2.
	(define_insn "prefetch_indexed_<mode>"): Include
	TARGET_LOONGSON_EXT and TARGET_LOONGSON_EXT2.
	* config/mips/mips.opt (-mloongson-ext2): Add option.
	* gcc/doc/invoke.texi (-mloongson-ext2): Document.

gcc/testsuite/
	* gcc.target/mips/loongson-ctz.c: New test.
	* gcc.target/mips/loongson-dctz.c: Likewise.
	* gcc.target/mips/mips.exp (mips_option_groups): Add
	-mloongson-ext2 option.

From-SVN: r265864

gcc/
	* config/mips/mips.h (TARGET_CPU_CPP_BUILTINS): Add
	__mips_loongson_ext.
	(MIPS_ASE_LOONGSON_EXT_SPEC): New.
	(BASE_DRIVER_SELF_SPECS): march=loongson3a implies
	-mloongson-ext.
	(ASM_SPEC): Add mloongson-ext and mno-loongson-ext.
	* config/mips/mips.md (mul<mode>3, mul<mode>3_mul3_nohilo,
	<u>div<mode>3, <u>mod<mode>3, prefetch): Use TARGET_LOONGSON_EXT
	instead of TARGET_LOONGSON_3A.
	* config/mips/mips.opt (-mloongson-ext): Add option.
	* gcc/doc/invoke.texi (-mloongson-ext): Document.

gcc/testsuite/
	* gcc.target/mips/mips.exp (mips_option_groups): Add
	-mloongson-ext option.
	(mips-dg-options): Add mips_option_dependency options
	"-mmicromips" vs "-mno-loongson-ext",

From-SVN: r265863

gcc/
	* config.gcc (extra_headers): Add loongson-mmiintrin.h.
	* config/mips/loongson.md: Move to ...
	* config/mips/loongson-mmi.md: here; Adjustment.
	* config/mips/loongson.h: Move to ...
	State as deprecated. Include loongson-mmiintrin.h for back
	compatibility and warning.
	* config/mips/loongson-mmiintrin.h: ... here.
	* config/mips/mips.c (mips_hard_regno_mode_ok_uncached,
	mips_vector_mode_supported_p, AVAIL_NON_MIPS16): Use
	TARGET_LOONGSON_MMI instead of TARGET_LOONGSON_VECTORS.
	(mips_option_override): Make sure MMI use hard float;
	(mips_shift_truncation_mask, mips_expand_vpc_loongson_even_odd,
	mips_expand_vpc_loongson_pshufh, mips_expand_vpc_loongson_bcast,
	mips_expand_vector_init): Use TARGET_LOONGSON_MMI instead of
	TARGET_LOONGSON_VECTORS.
	* gcc/config/mips/mips.h (TARGET_LOONGSON_VECTORS): Delete.
	(TARGET_CPU_CPP_BUILTINS): Add __mips_loongson_mmi.
	(MIPS_ASE_DSP_SPEC, MIPS_ASE_LOONGSON_MMI_SPEC): New.
	(BASE_DRIVER_SELF_SPECS): march=loongson2e/2f/3a implies
	-mloongson-mmi.
	(SHIFT_COUNT_TRUNCATED): Use TARGET_LOONGSON_MMI instead of
	TARGET_LOONGSON_VECTORS.
	* gcc/config/mips/mips.md (MOVE64, MOVE128): Use
	TARGET_LOONGSON_MMI instead of TARGET_LOONGSON_VECTORS.
	(Loongson MMI patterns): Include loongson-mmi.md instead of
	loongson.md.
	* gcc/config/mips/mips.opt (-mloongson-mmi): New option.
	* gcc/doc/invoke.texi (-mloongson-mmi): Document.

gcc/testsuite/
	* gcc.target/mips/loongson-shift-count-truncated-1.c
	(dg-options): Run under -mloongson-mmi option.
	Include loongson-mmiintrin.h instead of loongson.h.
	* gcc.target/mips/loongson-simd.c: Likewise.
	* gcc.target/mips/mips.exp (mips_option_groups): Add
	-mloongson-mmi option.
	(mips-dg-options): Add mips_option_dependency options "-mips16" vs
	"-mno-loongson-mmi", "-mmicromips" vs "-mno-loongson-mmi",
	"-msoft-float" vs "-mno-loongson-mmi".
	(mips-dg-init): Add -mloongson-mmi option.
	* lib/target-supports.exp: Rename check_mips_loongson_hw_available
	to check_mips_loongson_mmi_hw_available.
	Rename check_effective_target_mips_loongson_runtime to
	check_effective_target_mips_loongson_mmi_runtime.
	(check_effective_target_vect_int): Use mips_loongson_mmi instead
	of mips_loongson when check et-is-effective-target.
	(add_options_for_mips_loongson_mmi): New proc.
	Rename check_effective_target_mips_loongson to
	check_effective_target_mips_loongson_mmi.
	(check_effective_target_vect_shift,
	check_effective_target_whole_vector_shift,
	check_effective_target_vect_no_int_min_max,
	check_effective_target_vect_no_align,
	check_effective_target_vect_short_mult,
	check_vect_support_and_set_flags):Use mips_loongson_mmi instead
	of mips_loongson when check et-is-effective-target.

From-SVN: r265862

re PR lto/87906 (ICE in tree check: expected block, have function_decl in block_ultimate_origin, at tree.c:12326 since r264734)

2018-11-07  Richard Biener  <rguenther@suse.de>

	PR lto/87906
	* tree-streamer-in.c (lto_input_ts_block_tree_pointers): Fixup
	BLOCK_ABSTRACT_ORIGIN to be the ultimate origin.

	* g++.dg/lto/pr87906_0.C: New testcase.
	* g++.dg/lto/pr87906_1.C: Likewise.

From-SVN: r265861

Just like CONST_INT, CONST_WIDE_INT is VOIDmode, so LRA might be
tempted to build a SUBREG to "convert" it to the wanted mode.  That's
no use.  Test for CONST_SCALAR_INT_P instead of CONST_INT_P so that we
skip the subreg creation for both.

for  gcc/ChangeLog

	PR rtl-optimization/87874
	* lra.c (lra_substitute_pseudo): Do not create a subreg for
	const wide ints.

for  gcc/testsuite/ChangeLog

	PR rtl-optimization/87874
	* gcc.dg/pr87874.c: New.

From-SVN: r265860

From-SVN: r265856

	Implement std::pmr::unsynchronized_pool_resource
	* config/abi/pre/gnu.ver: Add new symbols.
	* include/std/memory_resource (std::pmr::__pool_resource): New class.
	(std::pmr::unsynchronized_pool_resource): New class.
	* src/c++17/Makefile.am: Add -fimplicit-templates to flags for
	memory_resource.cc
	* src/c++17/Makefile.in: Regenerate.
	* src/c++17/memory_resource.cc (bitset, chunk, big_block): New
	internal classes.
	(__pool_resource::_Pool): Define new class.
	(munge_options, pool_index, select_num_pools): New internal functions.
	(__pool_resource::__pool_resource, __pool_resource::~__pool_resource)
	(__pool_resource::allocate, __pool_resource::deallocate)
	(__pool_resource::_M_alloc_pools): Define member functions.
	(unsynchronized_pool_resource::unsynchronized_pool_resource)
	(unsynchronized_pool_resource::~unsynchronized_pool_resource)
	(unsynchronized_pool_resource::release)
	(unsynchronized_pool_resource::_M_find_pool)
	(unsynchronized_pool_resource::do_allocate)
	(unsynchronized_pool_resource::do_deallocate): Define member
	functions.
	* testsuite/20_util/unsynchronized_pool_resource/allocate.cc: New
	test.
	* testsuite/20_util/unsynchronized_pool_resource/is_equal.cc: New
	test.
	* testsuite/20_util/unsynchronized_pool_resource/options.cc: New
	test.
	* testsuite/20_util/unsynchronized_pool_resource/release.cc: New
	test.

From-SVN: r265853

2018-11-06  Aaron Sawdey  <acsawdey@linux.ibm.com>

	* config/rs6000/rs6000.md (bswap<mode>2): Force address into register
	if not in indexed or indirect form.
	(bswap<mode>2_load): Change predicate to indexed_or_indirect_operand.
	(bswap<mode>2_store): Ditto.

From-SVN: r265852

2018-11-06  John Bytheway  <jbytheway@gmail.com>

	PR libstdc++/87872
	* include/debug/safe_sequence.tcc
	(_Safe_sequence<>::_M_transfer_from_if): Skip transfer to self.

From-SVN: r265851

The speculation tracker insn in my recent patch set for CVE-2017-5753
was missing a mode on the UNSPEC.  Although this didn't break the
build, it did cause an unnecessary warning from the MD parsing
mechanism that I missed at the time.  It's a trivial fix, as follows:

	* config/aarch64/aarch64.md (speculation_tracker): Set the mode for
	the UNSPEC.

From-SVN: r265849

2018-11-06  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/86850
	* vec.h (vec<T, va_heap, vl_ptr>::splice): Check src.length ()
	instead of src.m_vec.

From-SVN: r265848