Commit d6319811 by Chenghua Xu Committed by Chenghua Xu

Add support for Loongson EXT2 instructions.

gcc/
	* config/mips/mips-protos.h
	(mips_loongson_ext2_prefetch_cookie): New prototype.
	* config/mips/mips.c (mips_loongson_ext2_prefetch_cookie): New.
	(mips_option_override): Enable TARGET_LOONGSON_EXT when
	TARGET_LOONGSON_EXT2 is true.
	* config/mips/mips.h (TARGET_CPU_CPP_BUILTINS): Define
	__mips_loongson_ext2, __mips_loongson_ext_rev=2.
	(ISA_HAS_CTZ_CTO): New, true if TARGET_LOONGSON_EXT2.
	(ISA_HAS_PREFETCH): Include TARGET_LOONGSON_EXT and
	TARGET_LOONGSON_EXT2.
	(ASM_SPEC): Add mloongson-ext2 and mno-loongson-ext2.
	(define_insn "ctz<mode>2"): New insn pattern.
	(define_insn "prefetch"): Include TARGET_LOONGSON_EXT2.
	(define_insn "prefetch_indexed_<mode>"): Include
	TARGET_LOONGSON_EXT and TARGET_LOONGSON_EXT2.
	* config/mips/mips.opt (-mloongson-ext2): Add option.
	* gcc/doc/invoke.texi (-mloongson-ext2): Document.

gcc/testsuite/
	* gcc.target/mips/loongson-ctz.c: New test.
	* gcc.target/mips/loongson-dctz.c: Likewise.
	* gcc.target/mips/mips.exp (mips_option_groups): Add
	-mloongson-ext2 option.

From-SVN: r265864
parent 375899d9
2018-11-07 Chenghua Xu <paul.hua.gm@gmail.com> 2018-11-07 Chenghua Xu <paul.hua.gm@gmail.com>
* config/mips/mips-protos.h
(mips_loongson_ext2_prefetch_cookie): New prototype.
* config/mips/mips.c (mips_loongson_ext2_prefetch_cookie): New.
(mips_option_override): Enable TARGET_LOONGSON_EXT when
TARGET_LOONGSON_EXT2 is true.
* config/mips/mips.h (TARGET_CPU_CPP_BUILTINS): Define
__mips_loongson_ext2, __mips_loongson_ext_rev=2.
(ISA_HAS_CTZ_CTO): New, true if TARGET_LOONGSON_EXT2.
(ISA_HAS_PREFETCH): Include TARGET_LOONGSON_EXT and
TARGET_LOONGSON_EXT2.
(ASM_SPEC): Add mloongson-ext2 and mno-loongson-ext2.
(define_insn "ctz<mode>2"): New insn pattern.
(define_insn "prefetch"): Include TARGET_LOONGSON_EXT2.
(define_insn "prefetch_indexed_<mode>"): Include
TARGET_LOONGSON_EXT and TARGET_LOONGSON_EXT2.
* config/mips/mips.opt (-mloongson-ext2): Add option.
* gcc/doc/invoke.texi (-mloongson-ext2): Document.
2018-11-07 Chenghua Xu <paul.hua.gm@gmail.com>
* config/mips/mips.h (TARGET_CPU_CPP_BUILTINS): Add * config/mips/mips.h (TARGET_CPU_CPP_BUILTINS): Add
__mips_loongson_ext. __mips_loongson_ext.
(MIPS_ASE_LOONGSON_EXT_SPEC): New. (MIPS_ASE_LOONGSON_EXT_SPEC): New.
...@@ -323,6 +323,7 @@ extern bool mips_linked_madd_p (rtx_insn *, rtx_insn *); ...@@ -323,6 +323,7 @@ extern bool mips_linked_madd_p (rtx_insn *, rtx_insn *);
extern bool mips_store_data_bypass_p (rtx_insn *, rtx_insn *); extern bool mips_store_data_bypass_p (rtx_insn *, rtx_insn *);
extern int mips_dspalu_bypass_p (rtx, rtx); extern int mips_dspalu_bypass_p (rtx, rtx);
extern rtx mips_prefetch_cookie (rtx, rtx); extern rtx mips_prefetch_cookie (rtx, rtx);
extern rtx mips_loongson_ext2_prefetch_cookie (rtx, rtx);
extern const char *current_section_name (void); extern const char *current_section_name (void);
extern unsigned int current_section_flags (void); extern unsigned int current_section_flags (void);
......
...@@ -15142,6 +15142,22 @@ mips_prefetch_cookie (rtx write, rtx locality) ...@@ -15142,6 +15142,22 @@ mips_prefetch_cookie (rtx write, rtx locality)
/* store_retained / load_retained. */ /* store_retained / load_retained. */
return GEN_INT (INTVAL (write) + 6); return GEN_INT (INTVAL (write) + 6);
} }
/* Loongson EXT2 only implements perf hint=0 (prefetch for load) and hint=1
(prefetch for store), other hint just scale to hint = 0 and hint = 1. */
rtx
mips_loongson_ext2_prefetch_cookie (rtx write, rtx locality)
{
/* store. */
if (INTVAL (write) == 1)
return GEN_INT (INTVAL (write));
/* load. */
if (INTVAL (write) == 0)
return GEN_INT (INTVAL (write));
}
/* Flags that indicate when a built-in function is available. /* Flags that indicate when a built-in function is available.
...@@ -20171,6 +20187,18 @@ mips_option_override (void) ...@@ -20171,6 +20187,18 @@ mips_option_override (void)
if (TARGET_LOONGSON_MMI && !TARGET_HARD_FLOAT_ABI) if (TARGET_LOONGSON_MMI && !TARGET_HARD_FLOAT_ABI)
error ("%<-mloongson-mmi%> must be used with %<-mhard-float%>"); error ("%<-mloongson-mmi%> must be used with %<-mhard-float%>");
/* If TARGET_LOONGSON_EXT2, enable TARGET_LOONGSON_EXT. */
if (TARGET_LOONGSON_EXT2)
{
/* Make sure that when TARGET_LOONGSON_EXT2 is true, TARGET_LOONGSON_EXT
is true. If a user explicitly says -mloongson-ext2 -mno-loongson-ext
then that is an error. */
if (!TARGET_LOONGSON_EXT
&& !((target_flags_explicit & MASK_LOONGSON_EXT) == 0))
error ("%<-mloongson-ext2%> must be used with %<-mloongson-ext%>");
target_flags |= MASK_LOONGSON_EXT;
}
/* .eh_frame addresses should be the same width as a C pointer. /* .eh_frame addresses should be the same width as a C pointer.
Most MIPS ABIs support only one pointer size, so the assembler Most MIPS ABIs support only one pointer size, so the assembler
will usually know exactly how big an .eh_frame address is. will usually know exactly how big an .eh_frame address is.
......
...@@ -600,6 +600,13 @@ struct mips_cpu_info { ...@@ -600,6 +600,13 @@ struct mips_cpu_info {
if (TARGET_LOONGSON_EXT) \ if (TARGET_LOONGSON_EXT) \
{ \ { \
builtin_define ("__mips_loongson_ext"); \ builtin_define ("__mips_loongson_ext"); \
if (TARGET_LOONGSON_EXT2) \
{ \
builtin_define ("__mips_loongson_ext2"); \
builtin_define ("__mips_loongson_ext_rev=2"); \
} \
else \
builtin_define ("__mips_loongson_ext_rev=1"); \
} \ } \
\ \
/* Historical Octeon macro. */ \ /* Historical Octeon macro. */ \
...@@ -1134,6 +1141,9 @@ struct mips_cpu_info { ...@@ -1134,6 +1141,9 @@ struct mips_cpu_info {
/* ISA has count leading zeroes/ones instruction (not implemented). */ /* ISA has count leading zeroes/ones instruction (not implemented). */
#define ISA_HAS_CLZ_CLO (mips_isa_rev >= 1 && !TARGET_MIPS16) #define ISA_HAS_CLZ_CLO (mips_isa_rev >= 1 && !TARGET_MIPS16)
/* ISA has count tailing zeroes/ones instruction. */
#define ISA_HAS_CTZ_CTO (TARGET_LOONGSON_EXT2)
/* ISA has three operand multiply instructions that put /* ISA has three operand multiply instructions that put
the high part in an accumulator: mulhi or mulhiu. */ the high part in an accumulator: mulhi or mulhiu. */
#define ISA_HAS_MULHI ((TARGET_MIPS5400 \ #define ISA_HAS_MULHI ((TARGET_MIPS5400 \
...@@ -1195,7 +1205,9 @@ struct mips_cpu_info { ...@@ -1195,7 +1205,9 @@ struct mips_cpu_info {
'prefx', along with TARGET_HARD_FLOAT and TARGET_DOUBLE_FLOAT. 'prefx', along with TARGET_HARD_FLOAT and TARGET_DOUBLE_FLOAT.
(prefx is a cop1x instruction, so can only be used if FP is (prefx is a cop1x instruction, so can only be used if FP is
enabled.) */ enabled.) */
#define ISA_HAS_PREFETCHX ISA_HAS_FP4 #define ISA_HAS_PREFETCHX (ISA_HAS_FP4 \
|| TARGET_LOONGSON_EXT \
|| TARGET_LOONGSON_EXT2)
/* True if trunc.w.s and trunc.w.d are real (not synthetic) /* True if trunc.w.s and trunc.w.d are real (not synthetic)
instructions. Both require TARGET_HARD_FLOAT, and trunc.w.d instructions. Both require TARGET_HARD_FLOAT, and trunc.w.d
...@@ -1379,6 +1391,7 @@ struct mips_cpu_info { ...@@ -1379,6 +1391,7 @@ struct mips_cpu_info {
%{mmsa} %{mno-msa} \ %{mmsa} %{mno-msa} \
%{mloongson-mmi} %{mno-loongson-mmi} \ %{mloongson-mmi} %{mno-loongson-mmi} \
%{mloongson-ext} %{mno-loongson-ext} \ %{mloongson-ext} %{mno-loongson-ext} \
%{mloongson-ext2} %{mno-loongson-ext2} \
%{msmartmips} %{mno-smartmips} \ %{msmartmips} %{mno-smartmips} \
%{mmt} %{mno-mt} \ %{mmt} %{mno-mt} \
%{mfix-rm7000} %{mno-fix-rm7000} \ %{mfix-rm7000} %{mno-fix-rm7000} \
......
...@@ -3149,6 +3149,23 @@ ...@@ -3149,6 +3149,23 @@
;; ;;
;; ................... ;; ...................
;; ;;
;; Count tailing zeroes.
;;
;; ...................
;;
(define_insn "ctz<mode>2"
[(set (match_operand:GPR 0 "register_operand" "=d")
(ctz:GPR (match_operand:GPR 1 "register_operand" "d")))]
"ISA_HAS_CTZ_CTO"
"<d>ctz\t%0,%1"
[(set_attr "type" "clz")
(set_attr "mode" "<MODE>")])
;;
;; ...................
;;
;; Count number of set bits. ;; Count number of set bits.
;; ;;
;; ................... ;; ...................
...@@ -7136,13 +7153,20 @@ ...@@ -7136,13 +7153,20 @@
(match_operand 2 "const_int_operand" "n"))] (match_operand 2 "const_int_operand" "n"))]
"ISA_HAS_PREFETCH && TARGET_EXPLICIT_RELOCS" "ISA_HAS_PREFETCH && TARGET_EXPLICIT_RELOCS"
{ {
if (TARGET_LOONGSON_2EF || TARGET_LOONGSON_EXT) if (TARGET_LOONGSON_2EF || TARGET_LOONGSON_EXT || TARGET_LOONGSON_EXT2)
{ {
/* Loongson 2[ef] and Loongson 3a use load to $0 for prefetching. */ /* Loongson ext2 implementation pref insnstructions. */
if (TARGET_LOONGSON_EXT2)
{
operands[1] = mips_loongson_ext2_prefetch_cookie (operands[1],
operands[2]);
return "pref\t%1, %a0";
}
/* Loongson 2[ef] and Loongson ext use load to $0 for prefetching. */
if (TARGET_64BIT) if (TARGET_64BIT)
return "ld\t$0,%a0"; return "ld\t$0,%a0";
else else
return "lw\t$0,%a0"; return "lw\t$0,%a0";
} }
operands[1] = mips_prefetch_cookie (operands[1], operands[2]); operands[1] = mips_prefetch_cookie (operands[1], operands[2]);
return "pref\t%1,%a0"; return "pref\t%1,%a0";
...@@ -7156,6 +7180,21 @@ ...@@ -7156,6 +7180,21 @@
(match_operand 3 "const_int_operand" "n"))] (match_operand 3 "const_int_operand" "n"))]
"ISA_HAS_PREFETCHX && TARGET_HARD_FLOAT && TARGET_DOUBLE_FLOAT" "ISA_HAS_PREFETCHX && TARGET_HARD_FLOAT && TARGET_DOUBLE_FLOAT"
{ {
if (TARGET_LOONGSON_EXT || TARGET_LOONGSON_EXT2)
{
/* Loongson ext2 implementation pref insnstructions. */
if (TARGET_LOONGSON_EXT2)
{
operands[2] = mips_loongson_ext2_prefetch_cookie (operands[2],
operands[3]);
return "prefx\t%2,%1(%0)";
}
/* Loongson Loongson ext use index load to $0 for prefetching. */
if (TARGET_64BIT)
return "gsldx\t$0,0(%0,%1)";
else
return "gslwx\t$0,0(%0,%1)";
}
operands[2] = mips_prefetch_cookie (operands[2], operands[3]); operands[2] = mips_prefetch_cookie (operands[2], operands[3]);
return "prefx\t%2,%1(%0)"; return "prefx\t%2,%1(%0)";
} }
......
...@@ -467,3 +467,7 @@ Use Loongson MultiMedia extensions Instructions (MMI) instructions. ...@@ -467,3 +467,7 @@ Use Loongson MultiMedia extensions Instructions (MMI) instructions.
mloongson-ext mloongson-ext
Target Report Mask(LOONGSON_EXT) Target Report Mask(LOONGSON_EXT)
Use Loongson EXTension (EXT) instructions. Use Loongson EXTension (EXT) instructions.
mloongson-ext2
Target Report Mask(LOONGSON_EXT2)
Use Loongson EXTension R2 (EXT2) instructions.
...@@ -922,6 +922,7 @@ Objective-C and Objective-C++ Dialects}. ...@@ -922,6 +922,7 @@ Objective-C and Objective-C++ Dialects}.
-mmsa -mno-msa @gol -mmsa -mno-msa @gol
-mloongson-mmi -mno-loongson-mmi @gol -mloongson-mmi -mno-loongson-mmi @gol
-mloongson-ext -mno-loongson-ext @gol -mloongson-ext -mno-loongson-ext @gol
-mloongson-ext2 -mno-loongson-ext2 @gol
-mfpu=@var{fpu-type} @gol -mfpu=@var{fpu-type} @gol
-msmartmips -mno-smartmips @gol -msmartmips -mno-smartmips @gol
-mpaired-single -mno-paired-single -mdmx -mno-mdmx @gol -mpaired-single -mno-paired-single -mdmx -mno-mdmx @gol
...@@ -21300,6 +21301,12 @@ Use (do not use) the MIPS Loongson MultiMedia extensions Instructions (MMI). ...@@ -21300,6 +21301,12 @@ Use (do not use) the MIPS Loongson MultiMedia extensions Instructions (MMI).
@opindex mno-loongson-ext @opindex mno-loongson-ext
Use (do not use) the MIPS Loongson EXTensions (EXT) instructions. Use (do not use) the MIPS Loongson EXTensions (EXT) instructions.
@item -mloongson-ext2
@itemx -mno-loongson-ext2
@opindex mloongson-ext2
@opindex mno-loongson-ext2
Use (do not use) the MIPS Loongson EXTensions r2 (EXT2) instructions.
@item -mlong64 @item -mlong64
@opindex mlong64 @opindex mlong64
Force @code{long} types to be 64 bits wide. See @option{-mlong32} for Force @code{long} types to be 64 bits wide. See @option{-mlong32} for
2018-11-07 Chenghua Xu <paul.hua.gm@gmail.com> 2018-11-07 Chenghua Xu <paul.hua.gm@gmail.com>
* gcc.target/mips/loongson-ctz.c: New test.
* gcc.target/mips/loongson-dctz.c: Likewise.
* gcc.target/mips/mips.exp (mips_option_groups): Add
-mloongson-ext2 option.
2018-11-07 Chenghua Xu <paul.hua.gm@gmail.com>
* gcc.target/mips/mips.exp (mips_option_groups): Add * gcc.target/mips/mips.exp (mips_option_groups): Add
-mloongson-ext option. -mloongson-ext option.
(mips-dg-options): Add mips_option_dependency options (mips-dg-options): Add mips_option_dependency options
......
/* Test cases for Loongson EXT2 instrutions. */
/* { dg-do compile } */
/* { dg-options "-mloongson-ext2" } */
unsigned int foo(unsigned int x)
{
return __builtin_ctz (x);
}
/* { dg-final { scan-assembler "ctz\t" } } */
/* Test cases for Loongson EXT2 instrutions. */
/* { dg-do compile } */
/* { dg-options "-mloongson-ext2" } */
unsigned long long foo(unsigned long long x)
{
return __builtin_ctzl (x);
}
/* { dg-final { scan-assembler "dctz\t" } } */
...@@ -298,6 +298,7 @@ foreach option { ...@@ -298,6 +298,7 @@ foreach option {
msa msa
loongson-mmi loongson-mmi
loongson-ext loongson-ext
loongson-ext2
} { } {
lappend mips_option_groups $option "-m(no-|)$option" lappend mips_option_groups $option "-m(no-|)$option"
} }
......
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