Skip to content

R
riscv-gcc-1
Commit 8ae8bad7 by Chenghua Xu Committed by Chenghua Xu
Options

Add support for Loongson MMI instructions. 

gcc/
	* config.gcc (extra_headers): Add loongson-mmiintrin.h.
	* config/mips/loongson.md: Move to ...
	* config/mips/loongson-mmi.md: here; Adjustment.
	* config/mips/loongson.h: Move to ...
	State as deprecated. Include loongson-mmiintrin.h for back
	compatibility and warning.
	* config/mips/loongson-mmiintrin.h: ... here.
	* config/mips/mips.c (mips_hard_regno_mode_ok_uncached,
	mips_vector_mode_supported_p, AVAIL_NON_MIPS16): Use
	TARGET_LOONGSON_MMI instead of TARGET_LOONGSON_VECTORS.
	(mips_option_override): Make sure MMI use hard float;
	(mips_shift_truncation_mask, mips_expand_vpc_loongson_even_odd,
	mips_expand_vpc_loongson_pshufh, mips_expand_vpc_loongson_bcast,
	mips_expand_vector_init): Use TARGET_LOONGSON_MMI instead of
	TARGET_LOONGSON_VECTORS.
	* gcc/config/mips/mips.h (TARGET_LOONGSON_VECTORS): Delete.
	(TARGET_CPU_CPP_BUILTINS): Add __mips_loongson_mmi.
	(MIPS_ASE_DSP_SPEC, MIPS_ASE_LOONGSON_MMI_SPEC): New.
	(BASE_DRIVER_SELF_SPECS): march=loongson2e/2f/3a implies
	-mloongson-mmi.
	(SHIFT_COUNT_TRUNCATED): Use TARGET_LOONGSON_MMI instead of
	TARGET_LOONGSON_VECTORS.
	* gcc/config/mips/mips.md (MOVE64, MOVE128): Use
	TARGET_LOONGSON_MMI instead of TARGET_LOONGSON_VECTORS.
	(Loongson MMI patterns): Include loongson-mmi.md instead of
	loongson.md.
	* gcc/config/mips/mips.opt (-mloongson-mmi): New option.
	* gcc/doc/invoke.texi (-mloongson-mmi): Document.

gcc/testsuite/
	* gcc.target/mips/loongson-shift-count-truncated-1.c
	(dg-options): Run under -mloongson-mmi option.
	Include loongson-mmiintrin.h instead of loongson.h.
	* gcc.target/mips/loongson-simd.c: Likewise.
	* gcc.target/mips/mips.exp (mips_option_groups): Add
	-mloongson-mmi option.
	(mips-dg-options): Add mips_option_dependency options "-mips16" vs
	"-mno-loongson-mmi", "-mmicromips" vs "-mno-loongson-mmi",
	"-msoft-float" vs "-mno-loongson-mmi".
	(mips-dg-init): Add -mloongson-mmi option.
	* lib/target-supports.exp: Rename check_mips_loongson_hw_available
	to check_mips_loongson_mmi_hw_available.
	Rename check_effective_target_mips_loongson_runtime to
	check_effective_target_mips_loongson_mmi_runtime.
	(check_effective_target_vect_int): Use mips_loongson_mmi instead
	of mips_loongson when check et-is-effective-target.
	(add_options_for_mips_loongson_mmi): New proc.
	Rename check_effective_target_mips_loongson to
	check_effective_target_mips_loongson_mmi.
	(check_effective_target_vect_shift,
	check_effective_target_whole_vector_shift,
	check_effective_target_vect_no_int_min_max,
	check_effective_target_vect_no_align,
	check_effective_target_vect_short_mult,
	check_vect_support_and_set_flags):Use mips_loongson_mmi instead
	of mips_loongson when check et-is-effective-target.

From-SVN: r265862
parent 50258c4d
Showing with 163 additions and 56 deletions
gcc/ChangeLog
2018-11-07 Chenghua Xu <paul.hua.gm@gmail.com>
* config.gcc (extra_headers): Add loongson-mmiintrin.h.
* config/mips/loongson.md: Move to ...
* config/mips/loongson-mmi.md: here; Adjustment.
* config/mips/loongson.h: Move to ...
State as deprecated. Include loongson-mmiintrin.h for back
compatibility and warning.
* config/mips/loongson-mmiintrin.h: ... here.
* config/mips/mips.c (mips_hard_regno_mode_ok_uncached,
mips_vector_mode_supported_p, AVAIL_NON_MIPS16): Use
TARGET_LOONGSON_MMI instead of TARGET_LOONGSON_VECTORS.
(mips_option_override): Make sure MMI use hard float;
(mips_shift_truncation_mask, mips_expand_vpc_loongson_even_odd,
mips_expand_vpc_loongson_pshufh, mips_expand_vpc_loongson_bcast,
mips_expand_vector_init): Use TARGET_LOONGSON_MMI instead of
TARGET_LOONGSON_VECTORS.
* gcc/config/mips/mips.h (TARGET_LOONGSON_VECTORS): Delete.
(TARGET_CPU_CPP_BUILTINS): Add __mips_loongson_mmi.
(MIPS_ASE_DSP_SPEC, MIPS_ASE_LOONGSON_MMI_SPEC): New.
(BASE_DRIVER_SELF_SPECS): march=loongson2e/2f/3a implies
-mloongson-mmi.
(SHIFT_COUNT_TRUNCATED): Use TARGET_LOONGSON_MMI instead of
TARGET_LOONGSON_VECTORS.
* gcc/config/mips/mips.md (MOVE64, MOVE128): Use
TARGET_LOONGSON_MMI instead of TARGET_LOONGSON_VECTORS.
(Loongson MMI patterns): Include loongson-mmi.md instead of
loongson.md.
* gcc/config/mips/mips.opt (-mloongson-mmi): New option.
* gcc/doc/invoke.texi (-mloongson-mmi): Document.
2018-11-07 Richard Biener <rguenther@suse.de>
PR lto/87906
gcc/config.gcc
......@@ -458,7 +458,7 @@ microblaze*-*-*)
mips*-*-*)
cpu_type=mips
d_target_objs="mips-d.o"
extra_headers="loongson.h msa.h"
extra_headers="loongson.h loongson-mmiintrin.h msa.h"
extra_objs="frame-header-opt.o"
extra_options="${extra_options} g.opt fused-madd.opt mips/mips-tables.opt"
;;
......
gcc/config/mips/mips.c
......@@ -12797,8 +12797,9 @@ mips_hard_regno_mode_ok_uncached (unsigned int regno, machine_mode mode)
if (mode == CCFmode)
return !(TARGET_FLOATXX && (regno & 1) != 0);
/* Allow 64-bit vector modes for Loongson-2E/2F. */
if (TARGET_LOONGSON_VECTORS
/* Allow 64-bit vector modes for Loongson MultiMedia extensions
Instructions (MMI). */
if (TARGET_LOONGSON_MMI
&& (mode == V2SImode
|| mode == V4HImode
|| mode == V8QImode
......@@ -13368,7 +13369,7 @@ mips_vector_mode_supported_p (machine_mode mode)
case E_V2SImode:
case E_V4HImode:
case E_V8QImode:
return TARGET_LOONGSON_VECTORS;
return TARGET_LOONGSON_MMI;
default:
return MSA_SUPPORTED_MODE_P (mode);
......@@ -15203,7 +15204,7 @@ AVAIL_NON_MIPS16 (dspr2, TARGET_DSPR2)
AVAIL_NON_MIPS16 (dsp_32, !TARGET_64BIT && TARGET_DSP)
AVAIL_NON_MIPS16 (dsp_64, TARGET_64BIT && TARGET_DSP)
AVAIL_NON_MIPS16 (dspr2_32, !TARGET_64BIT && TARGET_DSPR2)
AVAIL_NON_MIPS16 (loongson, TARGET_LOONGSON_VECTORS)
AVAIL_NON_MIPS16 (loongson, TARGET_LOONGSON_MMI)
AVAIL_NON_MIPS16 (cache, TARGET_CACHE_BUILTIN)
AVAIL_NON_MIPS16 (msa, TARGET_MSA)
......@@ -20164,6 +20165,12 @@ mips_option_override (void)
TARGET_DSPR2 = false;
}
/* Make sure that when TARGET_LOONGSON_MMI is true, TARGET_HARD_FLOAT_ABI
is true. In o32 pairs of floating-point registers provide 64-bit
values. */
if (TARGET_LOONGSON_MMI && !TARGET_HARD_FLOAT_ABI)
error ("%<-mloongson-mmi%> must be used with %<-mhard-float%>");
/* .eh_frame addresses should be the same width as a C pointer.
Most MIPS ABIs support only one pointer size, so the assembler
will usually know exactly how big an .eh_frame address is.
......@@ -21149,12 +21156,12 @@ void mips_function_profiler (FILE *file)
/* Implement TARGET_SHIFT_TRUNCATION_MASK. We want to keep the default
behavior of TARGET_SHIFT_TRUNCATION_MASK for non-vector modes even
when TARGET_LOONGSON_VECTORS is true. */
when TARGET_LOONGSON_MMI is true. */
static unsigned HOST_WIDE_INT
mips_shift_truncation_mask (machine_mode mode)
{
if (TARGET_LOONGSON_VECTORS && VECTOR_MODE_P (mode))
if (TARGET_LOONGSON_MMI && VECTOR_MODE_P (mode))
return 0;
return GET_MODE_BITSIZE (mode) - 1;
......@@ -21255,7 +21262,7 @@ mips_expand_vpc_loongson_even_odd (struct expand_vec_perm_d *d)
unsigned i, odd, nelt = d->nelt;
rtx t0, t1, t2, t3;
if (!(TARGET_HARD_FLOAT && TARGET_LOONGSON_VECTORS))
if (!(TARGET_HARD_FLOAT && TARGET_LOONGSON_MMI))
return false;
/* Even-odd for V2SI/V2SFmode is matched by interleave directly. */
if (nelt < 4)
......@@ -21312,7 +21319,7 @@ mips_expand_vpc_loongson_pshufh (struct expand_vec_perm_d *d)
unsigned i, mask;
rtx rmask;
if (!(TARGET_HARD_FLOAT && TARGET_LOONGSON_VECTORS))
if (!(TARGET_HARD_FLOAT && TARGET_LOONGSON_MMI))
return false;
if (d->vmode != V4HImode)
return false;
......@@ -21364,7 +21371,7 @@ mips_expand_vpc_loongson_bcast (struct expand_vec_perm_d *d)
unsigned i, elt;
rtx t0, t1;
if (!(TARGET_HARD_FLOAT && TARGET_LOONGSON_VECTORS))
if (!(TARGET_HARD_FLOAT && TARGET_LOONGSON_MMI))
return false;
/* Note that we've already matched V2SI via punpck and V4HI via pshufh. */
if (d->vmode != V8QImode)
......@@ -21958,7 +21965,7 @@ mips_expand_vector_init (rtx target, rtx vals)
}
/* Loongson is the only cpu with vectors with more elements. */
gcc_assert (TARGET_HARD_FLOAT && TARGET_LOONGSON_VECTORS);
gcc_assert (TARGET_HARD_FLOAT && TARGET_LOONGSON_MMI);
/* If all values are identical, broadcast the value. */
if (all_same)
......
gcc/config/mips/mips.h
......@@ -319,13 +319,6 @@ struct mips_cpu_info {
#define TUNE_I6400 (mips_tune == PROCESSOR_I6400)
#define TUNE_P6600 (mips_tune == PROCESSOR_P6600)
/* Whether vector modes and intrinsics for ST Microelectronics
Loongson-2E/2F processors should be enabled. In o32 pairs of
floating-point registers provide 64-bit values. */
#define TARGET_LOONGSON_VECTORS (TARGET_HARD_FLOAT_ABI \
&& (TARGET_LOONGSON_2EF \
|| TARGET_LOONGSON_3A))
/* True if the pre-reload scheduler should try to create chains of
multiply-add or multiply-subtract instructions. For example,
suppose we have:
......@@ -596,9 +589,12 @@ struct mips_cpu_info {
if (TARGET_ABICALLS) \
builtin_define ("__mips_abicalls"); \
\
/* Whether Loongson vector modes are enabled. */ \
if (TARGET_LOONGSON_VECTORS) \
builtin_define ("__mips_loongson_vector_rev"); \
/* Whether Loongson vector modes are enabled. */ \
if (TARGET_LOONGSON_MMI) \
{ \
builtin_define ("__mips_loongson_vector_rev"); \
builtin_define ("__mips_loongson_mmi"); \
} \
\
/* Historical Octeon macro. */ \
if (TARGET_OCTEON) \
......@@ -880,14 +876,23 @@ struct mips_cpu_info {
/* A spec that infers the:
-mnan=2008 setting from a -mips argument,
-mdsp setting from a -march argument. */
#define BASE_DRIVER_SELF_SPECS \
MIPS_ISA_NAN2008_SPEC, \
-mdsp setting from a -march argument.
-mloongson-mmi setting from a -march argument. */
#define BASE_DRIVER_SELF_SPECS \
MIPS_ISA_NAN2008_SPEC, \
MIPS_ASE_DSP_SPEC, \
MIPS_ASE_LOONGSON_MMI_SPEC
#define MIPS_ASE_DSP_SPEC \
"%{!mno-dsp: \
%{march=24ke*|march=34kc*|march=34kf*|march=34kx*|march=1004k* \
|march=interaptiv: -mdsp} \
%{march=74k*|march=m14ke*: %{!mno-dspr2: -mdspr2 -mdsp}}}"
#define MIPS_ASE_LOONGSON_MMI_SPEC \
"%{!mno-loongson-mmi: \
%{march=loongson2e|march=loongson2f|march=loongson3a: -mloongson-mmi}}"
#define DRIVER_SELF_SPECS \
MIPS_ISA_LEVEL_SPEC, \
BASE_DRIVER_SELF_SPECS
......@@ -1361,6 +1366,7 @@ struct mips_cpu_info {
%{mcrc} %{mno-crc} \
%{mginv} %{mno-ginv} \
%{mmsa} %{mno-msa} \
%{mloongson-mmi} %{mno-loongson-mmi} \
%{msmartmips} %{mno-smartmips} \
%{mmt} %{mno-mt} \
%{mfix-rm7000} %{mno-fix-rm7000} \
......@@ -2638,9 +2644,9 @@ typedef struct mips_args {
#define SLOW_BYTE_ACCESS (!TARGET_MIPS16)
/* Standard MIPS integer shifts truncate the shift amount to the
width of the shifted operand. However, Loongson vector shifts
width of the shifted operand. However, Loongson MMI shifts
do not truncate the shift amount at all. */
#define SHIFT_COUNT_TRUNCATED (!TARGET_LOONGSON_VECTORS)
#define SHIFT_COUNT_TRUNCATED (!TARGET_LOONGSON_MMI)
/* Specify the machine mode that pointers have.
......
gcc/config/mips/mips.md
......@@ -834,9 +834,9 @@
(define_mode_iterator MOVE64
[DI DF
(V2SF "TARGET_HARD_FLOAT && TARGET_PAIRED_SINGLE_FLOAT")
(V2SI "TARGET_HARD_FLOAT && TARGET_LOONGSON_VECTORS")
(V4HI "TARGET_HARD_FLOAT && TARGET_LOONGSON_VECTORS")
(V8QI "TARGET_HARD_FLOAT && TARGET_LOONGSON_VECTORS")])
(V2SI "TARGET_HARD_FLOAT && TARGET_LOONGSON_MMI")
(V4HI "TARGET_HARD_FLOAT && TARGET_LOONGSON_MMI")
(V8QI "TARGET_HARD_FLOAT && TARGET_LOONGSON_MMI")])
;; 128-bit modes for which we provide move patterns on 64-bit targets.
(define_mode_iterator MOVE128 [TI TF])
......@@ -863,9 +863,9 @@
[(DF "!TARGET_64BIT && TARGET_DOUBLE_FLOAT")
(DI "!TARGET_64BIT && TARGET_DOUBLE_FLOAT")
(V2SF "!TARGET_64BIT && TARGET_PAIRED_SINGLE_FLOAT")
(V2SI "!TARGET_64BIT && TARGET_LOONGSON_VECTORS")
(V4HI "!TARGET_64BIT && TARGET_LOONGSON_VECTORS")
(V8QI "!TARGET_64BIT && TARGET_LOONGSON_VECTORS")
(V2SI "!TARGET_64BIT && TARGET_LOONGSON_MMI")
(V4HI "!TARGET_64BIT && TARGET_LOONGSON_MMI")
(V8QI "!TARGET_64BIT && TARGET_LOONGSON_MMI")
(TF "TARGET_64BIT && TARGET_FLOAT64")])
;; In GPR templates, a string like "<d>subu" will expand to "subu" in the
......@@ -7690,8 +7690,8 @@
; microMIPS patterns.
(include "micromips.md")
; ST-Microelectronics Loongson-2E/2F-specific patterns.
(include "loongson.md")
; Loongson MultiMedia extensions Instructions (MMI) patterns.
(include "loongson-mmi.md")
; The MIPS MSA Instructions.
(include "mips-msa.md")
......
gcc/config/mips/mips.opt
......@@ -459,3 +459,7 @@ Enum(mips_cb_setting) String(optimal) Value(MIPS_CB_OPTIMAL)
EnumValue
Enum(mips_cb_setting) String(always) Value(MIPS_CB_ALWAYS)
mloongson-mmi
Target Report Mask(LOONGSON_MMI)
Use Loongson MultiMedia extensions Instructions (MMI) instructions.
gcc/doc/invoke.texi
......@@ -920,6 +920,7 @@ Objective-C and Objective-C++ Dialects}.
-mginv -mno-ginv @gol
-mmicromips -mno-micromips @gol
-mmsa -mno-msa @gol
-mloongson-mmi -mno-loongson-mmi @gol
-mfpu=@var{fpu-type} @gol
-msmartmips -mno-smartmips @gol
-mpaired-single -mno-paired-single -mdmx -mno-mdmx @gol
......@@ -21286,6 +21287,12 @@ Use (do not use) the MIPS Cyclic Redundancy Check (CRC) instructions.
@opindex mno-ginv
Use (do not use) the MIPS Global INValidate (GINV) instructions.
@item -mloongson-mmi
@itemx -mno-loongson-mmi
@opindex mloongson-mmi
@opindex mno-loongson-mmi
Use (do not use) the MIPS Loongson MultiMedia extensions Instructions (MMI).
@item -mlong64
@opindex mlong64
Force @code{long} types to be 64 bits wide. See @option{-mlong32} for
gcc/testsuite/ChangeLog
2018-11-07 Chenghua Xu <paul.hua.gm@gmail.com>
* gcc.target/mips/loongson-shift-count-truncated-1.c
(dg-options): Run under -mloongson-mmi option.
Include loongson-mmiintrin.h instead of loongson.h.
* gcc.target/mips/loongson-simd.c: Likewise.
* gcc.target/mips/mips.exp (mips_option_groups): Add
-mloongson-mmi option.
(mips-dg-options): Add mips_option_dependency options "-mips16" vs
"-mno-loongson-mmi", "-mmicromips" vs "-mno-loongson-mmi",
"-msoft-float" vs "-mno-loongson-mmi".
(mips-dg-init): Add -mloongson-mmi option.
* lib/target-supports.exp: Rename check_mips_loongson_hw_available
to check_mips_loongson_mmi_hw_available.
Rename check_effective_target_mips_loongson_runtime to
check_effective_target_mips_loongson_mmi_runtime.
(check_effective_target_vect_int): Use mips_loongson_mmi instead
of mips_loongson when check et-is-effective-target.
(add_options_for_mips_loongson_mmi): New proc.
Rename check_effective_target_mips_loongson to
check_effective_target_mips_loongson_mmi.
(check_effective_target_vect_shift,
check_effective_target_whole_vector_shift,
check_effective_target_vect_no_int_min_max,
check_effective_target_vect_no_align,
check_effective_target_vect_short_mult,
check_vect_support_and_set_flags):Use mips_loongson_mmi instead
of mips_loongson when check et-is-effective-target.
2018-11-07 Richard Biener <rguenther@suse.de>
PR lto/87906
......
gcc/testsuite/gcc.target/mips/loongson-shift-count-truncated-1.c
......@@ -4,11 +4,11 @@
/* loongson.h does not handle or check for MIPS16ness. There doesn't
seem any good reason for it to, given that the Loongson processors
do not support MIPS16. */
/* { dg-options "isa=loongson -mhard-float -mno-mips16 (REQUIRES_STDLIB)" } */
/* { dg-options "-mloongson-mmi -mhard-float -mno-mips16 (REQUIRES_STDLIB)" } */
/* See PR 52155. */
/* { dg-options "isa=loongson -mhard-float -mno-mips16 -mlong64" { mips*-*-elf* && ilp32 } } */
/* { dg-options "-mloongson-mmi -mhard-float -mno-mips16 -mlong64" { mips*-*-elf* && ilp32 } } */
#include "loongson.h"
#include "loongson-mmiintrin.h"
#include <assert.h>
typedef union { int32x2_t v; int32_t a[2]; } int32x2_encap_t;
......
gcc/testsuite/gcc.target/mips/loongson-simd.c
......@@ -26,9 +26,9 @@ along with GCC; see the file COPYING3. If not see
because inclusion of some system headers e.g. stdint.h will fail due to not
finding stubs-o32_hard.h. */
/* { dg-require-effective-target mips_nanlegacy } */
/* { dg-options "isa=loongson -mhard-float -mno-micromips -mno-mips16 -flax-vector-conversions (REQUIRES_STDLIB)" } */
/* { dg-options "-mloongson-mmi -mhard-float -mno-micromips -mno-mips16 -flax-vector-conversions (REQUIRES_STDLIB)" } */
#include "loongson.h"
#include "loongson-mmiintrin.h"
#include <stdio.h>
#include <stdint.h>
#include <assert.h>
......
gcc/testsuite/gcc.target/mips/mips.exp
......@@ -296,6 +296,7 @@ foreach option {
mcount-ra-address
odd-spreg
msa
loongson-mmi
} {
lappend mips_option_groups $option "-m(no-|)$option"
}
......@@ -883,6 +884,12 @@ proc mips-dg-init {} {
"-mno-msa"
#endif
#ifdef __mips_loongson_mmi
"-mloongson-mmi"
#else
"-mno-loongson-mmi"
#endif
0
};
} 0]
......@@ -1045,6 +1052,9 @@ proc mips-dg-options { args } {
mips_option_dependency options "-mno-plt" "addressing=unknown"
mips_option_dependency options "-mabicalls" "-G0"
mips_option_dependency options "-mno-gpopt" "-mexplicit-relocs"
mips_option_dependency options "-mips16" "-mno-loongson-mmi"
mips_option_dependency options "-mmicromips" "-mno-loongson-mmi"
mips_option_dependency options "-msoft-float" "-mno-loongson-mmi"
# Work out information about the current ABI.
set abi_test_option_p [mips_test_option_p options abi]
......
gcc/testsuite/lib/target-supports.exp
......@@ -1896,20 +1896,20 @@ proc check_mpaired_single_hw_available { } {
# Return 1 if the target supports executing Loongson vector instructions,
# 0 otherwise. Cache the result.
proc check_mips_loongson_hw_available { } {
return [check_cached_effective_target mips_loongson_hw_available {
proc check_mips_loongson_mmi_hw_available { } {
return [check_cached_effective_target mips_loongson_mmi_hw_available {
# If this is not the right target then we can skip the test.
if { !([istarget mips*-*-*]) } {
expr 0
} else {
check_runtime_nocache mips_loongson_hw_available {
#include <loongson.h>
check_runtime_nocache mips_loongson_mmi_hw_available {
#include <loongson-mmiintrin.h>
int main()
{
asm volatile ("paddw $f2,$f4,$f6");
return 0;
}
} ""
} "-mloongson-mmi"
}
}]
}
......@@ -1963,9 +1963,9 @@ proc check_effective_target_mpaired_single_runtime { } {
# Return 1 if the target supports running Loongson executables, 0 otherwise.
proc check_effective_target_mips_loongson_runtime { } {
if { [check_effective_target_mips_loongson]
&& [check_mips_loongson_hw_available] } {
proc check_effective_target_mips_loongson_mmi_runtime { } {
if { [check_effective_target_mips_loongson_mmi]
&& [check_mips_loongson_mmi_hw_available] } {
return 1
}
return 0
......@@ -3085,7 +3085,7 @@ proc check_effective_target_vect_int { } {
|| [istarget aarch64*-*-*]
|| [is-effective-target arm_neon]
|| ([istarget mips*-*-*]
&& ([et-is-effective-target mips_loongson]
&& ([et-is-effective-target mips_loongson_mmi]
|| [et-is-effective-target mips_msa]))
|| ([istarget s390*-*-*]
&& [check_effective_target_s390_vx])
......@@ -4708,11 +4708,24 @@ proc add_options_for_mips_msa { flags } {
return "$flags -mmsa"
}
# Add the options needed for MIPS Loongson MMI Architecture.
proc add_options_for_mips_loongson_mmi { flags } {
if { ! [check_effective_target_mips_loongson_mmi] } {
return "$flags"
}
return "$flags -mloongson-mmi"
}
# Return 1 if this a Loongson-2E or -2F target using an ABI that supports
# the Loongson vector modes.
proc check_effective_target_mips_loongson { } {
proc check_effective_target_mips_loongson_mmi { } {
return [check_no_compiler_messages loongson assembly {
#if !defined(__mips_loongson_mmi)
#error !__mips_loongson_mmi
#endif
#if !defined(__mips_loongson_vector_rev)
#error !__mips_loongson_vector_rev
#endif
......@@ -5311,7 +5324,7 @@ proc check_effective_target_vect_shift { } {
|| [is-effective-target arm_neon]
|| ([istarget mips*-*-*]
&& ([et-is-effective-target mips_msa]
|| [et-is-effective-target mips_loongson]))
|| [et-is-effective-target mips_loongson_mmi]))
|| ([istarget s390*-*-*]
&& [check_effective_target_s390_vx]) }}]
}
......@@ -5324,7 +5337,7 @@ proc check_effective_target_whole_vector_shift { } {
|| ([is-effective-target arm_neon]
&& [check_effective_target_arm_little_endian])
|| ([istarget mips*-*-*]
&& [et-is-effective-target mips_loongson])
&& [et-is-effective-target mips_loongson_mmi])
|| ([istarget s390*-*-*]
&& [check_effective_target_s390_vx]) } {
set answer 1
......@@ -5464,7 +5477,7 @@ proc check_effective_target_vect_no_int_min_max { } {
|| [istarget spu-*-*]
|| [istarget alpha*-*-*]
|| ([istarget mips*-*-*]
&& [et-is-effective-target mips_loongson]) }}]
&& [et-is-effective-target mips_loongson_mmi]) }}]
}
# Return 1 if the target plus current options does not support a vector
......@@ -5933,7 +5946,7 @@ proc check_effective_target_vect_no_align { } {
|| [check_effective_target_arm_vect_no_misalign]
|| ([istarget powerpc*-*-*] && [check_p8vector_hw_available])
|| ([istarget mips*-*-*]
&& [et-is-effective-target mips_loongson]) }}]
&& [et-is-effective-target mips_loongson_mmi]) }}]
}
# Return 1 if the target supports a vector misalign access, 0 otherwise.
......@@ -6167,7 +6180,7 @@ proc check_effective_target_vect_short_mult { } {
|| [check_effective_target_arm32]
|| ([istarget mips*-*-*]
&& ([et-is-effective-target mips_msa]
|| [et-is-effective-target mips_loongson]))
|| [et-is-effective-target mips_loongson_mmi]))
|| ([istarget s390*-*-*]
&& [check_effective_target_s390_vx]) }}]
}
......@@ -8155,8 +8168,8 @@ proc check_vect_support_and_set_flags { } {
if { [check_effective_target_mpaired_single] } {
lappend EFFECTIVE_TARGETS mpaired_single
}
if { [check_effective_target_mips_loongson] } {
lappend EFFECTIVE_TARGETS mips_loongson
if { [check_effective_target_mips_loongson_mmi] } {
lappend EFFECTIVE_TARGETS mips_loongson_mmi
}
if { [check_effective_target_mips_msa] } {
lappend EFFECTIVE_TARGETS mips_msa
......
Markdown is supported
0% or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment