1. 22 Jul, 2015 9 commits
    • Add -march=interaptiv. · 8ced5d2d
      gcc/
      	* config/mips/mips-cpus.def (interaptiv): Define.
      	* config/mips/mips-tables.opt: Regenerate.
      	* config/mips/mips.h (MIPS_ISA_LEVEL_SPEC): Map -march=interaptiv to
      	-mips32r2.
      	(BASE_DRIVER_SELF_SPECS): Likewise but map to -mdsp.
      	* doc/invoke.texi (-march=@var{arch}): Add interaptiv.
      
      From-SVN: r226065
      Robert Suchanek committed
    • [AArch64] PR target/63521 Define REG_ALLOC_ORDER · 38996bc9
      2015-07-22  Jiong Wang  <jiong.wang@arm.com>
       
      gcc/
        PR target/63521
        * config/aarch64/aarch64.h (REG_ALLOC_ORDER): Define.
        (HONOR_REG_ALLOC_ORDER): Define.
      
      From-SVN: r226064
      Jiong Wang committed
    • linux-atomic.c (<asm/unistd.h>): Remove #include. · 20ca17e4
      2015-07-22  Chung-Lin Tang  <cltang@codesourcery.com>
      
      	libgcc/
      	* config/nios2/linux-atomic.c (<asm/unistd.h>): Remove #include.
      	(EFAULT,EBUSY,ENOSYS): Delete unused #defines.
      
      From-SVN: r226063
      Chung-Lin Tang committed
    • re PR tree-optimization/66952 (wrong code at -O2 and -O3 on x86_64-linux-gnu) · 8bb8e838
      2015-07-22  Richard Biener  <rguenther@suse.de>
      
      	PR tree-optimization/66952
      	* tree-ssa-ifcombine.c (pass_tree_ifcombine::execute): For
      	blocks we end up executing unconditionally reset all SSA
      	info such as range and alignment.
      	* tree-ssanames.h (reset_flow_sensitive_info): Declare.
      	* tree-ssanames.c (reset_flow_sensitive_info): New function.
      
      	* gcc.dg/torture/pr66952.c: New testcase.
      
      From-SVN: r226062
      Richard Biener committed
    • aarch64-simd.md (vec_store_lanesoi_lane<mode>): Fix typo in attribute. · b1db706a
      2015-07-22  Charles Baylis  <charles.baylis@linaro.org>
      
      	* config/aarch64/aarch64-simd.md (vec_store_lanesoi_lane<mode>): Fix
      	typo in attribute.
      
      From-SVN: r226061
      Charles Baylis committed
    • genmatch.c (parser::parse_result): Properly handle match with result operands and conditions. · d3b0b692
      2015-07-22  Richard Biener  <rguenther@suse.de>
      
      	* genmatch.c (parser::parse_result): Properly handle
      	match with result operands and conditions.
      
      From-SVN: r226060
      Richard Biener committed
    • re PR target/63870 ([Aarch64] [ARM] Errors in use of NEON intrinsics are reported incorrectly) · 4d0a0237
      gcc/ChangeLog:
      
      2015-07-22  Charles Baylis  <charles.baylis@linaro.org>
      
      	PR target/63870
      	* config/aarch64/aarch64-builtins.c (enum aarch64_type_qualifiers):
      	Add qualifier_struct_load_store_lane_index.
      	(aarch64_types_loadstruct_lane_qualifiers): Use
      	qualifier_struct_load_store_lane_index for lane index argument for
      	last argument.
      	(aarch64_types_storestruct_lane_qualifiers): Ditto.
      	(builtin_simd_arg): Add SIMD_ARG_STRUCT_LOAD_STORE_LANE_INDEX.
      	(aarch64_simd_expand_args): Add new argument describing mode of
      	builtin. Check lane bounds for arguments with
      	SIMD_ARG_STRUCT_LOAD_STORE_LANE_INDEX.
      	(aarch64_simd_expand_builtin): Emit error for incorrect lane indices
      	if marked with SIMD_ARG_STRUCT_LOAD_STORE_LANE_INDEX.
      	(aarch64_simd_expand_builtin): Handle arguments with
      	qualifier_struct_load_store_lane_index. Pass machine mode of builtin to
      	aarch64_simd_expand_args.
      	* config/aarch64/aarch64-simd-builtins.def: Declare ld[234]_lane and
      	vst[234]_lane with BUILTIN_VALLDIF.
      	* config/aarch64/aarch64-simd.md:
      	(aarch64_vec_load_lanesoi_lane<mode>): Use VALLDIF iterator. Perform
      	endianness reversal on lane index.
      	(aarch64_vec_load_lanesci_lane<mode>): Ditto.
      	(aarch64_vec_load_lanesxi_lane<mode>): Ditto.
      	(vec_store_lanesoi_lane<mode>): Use VALLDIF iterator.
      	(vec_store_lanesci_lane<mode>): Ditto.
      	(vec_store_lanesxi_lane<mode>): Ditto.
      	(aarch64_ld2_lane<mode>): Use VALLDIF iterator. Remove endianness
      	reversal of lane index.
      	(aarch64_ld3_lane<mode>): Ditto.
      	(aarch64_ld4_lane<mode>): Ditto.
      	(aarch64_st2_lane<mode>): Ditto.
      	(aarch64_st3_lane<mode>): Ditto.
      	(aarch64_st4_lane<mode>): Ditto.
      	* config/aarch64/arm_neon.h (__LD2_LANE_FUNC): Rename mode parameter
      	to qmode. Add new mode parameter. Update uses.
             	(__LD3_LANE_FUNC): Ditto.
      	(__LD4_LANE_FUNC): Ditto.
      	(__ST2_LANE_FUNC): Ditto.
      	(__ST3_LANE_FUNC): Ditto.
      	(__ST4_LANE_FUNC): Ditto.
      
      gcc/testsuite/ChangeLog:
      
      2015-07-22  Charles Baylis  <charles.baylis@linaro.org>
      
              * gcc.target/aarch64/advsimd-intrinsics/vld2_lane_f32_indices_1.c: New
      	test.
              * gcc.target/aarch64/advsimd-intrinsics/vld2_lane_f64_indices_1.c: New
      	test.
              * gcc.target/aarch64/advsimd-intrinsics/vld2_lane_p8_indices_1.c: New
      	test.
              * gcc.target/aarch64/advsimd-intrinsics/vld2_lane_s16_indices_1.c: New
      	test.
              * gcc.target/aarch64/advsimd-intrinsics/vld2_lane_s32_indices_1.c: New
      	test.
              * gcc.target/aarch64/advsimd-intrinsics/vld2_lane_s64_indices_1.c: New
      	test.
              * gcc.target/aarch64/advsimd-intrinsics/vld2_lane_s8_indices_1.c: New
      	test.
              * gcc.target/aarch64/advsimd-intrinsics/vld2_lane_u16_indices_1.c: New
      	test.
              * gcc.target/aarch64/advsimd-intrinsics/vld2_lane_u32_indices_1.c: New
      	test.
              * gcc.target/aarch64/advsimd-intrinsics/vld2_lane_u64_indices_1.c: New
      	test.
              * gcc.target/aarch64/advsimd-intrinsics/vld2_lane_u8_indices_1.c: New
      	test.
              * gcc.target/aarch64/advsimd-intrinsics/vld2q_lane_f32_indices_1.c: New
      	test.
              * gcc.target/aarch64/advsimd-intrinsics/vld2q_lane_f64_indices_1.c: New
      	test.
              * gcc.target/aarch64/advsimd-intrinsics/vld2q_lane_p8_indices_1.c: New
      	test.
              * gcc.target/aarch64/advsimd-intrinsics/vld2q_lane_s16_indices_1.c: New
      	test.
              * gcc.target/aarch64/advsimd-intrinsics/vld2q_lane_s32_indices_1.c: New
      	test.
              * gcc.target/aarch64/advsimd-intrinsics/vld2q_lane_s64_indices_1.c: New
      	test.
              * gcc.target/aarch64/advsimd-intrinsics/vld2q_lane_s8_indices_1.c: New
      	test.
              * gcc.target/aarch64/advsimd-intrinsics/vld2q_lane_u16_indices_1.c: New
      	test.
              * gcc.target/aarch64/advsimd-intrinsics/vld2q_lane_u32_indices_1.c: New
      	test.
              * gcc.target/aarch64/advsimd-intrinsics/vld2q_lane_u64_indices_1.c: New
      	test.
              * gcc.target/aarch64/advsimd-intrinsics/vld2q_lane_u8_indices_1.c: New
      	test.
              * gcc.target/aarch64/advsimd-intrinsics/vld3_lane_f32_indices_1.c: New
      	test.
              * gcc.target/aarch64/advsimd-intrinsics/vld3_lane_f64_indices_1.c: New
      	test.
              * gcc.target/aarch64/advsimd-intrinsics/vld3_lane_p8_indices_1.c: New
      	test.
              * gcc.target/aarch64/advsimd-intrinsics/vld3_lane_s16_indices_1.c: New
      	test.
              * gcc.target/aarch64/advsimd-intrinsics/vld3_lane_s32_indices_1.c: New
      	test.
              * gcc.target/aarch64/advsimd-intrinsics/vld3_lane_s64_indices_1.c: New
      	test.
              * gcc.target/aarch64/advsimd-intrinsics/vld3_lane_s8_indices_1.c: New
      	test.
              * gcc.target/aarch64/advsimd-intrinsics/vld3_lane_u16_indices_1.c: New
      	test.
              * gcc.target/aarch64/advsimd-intrinsics/vld3_lane_u32_indices_1.c: New
      	test.
              * gcc.target/aarch64/advsimd-intrinsics/vld3_lane_u64_indices_1.c: New
      	test.
              * gcc.target/aarch64/advsimd-intrinsics/vld3_lane_u8_indices_1.c: New
      	test.
              * gcc.target/aarch64/advsimd-intrinsics/vld3q_lane_f32_indices_1.c: New
      	test.
              * gcc.target/aarch64/advsimd-intrinsics/vld3q_lane_f64_indices_1.c: New
      	test.
              * gcc.target/aarch64/advsimd-intrinsics/vld3q_lane_p8_indices_1.c: New
      	test.
              * gcc.target/aarch64/advsimd-intrinsics/vld3q_lane_s16_indices_1.c: New
      	test.
              * gcc.target/aarch64/advsimd-intrinsics/vld3q_lane_s32_indices_1.c: New
      	test.
              * gcc.target/aarch64/advsimd-intrinsics/vld3q_lane_s64_indices_1.c: New
      	test.
              * gcc.target/aarch64/advsimd-intrinsics/vld3q_lane_s8_indices_1.c: New
      	test.
              * gcc.target/aarch64/advsimd-intrinsics/vld3q_lane_u16_indices_1.c: New
      	test.
              * gcc.target/aarch64/advsimd-intrinsics/vld3q_lane_u32_indices_1.c: New
      	test.
              * gcc.target/aarch64/advsimd-intrinsics/vld3q_lane_u64_indices_1.c: New
      	test.
              * gcc.target/aarch64/advsimd-intrinsics/vld3q_lane_u8_indices_1.c: New
      	test.
              * gcc.target/aarch64/advsimd-intrinsics/vld4_lane_f32_indices_1.c: New
      	test.
              * gcc.target/aarch64/advsimd-intrinsics/vld4_lane_f64_indices_1.c: New
      	test.
              * gcc.target/aarch64/advsimd-intrinsics/vld4_lane_p8_indices_1.c: New
      	test.
              * gcc.target/aarch64/advsimd-intrinsics/vld4_lane_s16_indices_1.c: New
      	test.
              * gcc.target/aarch64/advsimd-intrinsics/vld4_lane_s32_indices_1.c: New
      	test.
              * gcc.target/aarch64/advsimd-intrinsics/vld4_lane_s64_indices_1.c: New
      	test.
              * gcc.target/aarch64/advsimd-intrinsics/vld4_lane_s8_indices_1.c: New
      	test.
              * gcc.target/aarch64/advsimd-intrinsics/vld4_lane_u16_indices_1.c: New
      	test.
              * gcc.target/aarch64/advsimd-intrinsics/vld4_lane_u32_indices_1.c: New
      	test.
              * gcc.target/aarch64/advsimd-intrinsics/vld4_lane_u64_indices_1.c: New
      	test.
              * gcc.target/aarch64/advsimd-intrinsics/vld4_lane_u8_indices_1.c: New
      	test.
              * gcc.target/aarch64/advsimd-intrinsics/vld4q_lane_f32_indices_1.c: New
      	test.
              * gcc.target/aarch64/advsimd-intrinsics/vld4q_lane_f64_indices_1.c: New
      	test.
              * gcc.target/aarch64/advsimd-intrinsics/vld4q_lane_p8_indices_1.c: New
      	test.
              * gcc.target/aarch64/advsimd-intrinsics/vld4q_lane_s16_indices_1.c: New
      	test.
              * gcc.target/aarch64/advsimd-intrinsics/vld4q_lane_s32_indices_1.c: New
      	test.
              * gcc.target/aarch64/advsimd-intrinsics/vld4q_lane_s64_indices_1.c: New
      	test.
              * gcc.target/aarch64/advsimd-intrinsics/vld4q_lane_s8_indices_1.c: New
      	test.
              * gcc.target/aarch64/advsimd-intrinsics/vld4q_lane_u16_indices_1.c: New
      	test.
              * gcc.target/aarch64/advsimd-intrinsics/vld4q_lane_u32_indices_1.c: New
      	test.
              * gcc.target/aarch64/advsimd-intrinsics/vld4q_lane_u64_indices_1.c: New
      	test.
              * gcc.target/aarch64/advsimd-intrinsics/vld4q_lane_u8_indices_1.c: New
      	test.
              * gcc.target/aarch64/advsimd-intrinsics/vst2_lane_f32_indices_1.c: New
      	test.
              * gcc.target/aarch64/advsimd-intrinsics/vst2_lane_f64_indices_1.c: New
      	test.
              * gcc.target/aarch64/advsimd-intrinsics/vst2_lane_p8_indices_1.c: New
      	test.
              * gcc.target/aarch64/advsimd-intrinsics/vst2_lane_s16_indices_1.c: New
      	test.
              * gcc.target/aarch64/advsimd-intrinsics/vst2_lane_s32_indices_1.c: New
      	test.
              * gcc.target/aarch64/advsimd-intrinsics/vst2_lane_s64_indices_1.c: New
      	test.
              * gcc.target/aarch64/advsimd-intrinsics/vst2_lane_s8_indices_1.c: New
      	test.
              * gcc.target/aarch64/advsimd-intrinsics/vst2_lane_u16_indices_1.c: New
      	test.
              * gcc.target/aarch64/advsimd-intrinsics/vst2_lane_u32_indices_1.c: New
      	test.
              * gcc.target/aarch64/advsimd-intrinsics/vst2_lane_u64_indices_1.c: New
      	test.
              * gcc.target/aarch64/advsimd-intrinsics/vst2_lane_u8_indices_1.c: New
      	test.
              * gcc.target/aarch64/advsimd-intrinsics/vst2q_lane_f32_indices_1.c: New
      	test.
              * gcc.target/aarch64/advsimd-intrinsics/vst2q_lane_f64_indices_1.c: New
      	test.
              * gcc.target/aarch64/advsimd-intrinsics/vst2q_lane_p8_indices_1.c: New
      	test.
              * gcc.target/aarch64/advsimd-intrinsics/vst2q_lane_s16_indices_1.c: New
      	test.
              * gcc.target/aarch64/advsimd-intrinsics/vst2q_lane_s32_indices_1.c: New
      	test.
              * gcc.target/aarch64/advsimd-intrinsics/vst2q_lane_s64_indices_1.c: New
      	test.
              * gcc.target/aarch64/advsimd-intrinsics/vst2q_lane_s8_indices_1.c: New
      	test.
              * gcc.target/aarch64/advsimd-intrinsics/vst2q_lane_u16_indices_1.c: New
      	test.
              * gcc.target/aarch64/advsimd-intrinsics/vst2q_lane_u32_indices_1.c: New
      	test.
              * gcc.target/aarch64/advsimd-intrinsics/vst2q_lane_u64_indices_1.c: New
      	test.
              * gcc.target/aarch64/advsimd-intrinsics/vst2q_lane_u8_indices_1.c: New
      	test.
              * gcc.target/aarch64/advsimd-intrinsics/vst3_lane_f32_indices_1.c: New
      	test.
              * gcc.target/aarch64/advsimd-intrinsics/vst3_lane_f64_indices_1.c: New
      	test.
              * gcc.target/aarch64/advsimd-intrinsics/vst3_lane_p8_indices_1.c: New
      	test.
              * gcc.target/aarch64/advsimd-intrinsics/vst3_lane_s16_indices_1.c: New
      	test.
              * gcc.target/aarch64/advsimd-intrinsics/vst3_lane_s32_indices_1.c: New
      	test.
              * gcc.target/aarch64/advsimd-intrinsics/vst3_lane_s64_indices_1.c: New
      	test.
              * gcc.target/aarch64/advsimd-intrinsics/vst3_lane_s8_indices_1.c: New
      	test.
              * gcc.target/aarch64/advsimd-intrinsics/vst3_lane_u16_indices_1.c: New
      	test.
              * gcc.target/aarch64/advsimd-intrinsics/vst3_lane_u32_indices_1.c: New
      	test.
              * gcc.target/aarch64/advsimd-intrinsics/vst3_lane_u64_indices_1.c: New
      	test.
              * gcc.target/aarch64/advsimd-intrinsics/vst3_lane_u8_indices_1.c: New
      	test.
              * gcc.target/aarch64/advsimd-intrinsics/vst3q_lane_f32_indices_1.c: New
      	test.
              * gcc.target/aarch64/advsimd-intrinsics/vst3q_lane_f64_indices_1.c: New
      	test.
              * gcc.target/aarch64/advsimd-intrinsics/vst3q_lane_p8_indices_1.c: New
      	test.
              * gcc.target/aarch64/advsimd-intrinsics/vst3q_lane_s16_indices_1.c: New
      	test.
              * gcc.target/aarch64/advsimd-intrinsics/vst3q_lane_s32_indices_1.c: New
      	test.
              * gcc.target/aarch64/advsimd-intrinsics/vst3q_lane_s64_indices_1.c: New
      	test.
              * gcc.target/aarch64/advsimd-intrinsics/vst3q_lane_s8_indices_1.c: New
      	test.
              * gcc.target/aarch64/advsimd-intrinsics/vst3q_lane_u16_indices_1.c: New
      	test.
              * gcc.target/aarch64/advsimd-intrinsics/vst3q_lane_u32_indices_1.c: New
      	test.
              * gcc.target/aarch64/advsimd-intrinsics/vst3q_lane_u64_indices_1.c: New
      	test.
              * gcc.target/aarch64/advsimd-intrinsics/vst3q_lane_u8_indices_1.c: New
      	test.
              * gcc.target/aarch64/advsimd-intrinsics/vst4_lane_f32_indices_1.c: New
      	test.
              * gcc.target/aarch64/advsimd-intrinsics/vst4_lane_f64_indices_1.c: New
      	test.
              * gcc.target/aarch64/advsimd-intrinsics/vst4_lane_p8_indices_1.c: New
      	test.
              * gcc.target/aarch64/advsimd-intrinsics/vst4_lane_s16_indices_1.c: New
      	test.
              * gcc.target/aarch64/advsimd-intrinsics/vst4_lane_s32_indices_1.c: New
      	test.
              * gcc.target/aarch64/advsimd-intrinsics/vst4_lane_s64_indices_1.c: New
      	test.
              * gcc.target/aarch64/advsimd-intrinsics/vst4_lane_s8_indices_1.c: New
      	test.
              * gcc.target/aarch64/advsimd-intrinsics/vst4_lane_u16_indices_1.c: New
      	test.
              * gcc.target/aarch64/advsimd-intrinsics/vst4_lane_u32_indices_1.c: New
      	test.
              * gcc.target/aarch64/advsimd-intrinsics/vst4_lane_u64_indices_1.c: New
      	test.
              * gcc.target/aarch64/advsimd-intrinsics/vst4_lane_u8_indices_1.c: New
      	test.
              * gcc.target/aarch64/advsimd-intrinsics/vst4q_lane_f32_indices_1.c: New
      	test.
              * gcc.target/aarch64/advsimd-intrinsics/vst4q_lane_f64_indices_1.c: New
      	test.
              * gcc.target/aarch64/advsimd-intrinsics/vst4q_lane_p8_indices_1.c: New
      	test.
              * gcc.target/aarch64/advsimd-intrinsics/vst4q_lane_s16_indices_1.c: New
      	test.
              * gcc.target/aarch64/advsimd-intrinsics/vst4q_lane_s32_indices_1.c: New
      	test.
              * gcc.target/aarch64/advsimd-intrinsics/vst4q_lane_s64_indices_1.c: New
      	test.
              * gcc.target/aarch64/advsimd-intrinsics/vst4q_lane_s8_indices_1.c: New
      	test.
              * gcc.target/aarch64/advsimd-intrinsics/vst4q_lane_u16_indices_1.c: New
      	test.
              * gcc.target/aarch64/advsimd-intrinsics/vst4q_lane_u32_indices_1.c: New
      	test.
              * gcc.target/aarch64/advsimd-intrinsics/vst4q_lane_u64_indices_1.c: New
      	test.
              * gcc.target/aarch64/advsimd-intrinsics/vst4q_lane_u8_indices_1.c: New
      	test.
      
      From-SVN: r226059
      Charles Baylis committed
    • invoke.texi (Language Independent Options): Rename node to Diagnostic Message Formatting Options. · ebaec5f0
      	* doc/invoke.texi (Language Independent Options): Rename node to
      	Diagnostic Message Formatting Options.
      
      From-SVN: r226058
      Jonathan Wakely committed
    • Daily bump. · 21b13185
      From-SVN: r226057
      GCC Administrator committed
  2. 21 Jul, 2015 14 commits
  3. 20 Jul, 2015 17 commits
    • rl78-real.md (andqi3_real): Expand operands for clr1. · 840cdb80
      * config/rl78/rl78-real.md (andqi3_real): Expand operands for clr1.
      (iorqi3_real): Likewise for set1.
      
      From-SVN: r226023
      DJ Delorie committed
    • * include/bits/c++config: Fix abi_tag in special modes. · 3a353ff5
      From-SVN: r226022
      Jason Merrill committed
    • i386.c (ix86_md_asm_adjust): Handle DImode dest_mode for !TARGET_64BIT. · 73c581fb
      	* config/i386/i386.c (ix86_md_asm_adjust): Handle DImode dest_mode
      	for !TARGET_64BIT.
      
      testsuite/ChangeLog:
      
      	* gcc.target/i386/asm-flag-5.c (f_ll): New.
      
      From-SVN: r226017
      Uros Bizjak committed
    • add missing changelog · 236d2dc4
      From-SVN: r226015
      Aditya Kumar committed
    • Refactor graphite-isl-ast-to-gimple.c · 050e1371
      Refactor graphite-isl-ast-to-gimple.c:
      Refactor so that each function can access 'region'. This will help
      maintain a parameter rename_map within a region. No functional change intended.
      This patch will be followed by another set of patches
      where translate_isl_ast_to_gimple::region is used to keep parameters which need
      renaming. Since we are planning to remove limit_scops, we now have to maintain a
      set of parameters which needs renaming. This refactoring helps avoid passing
      `region' to all the functions in this file.
      
      It passes bootstrap and regtest.
      
      gcc/ChangeLog:
      
      2015-07-19  Aditya Kumar  <hiraditya@msn.com>
      
              * graphite-isl-ast-to-gimple.c:
      	Refactor so that each function can access 'region'. This will help
      	maintain a parameter rename_map within a region.
      
      From-SVN: r226014
      Aditya Kumar committed
    • Missed a difference between gomp4 and trunk · a051317b
      From-SVN: r226012
      Nathan Sidwell committed
    • oacc-parallel.c (GOACC_parallel): Move variadic handling into wait=-specific if. · a091118d
      	* oacc-parallel.c (GOACC_parallel): Move variadic handling into
      	wait=-specific if.
      	(GOACC_enter_exit_data, GOACC_update): Use consistent num_waits
      	!=0 condition.
      	(goacc_waits): Move !num_waits handling to ...
      	(GOACC_wait): ... here, the only caller that might have zero waits.
      
      From-SVN: r226011
      Nathan Sidwell committed
    • compiler: Create dummy labels for blank labels. · 53c12016
          
          Fixes golang/go#11591.
          
          Reviewed-on: https://go-review.googlesource.com/12043
      
      From-SVN: r226009
      Ian Lance Taylor committed
    • compiler: Remove unnecessary check for GCC-specific issue. · 57c7a33b
          Reviewed-on: https://go-review.googlesource.com/11800
      
          compiler: remove name of unused parameter to avoid warning
          
          Reviewed-on: https://go-review.googlesource.com/12367
      
      From-SVN: r226007
      Ian Lance Taylor committed
    • * config/rs6000/rs6000.md (*lt0_disi): New. · 824478c0
      From-SVN: r226006
      Segher Boessenkool committed
    • re PR target/66217 (PowerPC rotate/shift/mask instructions not optimal) · 7fc5cca3
      	PR target/66217
      	* config/rs6000/constraints.md ("S", "T", "t"): Delete.  Update
      	"available letters" comment.
      	* config/rs6000/predicates.md (mask_operand, mask_operand_wrap,
      	mask64_operand, mask64_2_operand, any_mask_operand, and64_2_operand,
      	and_2rld_operand):  Delete.
      	(and_operand): Adjust.
      	(rotate_mask_operator): New.
      	* config/rs6000/rs6000-protos.h (build_mask64_2_operands,
      	includes_lshift_p, includes_rshift_p, includes_rldic_lshift_p,
      	includes_rldicr_lshift_p, insvdi_rshift_rlwimi_p, extract_MB,
      	extract_ME): Delete.
      	(rs6000_is_valid_mask, rs6000_is_valid_and_mask,
      	rs6000_is_valid_shift_mask, rs6000_is_valid_insert_mask,
      	rs6000_insn_for_and_mask, rs6000_insn_for_shift_mask,
      	rs6000_insn_for_insert_mask, rs6000_is_valid_2insn_and,
      	rs6000_emit_2insn_and): New.
      	* config/rs6000/rs6000.c (num_insns_constant): Adjust.
      	(build_mask64_2_operands, includes_lshift_p, includes_rshift_p,
      	includes_rldic_lshift_p, includes_rldicr_lshift_p,
      	insvdi_rshift_rlwimi_p, extract_MB, extract_ME): Delete.
      	(rs6000_is_valid_mask, rs6000_is_valid_and_mask,
      	rs6000_insn_for_and_mask, rs6000_is_valid_shift_mask,
      	s6000_insn_for_shift_mask, rs6000_is_valid_insert_mask,
      	rs6000_insn_for_insert_mask, rs6000_is_valid_2insn_and,
      	rs6000_emit_2insn_and): New.
      	(print_operand) <'b', 'B', 'm', 'M', 's', 'S', 'W'>: Delete.
      	(rs6000_rtx_costs) <CONST_INT>: Delete mask_operand and mask64_operand
      	handling.
      	<NOT>: Don't fall through to next case.
      	<AND>: Handle the various rotate-and-mask cases directly.
      	<IOR>: Always cost as one insn.
      	* config/rs6000/rs6000.md (splitter for bswap:SI): Adjust.
      	(and<mode>3): Adjust expander for the new patterns.
      	(and<mode>3_imm, and<mode>3_imm_dot, and<mode>3_imm_dot2,
      	and<mode>3_imm_mask_dot, and<mode>3_imm_mask_dot2): Adjust condition.
      	(*and<mode>3_imm_dot_shifted): New.
      	(*and<mode>3_mask): Delete, rewrite as ...
      	(and<mode>3_mask): ... New.
      	(*and<mode>3_mask_dot, *and<mode>3_mask_dot): Rewrite.
      	(andsi3_internal0_nomc): Delete.
      	(*andsi3_internal6): Delete.
      	(*and<mode>3_2insn): New.
      	(insv, insvsi_internal, *insvsi_internal1, *insvsi_internal2,
      	*insvsi_internal3, *insvsi_internal4, *insvsi_internal5,
      	*insvsi_internal6, insvdi_internal, *insvdi_internal2,
      	*insvdi_internal3): Delete.
      	(*rotl<mode>3_mask, *rotl<mode>3_mask_dot, *rotl<mode>3_mask_dot2,
      	*rotl<mode>3_insert, *rotl<mode>3_insert_2, *rotl<mode>3_insert_3,
      	*rotl<mode>3_insert_4, two splitters for multi-precision shifts,
      	*ior<mode>_mask): New.
      	(extzv, extzvdi_internal, *extzvdi_internal1, *extzvdi_internal2,
      	*rotlsi3_mask, *rotlsi3_mask_dot, *rotlsi3_mask_dot2,
      	*ashlsi3_imm_mask, *ashlsi3_imm_mask_dot, *ashlsi3_imm_mask_dot2,
      	*lshrsi3_imm_mask, *lshrsi3_imm_mask_dot, *lshrsi3_imm_mask_dot2):
      	Delete.
      	(ashr<mode>3): Delete expander.
      	(*ashr<mode>3): Rename to ...
      	(ashr<mode>3): ... This.
      	(ashrdi3_no_power, *ashrdisi3_noppc64be): Delete.
      	(*rotldi3_internal4, *rotldi3_internal5 and split,
      	*rotldi3_internal6 and split, *ashldi3_internal4, ashldi3_internal5
      	and split, *ashldi3_internal6 and split, *ashldi3_internal7,
      	ashldi3_internal8 and split, *ashldi3_internal9 and split): Delete.
      	(*anddi3_2rld, *anddi3_2rld_dot, *anddi3_2rld_dot2): Delete.
      	(splitter for loading a mask): Adjust.
      	* doc/md.texi (Machine Constraints): Remove q, S, T, t constraints.
      
      From-SVN: r226005
      Segher Boessenkool committed
    • plugin-nvptx.c (struct targ_fn_descriptor): Move later. · f3e9a059
      	* plugin/plugin-nvptx.c (struct targ_fn_descriptor): Move later.
      	(struct ptx_image_data): Move earlier, add fns field.
      	(struct ptx_device): Add images and image_lock fields.
      	(ptx_images, ptx_image_lock): Delete.
      	(nvptx_open_device): Initialize images and image_lock fields.
      	(nvptx_close_device): Destroy image_lock.
      	(GOMP_OFFLOAD_load_image): Register image to device-specific fields.
      	(GOMP_OFFLOAD_unload_image): Unregister image from device-specific
      	fields.
      
      From-SVN: r226004
      Nathan Sidwell committed
    • genemit.c (print_code, [...]): Remove declarations. · dd5bc4be
      	* genemit.c (print_code, gen_exp, gen_insn, gen_expand, gen_split,
      	output_add_clobbers, output_added_clobbers_hard_reg_p,
      	gen_rtx_scratch): Remove declarations.
      
      From-SVN: r226003
      Marek Polacek committed
    • re PR c++/55095 (Wshift-overflow) · 451b5e48
      	PR c++/55095
      	* c-common.c (c_fully_fold_internal): Warn about left shift overflows.
      	Use EXPR_LOC_OR_LOC.
      	(maybe_warn_shift_overflow): New function.
      	* c-common.h (maybe_warn_shift_overflow): Declare.
      	* c-opts.c (c_common_post_options): Set warn_shift_overflow.
      	* c.opt (Wshift-overflow): New option.
      
      	* c-typeck.c (digest_init): Pass OPT_Wpedantic to pedwarn_init.
      	(build_binary_op): Warn about left shift overflows.
      
      	* typeck.c (cp_build_binary_op): Warn about left shift overflows.
      
      	* doc/invoke.texi: Document -Wshift-overflow and -Wshift-overflow=.
      
      	* c-c++-common/Wshift-overflow-1.c: New test.
      	* c-c++-common/Wshift-overflow-2.c: New test.
      	* c-c++-common/Wshift-overflow-3.c: New test.
      	* c-c++-common/Wshift-overflow-4.c: New test.
      	* c-c++-common/Wshift-overflow-5.c: New test.
      	* g++.dg/cpp1y/left-shift-1.C: New test.
      	* gcc.dg/c90-left-shift-2.c: New test.
      	* gcc.dg/c90-left-shift-3.c: New test.
      	* gcc.dg/c99-left-shift-2.c: New test.
      	* gcc.dg/c99-left-shift-3.c: New test.
      	* gcc.dg/pr40501.c: Use -Wno-shift-overflow.
      	* gcc.c-torture/execute/pr40386.c: Likewise.
      	* gcc.dg/vect/pr33373.c: Likewise.
      	* gcc.dg/vect/vect-shift-2-big-array.c: Likewise.
      	* gcc.dg/vect/vect-shift-2.c: Likewise.
      
      Co-Authored-By: Richard Sandiford <richard.sandiford@arm.com>
      
      From-SVN: r225998
      Marek Polacek committed
    • [simplify-rtx][2/2] Simplify - (y ? -x : x) -> (!y ? -x : x) · 7040e903
      	* simplify-rtx.c (simplify_unary_operation_1, NEG case):
      	(neg (x ? (neg y) : y)) -> !x ? (neg y) : y.
      
      	* gcc.target/aarch64/neg_abs_1.c: New test.
      
      From-SVN: r225997
      Kyrylo Tkachov committed
    • [PATCH][combine][1/2] Try to simplify before substituting · 232c9329
      	* combine.c (combine_simplify_rtx): Move simplification step
      	before various transformations/substitutions.
      
      From-SVN: r225996
      Kyrylo Tkachov committed