re PR ipa/66424 (wrong code at -O2 and -O3 on x86_64-linux-gnu in 32-bit mode)

2015-07-21  Vladimir Makarov  <vmakarov@redhat.com>

	PR ipa/66424.
	* lra-remat.c (operand_to_remat): Prevent using insns with input
	subregs processed separately by IRA.

2015-07-21  Vladimir Makarov  <vmakarov@redhat.com>

	PR ipa/66424.
	* gcc.target/i386/pr66424.c: New.

From-SVN: r226053

gcc/ChangeLog

+2015-07-21  Vladimir Makarov  <vmakarov@redhat.com>
+
+	PR ipa/66424.
+	* lra-remat.c (operand_to_remat): Prevent using insns with input
+	subregs processed separately by IRA.
+
 2015-07-21  Andrew MacLeod  <amacleod@redhat.com>
 
 	* ssa-iterators.h (has_zero_uses, has_single_use): Implement as

gcc/lra-remat.c

@@ -417,6 +417,16 @@ operand_to_remat (rtx_insn *insn)
 	  return -1;
 	found_reg = reg;
       }
+    /* IRA calculates conflicts separately for subregs of two words
+       pseudo.  Even if the pseudo lives, e.g. one its subreg can be
+       used lately, another subreg hard register can be already used
+       for something else.  In such case, it is not safe to
+       rematerialize the insn.  */
+    else if (reg->type == OP_IN && reg->subreg_p
+	     && reg->regno >= FIRST_PSEUDO_REGISTER
+	     && (GET_MODE_SIZE (PSEUDO_REGNO_MODE (reg->regno))
+		 == 2 * UNITS_PER_WORD))
+      return -1;
   if (found_reg == NULL)
     return -1;
   if (found_reg->regno < FIRST_PSEUDO_REGISTER)

gcc/testsuite/ChangeLog

+2015-07-21  Vladimir Makarov  <vmakarov@redhat.com>
+
+	PR ipa/66424.
+	* gcc.target/i386/pr66424.c: New.
+
 2015-07-21  Alex Velenko  <Alex.Velenko@arm.com>
 
 	* gcc.target/arm/thumb-bitfld1.c (foo): Add explicit return type.

gcc/testsuite/gcc.target/i386/pr66424.c

+/* { dg-do run } */
+/* { dg-options "-O2" } */
+/* { dg-require-effective-target ia32 } */
+int a, b, c, d, e[2], f, l, m, n, o;
+long long g = 1, j;
+static unsigned int h;
+static int i, k;
+
+void
+fn1 (long long p)
+{
+  int q = p;
+  f = 1 ^ e[f ^ (q & 1)];
+}
+
+static void
+fn2 (long long p)
+{
+  f = 1 ^ e[(f ^ 1) & 1];
+  fn1 (p >> 1 & 1);
+  fn1 (p >> 32 & 1);
+}
+
+void
+fn3 (int p)
+{
+  g |= j = p;
+}
+
+int
+main ()
+{
+  e[0] = 1;
+  char p = l;
+  h = --g;
+  i = o = c;
+  m = d ? 1 / d : 0;
+  fn3 (l || 0);
+  b = a;
+  n = j++;
+  k--;
+  fn2 (g);
+  fn2 (h);
+  fn2 (i);
+
+  if (k + f)
+    __builtin_abort ();
+
+  return 0;
+}
+