re PR c++/33620 (internal compiler error: canonical types differ for identical types const QList<QStringList> and const QList<QStringList>)

        PR c++/33620
        * class.c (finish_struct_bits): Copy TYPE_ATTRIBUTES.
        * pt.c (apply_late_template_attributes): Splice out dependent
        attributes from DECL_ATTRIBUTES.

        * decl.c (cxx_maybe_build_cleanup): Use build_address.

From-SVN: r129553

        PR tree-optimization/33855

        * tree-ssa-phiopt.c (cond_store_replacement): Handle
        * COMPLEX_TYPE
        and VECTOR_TYPE.

        * gcc.c-torture/compile/pr33855.c: New testcase.

From-SVN: r129551

	PR tree-optimization/33854
	* tree-vect-analyze.c (vect_determine_vectorization_factor): Add
	FLOAT_EXPR to the list of promotion operations.

From-SVN: r129549

	PR target/29473
	PR target/29493
	* config/i386/i386.c (output_pic_addr_const): Support Intel asm syntax.
	(print_reg): Print register prefix only with AT&T asm syntax. 
	Support pc_rtx for RIP register.
	(print_operand_address): Use print_reg()'s pc_rtx support for RIP
	relative addressing.  Always print segment register prefix with AT&T
	asm syntax and never with Intel asm syntax.
	(print_operand): Suppress 'XXX PTR' prefix for BLKmode operands. 
	Fix prefix for 16-byte XFmode operands.
	(output_addr_const_extra): Support Intel asm syntax.
	(x86_file_start): Don't use register prefix with Intel asm syntax.
	* config/i386/i386.md ("*zero_extendqihi2_movzbl"): Fix typo.
	("return_internal_long"): Fix Intel asm syntax output.
	("set_got_rex64"): Support Intel asm syntax.
	("set_rip_rex64"): Likewise.
	("set_got_offset_rex64"): Likewise.
	("*sibcall_1_rex64_v"): Print register prefix only with AT&T asm
	syntax.
	("*tls_global_dynamic_64"): Likewise.
	("*tls_local_dynamic_base_64"): Likewise.
	("*load_tp_si")("*load_tp_di"): Likewise.
	("*add_tp_si")("*add_tp_di"): Likewise.
	("*tls_dynamic_lea_64"): Likewise.
	("*sibcall_value_1_rex64_v"): Likewise.
	("stack_tls_protect_set_si"): Likewise.
	("stack_tls_protect_set_di"): Likewise.
	("stack_tls_protect_test_si"): Likewise.
	("stack_tls_protect_test_di"): Likewise.
	* config/i386/mmx.md ("*mov<mode>_internal_rex64"): Fix Intel asm
	syntax output.
	("*movv2sf_internal_rex64"): Likewise.
	* config/i386/cpuid.h (__cpuid): Support Intel asm syntax.
	(__get_cpuid_max): Likewise.

From-SVN: r129548

From-SVN: r129545

        * gcc.dg/unwind-1.c: Disable on AIX.
        * gcc.dg/cpp/_Pragma6.c: Disable on AIX.

From-SVN: r129540

2007-10-21  Paul Thomas  <pault@gcc.gnu.org>

	PR fortran/33749
	* resolve.c (resolve_ordinary_assign): New function that takes
	the code to resolve an assignment from resolve_code. In
	addition, it makes a temporary of any vector index, on the
	lhs, using gfc_get_parentheses.
	(resolve_code): On EXEC_ASSIGN call the new function.

2007-10-21  Paul Thomas  <pault@gcc.gnu.org>

	PR fortran/33749
	* gfortran.dg/assign_9.f90: New test.

From-SVN: r129539

From-SVN: r129537

From-SVN: r129535

mips-protos.h (mips_regno_mode_ok_for_base_p): Give the STRICT_P argument type "bool" rather than "int".

gcc/
	* config/mips/mips-protos.h (mips_regno_mode_ok_for_base_p): Give
	the STRICT_P argument type "bool" rather than "int".
	(mips_legitimate_address_p): Likewise.
	(fp_register_operand, lo_operand): Delete.
	(mips_subword): Give the HIGH_P argument type "bool" rather than "int".
	(mips_emit_scc): Rename to...
	(mips_expand_scc): ...this.
	(gen_conditional_branch): Rename to...
	(mips_expand_conditional_branch): ...this.
	(gen_conditional_move): Rename to...
	(mips_expand_conditional_move): ...this.
	(mips_gen_conditional_trap): Rename to...
	(mips_expand_conditional_trap): ...this and take an rtx code instead
	of an operands array.
	(mips_expand_call): Give the SIBCALL_P argument type "bool"
	rather than "int".
	(mips_emit_fcc_reload): Rename to...
	(mips_expand_fcc_reload): ...this.
	(init_cumulative_args): Rename to...
	(mips_init_cumulative_args): ...this and remove the libname argument.
	(function_arg_advance): Rename to...
	(mips_function_arg_advance): ...this.
	(function_arg): Rename to...
	(mips_function_arg): ...this and use "rtx" instead of
	"struct rtx_def *".
	(function_arg_boundary): Rename to...
	(mips_function_arg_boundary): ...this.
	(mips_expand_unaligned_load): Rename to...
	(mips_expand_ext_as_unaligned_load): ...this and give the WIDTH
	and BITPOS arguments type "HOST_WIDE_INT".
	(mips_expand_unaligned_store): Rename to...
	(mips_expand_ins_as_unaligned_store): ...this and give the WIDTH
	and BITPOS arguments type "HOST_WIDE_INT".
	(override_options): Rename to...
	(mips_override_options): ...this.
	(print_operand): Rename to...
	(mips_print_operand): ...this.
	(print_operand_address): Rename to...
	(mips_print_operand_address): ...this.
	(mips_output_ascii): Remove the PREFIX argument.
	(mips_expand_epilogue): Give the SIBCALL_P argument type "bool"
	rather than "int".
	(mips_can_use_return_insn): Return a "bool" rather than an "int".
	(mips_function_value): Remove the FUNC argument.  Use "rtx" instead
	of "struct rtx_def *".
	(mips_secondary_reload_class): Give the IN_P argument type "bool"
	rather than "int".
	(build_mips16_call_stub): Delete.
	(mips_store_data_bypass_p): Return a "bool" rather than an "int".
	(mips_use_ins_ext_p): Give the second and third arguments type
	"HOST_WIDE_INT" rather than "rtx".
	* config/mips/mips.h: Update after the above changes.  Tweak comments
	and formatting.
	(SECONDARY_INPUT_RELOAD_CLASS): Pass a boolean IN_P argument.
	(SECONDARY_OUTPUT_RELOAD_CLASS): Likewise.
	(mips_print_operand_punct, mips_hard_regno_mode_ok): Change the
	element type from "char" to "bool".
	(mips_section_threshold, sym_lineno, set_noat, mips_branch_likely)
	(mips_cpu_info_table): Delete.
	* config/mips/mips.md: Update after the above changes.  Tweak some
	formatting.
	* config/mips/mips-ps-3d.md: Likewise.
	* config/mips/mips.c: Tweak comments and formatting.
	Use NULL-like macros rather than 0 in various places.
	(mips_section_threshold): Rename to...
	(mips_small_data_threshold): ...this and give it an unsigned type.
	(num_source_filenames): Remove explicit initialization.
	(sdb_label_count): Likewise.
	(sym_lineno): Delete.
	(set_noat): Make static.
	(mips_branch_likely): Likewise, and give it type "bool".
	(mips_isa_info): Rename to...
	(mips_isa_option_info): ...this.
	(mips_flag_delayed_branch): Rename to...
	(mips_base_delayed_branch): ...this.
	(mips_split_addresses): Delete.
	(mips_print_operand_punct, mips_hard_regno_mode_ok): Change the
	element type from "char" to "bool".
	(mips_regno_to_class): Add an explicit array size.
	(mips16_flipper): Change from type "int" to type "bool".
	(mips_comp_type_attributes): Remove redundant FUNCTION_TYPE check.
	(mips_tls_operand_p): Rename to...
	(mips_tls_symbol_p): ...this.
	(mips_global_symbol_p): Remove redundant "const".
	(mips_offset_within_alignment_p): Simplify.
	(mips_regno_mode_ok_for_base_p): Change the name of the last argument
	to STRICT_P and give it type bool.
	(mips_valid_base_register_p): Likewise.
	(mips_classify_address): Likewise.
	(mips_legitimate_address_p): Likewise.
	(mips16_unextended_reference_p): Take the offset as an
	"unsigned HOST_WIDE_INT" rather than an "rtx".  Simplify.
	(mips_const_insns): Use IN_RANGE.
	(mips_force_temporary): Remove an unnecessary copy_rtx.
	(mips16_gp_pseudo_reg): Simplify.
	(mips_split_symbol): Remove an unnecessary copy_rtx.
	(mips_legitimize_tls_address): Only create registers if we need them.
	(mips_legitimize_address): Use mips_split_plus.
	(mips_move_integer): Swap DEST and TEMP arguments.  Rename local
	variable COST to NUM_OPS.
	(mips_legitimize_move): Use gen_lowpart.
	(mips_rewrite_small_data): Rename the OP parameter to PATTERN.
	(m16_check_op): Use IN_RANGE.
	(mips_subword): Give the HIGH_P argument type "bool" rather than "int".
	(mips_split_doubleword_move): Pass booleans to mips_subword.
	(mips_output_move): Store the mode in a local variable.
	Explicitly assert that this function does not deal with
	MFLO and MFHI.  Use SMALL_OPERAND_UNSIGNED.  Make order of
	cases more consistent.
	(mips_relational_operand_ok_p): Rename to...
	(mips_int_order_operand_ok_p): ...this.
	(mips_canonicalize_comparison): Rename to...
	(mips_canonicalize_int_order_test): ...this.
	(mips_emit_int_relational): Rename to...
	(mips_emit_int_order_test): ...this.  Store the mode in a local
	variable.
	(mips_reverse_fp_cond_p): Rename to...
	(mips_reversed_fp_cond): ...this.
	(mips_emit_compare): Make the order of the statements more consistent.
	(mips_emit_scc): Rename to...
	(mips_expand_scc): ...this.
	(gen_conditional_branch): Rename to...
	(mips_expand_conditional_branch): ...this.
	(gen_conditional_move): Rename to...
	(mips_expand_conditional_move): ...this.  Build the condition
	separately from the main pattern.
	(mips_gen_conditional_trap): Rename to...
	(mips_expand_conditional_trap): ...this and take an rtx code instead
	of an operands array.  Simplify.
	(init_cumulative_args): Rename to...
	(mips_init_cumulative_args): ...this.  Use memset rather than a
	copy from a zeroed static.  Use prototype_p and stdarg_p.
	(mips_arg_info): Rename to...
	(mips_get_arg_info): ...this and put the INFO argument first.
	(function_arg): Rename to...
	(mips_function_arg): ...this and use "rtx" instead of
	"struct rtx_def *".  Only split structures into chunks if 
	TARGET_HARD_FLOAT, rather than checking !TARGET_SOFT_FLOAT on
	a chunk-by-chunk basis.  Use SCALAR_FLOAT_TYPE_P instead of a
	comparison with REAL_TYPE.  Rename local variable REG to REGNO
	and make it unsigned.
	(function_arg_advance): Rename to...
	(mips_function_arg_advance): ...this.
	(function_arg_boundary): Rename to...
	(mips_function_arg_boundary): ...this.
	(mips_pad_arg_upward): Use SCALAR_INT_MODE_P instead of a comparison
	with MODE_INT.
	(mips_fpr_return_fields): Use SCALAR_FLOAT_TYPE_P instead of a
	comparison with REAL_TYPE.
	(mips_function_value): Remove the FUNC argument.  Rename local
	variable UNSIGNEDP to UNSIGNED_P.
	(mips_return_in_memory): Use IN_RANGE.
	(mips_setup_incoming_varargs): Pass a boolean rather than an int
	to FUNCTION_ARG_ADVANCE.
	(mips_gimplify_va_arg_expr): Rename local variable INDIRECT
	to INDIRECT_P.  Remove a redundant mips_abi check.  Only calculate
	SIZE and RSIZE if needed.
	(mips16_stub): Rename FPRET to FP_RET_P and give it type "bool"
	rather than "int".
	(build_mips16_function_stub): Rename to...
	(mips16_build_function_stub): ...this.
	(build_mips16_call_stub): Rename to...
	(mips16_build_call_stub): ...this.  Make static, and return a
	"bool" rather than an "int".  Rename the ARG_SIZE argument to
	ARGS_SIZE.  Rename the local variable FPRET to FP_RET_P and give
	it type "bool".  Use "jr" rather than "j".  Use XNEW.  Simplify.
	(mips_load_call_address): Give the SIBCALL_P argument type "bool"
	rather than "int".
	(mips_expand_call): Likewise.  Assert that MIPS16 calls via stubs
	are not sibling ones.
	(mips_emit_fcc_reload): Rename to...
	(mips_expand_fcc_reload): ...this.
	(mips_get_unaligned_mem): Give the WIDTH and BITPOS arguments type
	"HOST_WIDE_INT".
	(mips_expand_unaligned_load): Rename to...
	(mips_expand_ext_as_unaligned_load): ...this and give the WIDTH
	and BITPOS arguments type "HOST_WIDE_INT".  Remove redundant
	SUBREG_BYTE check.
	(mips_expand_unaligned_store): Rename to...
	(mips_expand_ins_as_unaligned_store): ...this and give the WIDTH
	and BITPOS arguments type "HOST_WIDE_INT".
	(mips_use_ins_ext_p): Rename second and third arguments to WIDTH
	and BITPOS and give them type "HOST_WIDE_INT" rather than "rtx".
	Use IN_RANGE.
	(mips_init_split_addresses): Replace with...
	(mips_split_addresses_p): ...this new function.
	(mips_init_relocs): Check mips_split_addresses_p () rather than
	mips_split_addresses.  Always initialize mips_split_p with booleans.
	(print_operand_reloc): Rename to...
	(mips_print_operand_reloc): ...this.  Use a gcc_assert rather than
	a fatal_error.
	(print_operand): Rename to...
	(mips_print_operand): ...this.
	(print_operand_address): Rename to...
	(mips_print_operand_address): ...this.  Use GP_REG_FIRST.
	(mips_in_small_data_p): Simplify.
	(mips_output_ascii): Remove the PREFIX argument and "register"
	keywords.  Use the STRING parameter directly and cast to
	"unsigned char".
	(mips16e_collect_argument_save_p): Use IN_RANGE.
	(mips_function_has_gp_insn): Simplify.
	(mips_set_return_address): Use BITSET_P.
	(mips_restore_gp): Use a separate statement to pick the base
	register.
	(mips_output_function_prologue): Use a local FRAME variable.
	(mips_save_reg): Pass booleans to mips_subword.
	(mips_expand_prologue): Use a local FRAME variable.  Use
	cprestore_size to detect when .cprestore is needed.
	(mips_restore_reg): Use GP_REG_FIRST.
	(mips_expand_epilogue): Give the SIBCALL_P argument type "bool"
	rather than "int".  Use local FRAME and REGNO variables.
	(mips_can_use_return_insn): Return a "bool" rather than an "int".
	(mips_secondary_reload_class): Give the IN_P argument type "bool"
	rather than "int".
	(mips_linked_madd_p): Rename arguments to OUT_INSN and IN_INSN.
	(mips_store_data_bypass_p): Return a "bool" rather than an "int".
	(vr4130_swap_insns_p): Rename local variables to DEP1_P and DEP2_P.
	(mips_74k_agen_init): Assume INSN satisfies USEFUL_INSN_P.
	(mips_variable_issue): Do nothing unless INSN satisfies USEFUL_INSN_P.
	(builtin_description): Rename to...
	(mips_builtin_description): ...this.
	(mips_bdesc): Rename to...
	(mips_ps_bdesc): ...this.
	(sb1_bdesc): Rename to...
	(mips_sb1_bdesc): ...this.
	(dsp_bdesc): Rename to...
	(mips_dsp_bdesc): ...this.
	(dsp_32only_bdesc): Rename to...
	(mips_dsp_32only_bdesc): ...this.
	(bdesc_map): Rename to...
	(mips_bdesc_map): ...this.
	(bdesc_arrays): Rename to...
	(mips_bdesc_arrays): ...this.
	(mips_prepare_builtin_arg): Rename OP to OPNO and ARGNUM to ARGNO.
	Tweak error message.
	(mips_expand_builtin_direct): Rename HAS_TARGET to HAS_TARGET_P.
	Rename local variables I and J to OPNO and ARGNO respectively.
	Assert that the number of arguments is no more than the number of
	input operands.
	(mips_expand_builtin_compare): Use an array of arguments rather
	than an array of operands.  Assert that the number of operands is
	as expected.
	(add_constant): Rename to...
	(mips16_add_constant): ...this.  Use XNEW.
	(dump_constants_1): Rename to...
	(mips16_emit_constants_1): ...this.  Use ALL_SCALAR_FIXED_POINT_MODE_P.
	(dump_constants): Rename to...
	(mips16_emit_constants): ...this.
	(mips_sim_wait_reg, mips_sim_record_set): Use END_REGNO.
	(mips_set_mips16_mode): Don't call mips_init_split_addresses.
	Assign mips16_p to was_mips16_p.
	(mips_parse_cpu): Tweak warning message.
	(override_options): Rename to...
	(mips_override_options): ...this.  Move the mips_cost initialization
	out of the "shared with GAS" block.  Quote option names in error
	messages.
	(mips_conditional_register_usage): Make local variable REGNO unsigned.
	(mips_order_regs_for_local_alloc): Remove register keyword.

From-SVN: r129532

gcc/
	* system.h (IN_RANGE): Cast each argument individually.

From-SVN: r129531

	* config/mips/mips.c (mips_set_mips16_mode) Say sorry for hard-float
	MIPS16 code unless using o32 or o64.  

gcc/testsuite/
	* gcc.target/mips/mips.exp (setup_mips_tests): Set mips_mips16.
	(dg-mips-options): Skip tests that specify an ABI other than o32
	and o64 if generating MIPS16 hard-float code.

From-SVN: r129530

	* gcc.dg/vect/vect-ifcvt-5.c: Require vect_int.
	* gcc.dg/vect/vect-16.c: Fix comment.
	* gcc.dg/vect/pr33369.c: Require vect_int.
	* gcc.dg/vect/slp-33.c: Add spaces.
	* gcc.dg/vect/no-scevccp-outer-18.c: Enable only for vect_interleave
	targets.
	* gcc.dg/vect/vect-ifcvt-6.c: Require vect_int.
	* gcc.dg/vect/no-scevccp-outer-19.c: Enable only for vect_unpack
	targets.
	* gcc.dg/vect/vect-ifcvt-7.c: Require vect_int.
	* gcc.dg/vect/vect-strided-store-u16-i4.c: Add vect_unpack to
	targets.
	* gcc.dg/vect/slp-10.c: Add spaces.
	* gcc.dg/vect/no-scevccp-outer-21.c: Enable only for vect_pack_trunc
	targets.
	* gcc.dg/vect/slp-36.c: Require vect_int.
	* gcc.dg/vect/vect-ifcvt-9.c, gcc.dg/vect/vect-strided-store-u32-i2.c,
	gcc.dg/vect/vect-ifcvt-2.c, gcc.dg/vect/vect-ifcvt-3.c,
	gcc.dg/vect/vect-82.c, gcc.dg/vect/vect-83.c: Likewise.
	* gcc.dg/vect/no-scevccp-outer-16.c: Enable only for vect_unpack
	targets.
	* gcc.dg/vect/no-scevccp-outer-17.c: Likewise.
	* gcc.dg/vect/pr25413.c: Use vector alignment_reachable_for_64bit
	instead of vector_alignment_reachable_for_double.
	* lib/target-supports.exp (vect_aligned_arrays): Add spu-*-*.
	(natural_alignment): Split into...
	(natural_alignment_32, natural_alignment_64): New.
	(vector_alignment_reachable): Depend on natural_alignment_32.
	(vector_alignment_reachable_for_double): Rename to ...
	(vector_alignment_reachable_for_64bit): And depend on
	natural_alignment_64.


Co-Authored-By: Revital Eres <eres@il.ibm.com>

From-SVN: r129529

gcc/
	* config/mips/mips.c (mips_cannot_change_mode_class): Don't check
	for modes smaller than 4 bytes.
	* config/mips/mips.md (*movhi_internal, *movqi_internal): Remove
	FPR alternatives.

From-SVN: r129528

gcc/
	* config/mips/mips-protos.h (mips_output_aligned_bss): Delete.
	* config/mips/linux.h (BSS_SECTION_ASM_OP): Delete.
	(ASM_OUTPUT_ALIGNED_BSS): Delete.
	* config/mips/mips.c (mips_output_aligned_bss): Delete.

From-SVN: r129527

gcc/
	* config/mips/mips.c (mips_function_ok_for_sibcall): Only forbid
	sibling calls to "mips16" functions if the function satisfies
	const_call_insn_operand.

From-SVN: r129526

gcc/
	* config/mips/mips.c (mips_va_start): Fix types in calls
	to build_int_cst.

From-SVN: r129525

gcc/
	* config/mips/mips.c (mips_rtx_costs): Only recognize reciprocals
	if ISA_HAS_FP4.

From-SVN: r129524

gcc/
	* config/mips/mips.h (ISA_HAS_LDC1_SDC1): New macro.
	* config/mips/mips.c (mips_split_64bit_move_p): Use ISA_HAS_LDC1_SDC1
	instead of checking mips_isa.

From-SVN: r129523

gcc/
	* doc/invoke.texi (-mpaired-single): Don't say that the option
	requires 64-bit code.
	* config/mips/mips-protos.h (mips_modes_tieable_p): Declare.
	* config/mips/mips.h (ISA_HAS_PAIRED_SINGLE): New macro.
	(ISA_HAS_NMADD_NMSUB): Add a mode argument.  Return true for
	V2SF if ISA_MIPS32R2.
	(MODES_TIEABLE_P): Use mips_modes_tieable_p.
	* config/mips/mips.c (mips_rtx_costs): Pass a mode argument
	to ISA_HAS_NMADD_NMSUB.
	(mips_split_doubleword_move): Handle V2SF.
	(mips_modes_tieable_p): New function.
	(override_options): Report a warning rather than an error when
	-mpaired-single is used on ISAs that don't support it; use
	ISA_HAS_PAIRED_SINGLE to check that case.
	* config/mips/mips.md (MOVE64): New mode iterator.  Replace DI
	and DF move splitters with a single MOVE64 splitter, thereby adding
	a V2SF splitter too.
	(SPLITF): Add TARGET_DOUBLE_FLOAT conditions to DI and DF.
	Add a TARGET_FLOAT64 condition to TF.  Add V2SF to the iterator.
	(HALFMODE): Add V2SF.
	(*nmadd<mode>, *nmadd<mode>_fastmath, *nmsub<mode>)
	(*nmsub<mode>_fastmath): Add a mode argument to ISA_HAS_NMADD_NMSUB.
	(movv2sf_hardfloat_64bit): Tweak ordering of conditions.
	(movv2sf_hardfloat_32bit): New pattern.
	(load_low<mode>, load_high<mode>, store_word<mode>): Remove
	TARGET_DOUBLE_FLOAT conditions.

gcc/testsuite/
	* gcc.dg/vect/vect.exp: Extend -mpaired-single handling to all
	MIPS targets.
	* g++.dg/vect/vect.exp: Likewise.
	* lib/fortran-torture.exp: Likewise.
	* gcc.target/mips/mips-ps-1.c: Use mpaired_single rather than
	mipsisa64*-*-* as the target selector.  Remove -mips64,
	-mhard-float and -mgp64 from the options list.
	* gcc.target/mips/mips-ps-2.c: Likewise.
	* gcc.target/mips/mips-ps-3.c: Likewise.
	* gcc.target/mips/mips-ps-4.c: Likewise.
	* gcc.target/mips/mips-ps-6.c: Likewise.
	* gcc.target/mips/mips-ps-5.c: Remove -mhard-float from the
	options list.
	* gcc.target/mips/sb1-1.c: Likewise.
	* gcc.target/mips/mips-ps-type.c: Likewise.
	* gcc.target/mips/mips-ps-7.c: New test.
	* gcc.target/mips/mips-ps-type-2.c: Likewise.
	* gcc.target/mips/fpr-moves-6.c: Remove XFAIL.
	* gcc.target/mips/mips.exp (setup_mips_tests): Set mips_fp and
	mips_gp instead of mips_fp64 and mips_gp64.  Treat -mgp32 -mfp64
	as forcing an ABI and an architecture.
	(is_gp32_flag, is_gp64_flag): Fold into...
	(dg-mips-options): ...here.  Make -mpaired-single imply -mfp64,
	then -mfp64 imply -mhard-float.  Apply register rules after the
	loop.  Handle -march=mipsN like -mipsN.

From-SVN: r129522

linux-unwind.h (ppc_fallback_frame_state): Point saved CR2 offset to low 32 bits of regs->ccr rather than the whole 64-bit...

	* config/rs6000/linux-unwind.h (ppc_fallback_frame_state): Point
	saved CR2 offset to low 32 bits of regs->ccr rather than the whole
	64-bit register in 64-bit libgcc.

From-SVN: r129520

From-SVN: r129518

	s-tasinf-mingw.ads, a-exetim-mingw.adb, a-exetim-mingw.ads
	for win32 targets.
	(EXTRA_GNATRTL_TASKING_OBJS): Add a-exetim.o for win32 targets.

From-SVN: r129515

	* config/avr/avr.c (avr_mcu_types): Add at90pwm2b, at90pwm3b.
	* config/avr/avr.h (LINK_SPEC): Likewise.
	(CRT_BINUTILS_SPECS): Likewsie.
	* config/avr/t-avr (MULTILIB_MATCHES): Likewise.

From-SVN: r129514

2007-10-20  Manuel Lopez-Ibanez  <manu@gcc.gnu.org>

	* doc/invoke.texi (Warning Options): Move -w, -Werror, -Werror=
	and -Wfatal-errors together.

From-SVN: r129513

        * gcc.dg/vect/vect.exp: Use -mcpu=970 instead of 7400.
        * gcc.dg/vect/costmodel/ppc/ppc-costmodel-vect.exp: Same.

From-SVN: r129512

	PR target/33812
	* config/rs6000/rs6000.c (rs6000_emit_epilogue): Revert 2007-05-16
	change for vrsave, ie restore after frame pop.

From-SVN: r129511

2007-10-20  Tobias Burnus  <burnus@net-b.de>

        PR fortran/33818
        * resolve.c (resolve_variable): Check that symbol is in the same
        namespace as the entry function.

2007-10-20  Tobias Burnus  <burnus@net-b.de>

        PR fortran/33818
        * gfortran.dg/entry_dummy_ref_3.f90: New.

From-SVN: r129510

2007-10-20  Paolo Carlini  <pcarlini@suse.de>

	* include/bits/stl_move.h (_GLIBCXX_MOVE): Wrap in parentheses.
	* include/bits/stl_algobase.h (__niter_base<>): Pass iterators
	by value, as everywhere else.

From-SVN: r129509

random (uniform_int<>::_M_call(_UniformRandomNumberGenerator&, result_type, result_type, true_type)): Fix small thinko.

2007-10-20  Paolo Carlini  <pcarlini@suse.de>

	* include/tr1_impl/random
	(uniform_int<>::_M_call(_UniformRandomNumberGenerator&, result_type,
	result_type, true_type)): Fix small thinko.

From-SVN: r129506

2007-10-20  Paul Thomas  <pault@gcc.gnu.org>
	    FX Coudert <fxcoudert@gcc.gnu.org>

	PR fortran/31608
	* trans-array.c (gfc_conv_expr_descriptor): For all except
	indirect references, use gfc_trans_scalar_assign instead of
	gfc_add_modify_expr.
	* iresolve.c (check_charlen_present): Separate creation of cl
	if necessary and add code to treat an EXPR_ARRAY.
	(gfc_resolve_char_achar): New function.
	(gfc_resolve_achar, gfc_resolve_char): Call it.
	(gfc_resolve_transfer): If the MOLD expression does not have a
	character length expression, get it from a constant length.

2007-10-20  Paul Thomas  <pault@gcc.gnu.org>
	    FX Coudert <fxcoudert@gcc.gnu.org>

	PR fortran/31608
	* gfortran.dg/char_cast_1.f90: New test.


Co-Authored-By: Francois-Xavier Coudert <fxcoudert@gcc.gnu.org>

From-SVN: r129505

From-SVN: r129502

2007-10-19  Steven G. Kargl  <kargl@gcc.gnu.org>

        * gfortran.dg/default_format_denormal_2.f90: xfail on FreeBSD.
        * gfortran.dg/large_real_kind_2.F90: ditto.
        * gfortran.dg/default_format_2.f90: ditto.
        * gfortran.dg/default_format_denormal_1.f90: ditto.

From-SVN: r129499

2007-10-19  David S. Miller  <davem@davemloft.net>

	* config/sparc/niagara2.md: Fix copyright notice.

From-SVN: r129498

2007-10-19  Sebastian Pop  <sebastian.pop@amd.com>

	PR tree-optimization/23820
	PR tree-optimization/24309
	PR tree-optimization/33766
	* testsuite/gcc.dg/tree-ssa/pr23820.c: New.
	* testsuite/gcc.dg/tree-ssa/pr24309.c: New.
	* testsuite/gcc.dg/tree-ssa/pr33766.c: New.
	* testsuite/gcc.dg/tree-ssa/ltrans-3.c: XFAILed.
	* tree-loop-linear.c (perfect_loop_nest_depth): New.
	(linear_transform_loops): Use perfect_loop_nest_depth.
	* lambda-code.c (perfect_nest_p): Outer loops in perfect nests 
	should have a single condition: their exit.

From-SVN: r129494

2007-10-19  Paolo Carlini  <pcarlini@suse.de>

	PR libstdc++/33815
	* include/tr1_impl/random
	(uniform_int<>::_M_call(_UniformRandomNumberGenerator&, result_type,
	result_type, true_type)): Avoid the modulo (which uses the low-order
	bits).

From-SVN: r129493

2007-10-19  Paolo Carlini  <pcarlini@suse.de>

	* include/bits/stl_algobase.h (struct __cm_assign,
	struct __copy_move, struct __copy_move_backward, move,
	move_backward): Add.
	(struct __copy, struct __copy_backward): Remove.
	(__copy_aux, __copy_backward_aux): Rename to...
	(__copy_move_a, __copy_move_backward_a): ... this, and
	adjust calls.
	(copy, copy_backward): Adjust calls.
	* include/bits/streambuf_iterator.h (__copy_aux): Rename
	to ...
	(__copy_move_a): ... this; add bool template parameter.
	* include/std/streambuf: Adjust friend declarations.
	* testsuite/util/testsuite_iterators.h
	(WritableObject<>::operator=(U&&)): Add.
	* testsuite/25_algorithms/move/1.cc: New.
	* testsuite/25_algorithms/move/requirements/
	explicit_instantiation/2.cc: Likewise.
	* testsuite/25_algorithms/move/requirements/
	explicit_instantiation/pod.cc: Likewise.
	* testsuite/25_algorithms/move_backward/1.cc: Likewise.
	* testsuite/25_algorithms/move_backward/requirements/
	explicit_instantiation/2.cc: Likewise.
	* testsuite/25_algorithms/move_backward/requirements/
	explicit_instantiation/pod.cc: Likewise.

From-SVN: r129492

2007-10-19  Richard Guenther  <rguenther@suse.de>

	PR middle-end/33816
	PR middle-end/32921
	* stor-layout.c (layout_type): Assert that aggregates do not
	have their alias sets set.
	* alias.c (get_alias_set): Return alias set zero for incomplete
	types, return the alias set of the element for incomplete array
	types, but do not remember these.

	* gfortran.dg/pr32921.f: New testcase.

From-SVN: r129491

2007-10-19  Jerry DeLisle  <jvdelisle@gcc.gnu.org>

	PR libfortran/33544
	* gfortran.dg/transfer_check_1.f90: Adjust options.

From-SVN: r129489

2007-10-19  Jerry DeLisle  <jvdelisle@gcc.gnu.org>

	PR fortran/33544
	* simplify.c (gfc_simplify_transfer): Only warn for short transfer when
	-Wsurprising is given.
	* invoke.texi: Document revised behavior.

From-SVN: r129488