2019-01-11  Thomas Schwinge  <thomas@codesourcery.com>
            James Norris  <jnorris@codesourcery.com>

	* libgomp.texi: Better distinguish OpenACC and OpenMP "Runtime
	Library Routines", and "Environment Variables".

Co-Authored-By: James Norris <jnorris@codesourcery.com>

From-SVN: r267841

2019-01-11  Martin Liska  <mliska@suse.cz>

	PR middle-end/88758
	* g++.dg/lto/pr88758_0.C: New test.
	* g++.dg/lto/pr88758_1.C: New test.

From-SVN: r267840

	PR bootstrap/88714
	* passes.c (finish_optimization_passes): Call print_combine_total_stats
	inside of pass_combine_1 dump rather than pass_profile_1.

From-SVN: r267839

When using a compiler build with:
...
+#define PTX_DEFAULT_VECTOR_LENGTH PTX_CTA_SIZE
...

consider a test-case:
...
int
main (void)
{
  #pragma acc parallel vector_length (64)
    #pragma acc loop worker
    for (unsigned int i = 0; i < 32; i++)
      #pragma acc loop vector
      for (unsigned int j = 0; j < 64; j++)
        ;

  return 0;
}
...

If num_workers is 16, either because:
- we add a "num_workers (16)" clause on the parallel directive, or
- we set "GOMP_OPENACC_DIM=:16:", or
- the libgomp plugin chooses 16 num_workers
we run into an illegal instruction at runtime, because a bar.sync instruction
tries to use a barrier 16.  The instruction is illegal, because ptx supports
only 16 barriers per CTA, and the valid range is 0..15.

The problem is that with a warp-multiple vector length, we use a code generation
scheme with a per-worker barrier.  And because barrier zero is reserved for
per-cta barrier, only the remaining 15 barriers can be used as per-worker
barrier, and consequently we can't use num_workers larger than 15.

This problem occurs only for vector_length 64.  For vector_length 32, we use a
different code generation scheme, and for vector_length >= 96, the maximum
num_workers is not big enough not to trigger this problem.

Also, this problem only occurs for num_workers 16.  As explained above,
num_workers 15 is safe to use, and 16 is already the maximum num_workers for
vector_length 64.

This patch fixes the problem in both the compiler (handling "num_workers (16)")
and in the libgomp nvptx plugin (with and without "GOMP_OPENACC_DIM=:16:").

2019-01-11  Tom de Vries  <tdevries@suse.de>

	* config/nvptx/nvptx.c (PTX_CTA_NUM_BARRIERS, PTX_PER_CTA_BARRIER)
	(PTX_NUM_PER_CTA_BARRIER, PTX_FIRST_PER_WORKER_BARRIER)
	(PTX_NUM_PER_WORKER_BARRIERS): Define.
	(nvptx_apply_dim_limits): Prevent vector_length 64 and
	num_workers 16.

	* plugin/plugin-nvptx.c (nvptx_exec): Prevent vector_length 64 and
	num_workers 16.

From-SVN: r267838

Move the defition of PTX_CTA_SIZE up in nvptx.c.

2019-01-11  Tom de Vries  <tdevries@suse.de>

	* config/nvptx/nvptx.c (PTX_CTA_SIZE): Move up.

From-SVN: r267837

Before the commit "[libgomp, testsuite, openacc] Don't use const int for
dimensions", the "const int" construct was used to set launch dimensions in
reductions-[1-5].c.  In the case of -xc -O0, the const int is implemented as a
variable by the C front-end.  Consequently, the nvptx back-end generated
warnings that vector_length was overridden to be hard-coded, rather than left to
be set at runtime.  The test-cases silenced these warnings by switching off all
warnings in the accelerator compiler using "-foffload=-w".

Given that no warnings occur anymore, remove the "-foffload=-w" setting.

2019-01-11  Tom de Vries  <tdevries@suse.de>

	* testsuite/libgomp.oacc-c-c++-common/reduction-1.c: Remove
	-foffload=-w.
	* testsuite/libgomp.oacc-c-c++-common/reduction-2.c: Same.
	* testsuite/libgomp.oacc-c-c++-common/reduction-3.c: Same.
	* testsuite/libgomp.oacc-c-c++-common/reduction-4.c: Same.
	* testsuite/libgomp.oacc-c-c++-common/reduction-5.c: Same.

From-SVN: r267836

Add a test-case that tests the "insufficient resources" fatal in the nvptx
libgomp plugin.

2019-01-11  Tom de Vries  <tdevries@suse.de>

	* testsuite/libgomp.oacc-c-c++-common/insufficient-resources.c: New
	test.

From-SVN: r267835

	PR libstdc++/88125
	* config/abi/pre/gnu.ver (GLIBCXX_3.4.6): Remove unused duplicate
	pattern for std::basic_stringbuf::str().

From-SVN: r267834

For 64-bit these should not be emitted without suffix in AT&T mode (as
being ambiguous that way); the suffixes are benign for 32-bit. For
consistency also omit the suffix in Intel mode for {,V}CVTSI2SxQ.

The omission has originally (prior to rev 260691) lead to wrong code
being generated for the 64-bit unsigned-to-float/double conversions (as
gas guesses an L suffix instead of the required Q one when the operand
is in memory). In all remaining cases (being changed here) the omission
would "just" lead to warnings with future gas versions.

As a result, arrange to check for the L suffixes in 32-bit test cases.

In order for related test cases to actually test what they're supposed
to test, add (seemingly unrelated) a few empty "asm volatile()".
Presumably there are more where constant propagation voids the intended
effect of the tests, but these are ones helping make sure the assembler
actually still assembles correctly the output after the changes here.

From-SVN: r267833

The recent changes to support operator<<(nullptr_t) changed the glob
patterns for existing operator<<(T) overloads, but did so incorrectly so
they still matched the new symbols. That broke Solaris bootstrap. This
patch replaces each of the existing globs by two more precise ones,
which match the old symbols but not the new ones.

	* config/abi/pre/gnu.ver (GLIBCXX_3.4): Correct recent changes to
	basic_ostream::operator<< patterns.

From-SVN: r267832

	PR rtl-optimization/88296
	* gcc.target/i386/pr88296.c: New test.

From-SVN: r267831

/cp
2019-01-11  Paolo Carlini  <paolo.carlini@oracle.com>

	* decl.c (start_decl): Improve error location.
	(grokdeclarator): Likewise, improve two locations.

/testsuite
2019-01-11  Paolo Carlini  <paolo.carlini@oracle.com>

	* g++.dg/diagnostic/extern-initialized.C: New.
	* g++.dg/ext/dllimport-initialized.C: Likewise.

From-SVN: r267830

2019-01-11  Thomas Koenig  <tkoenig@gcc.gnu.org>

	PR fortran/59345
	* trans-array.c (gfc_conv_parameter_array):  Temporary
	arrays generated for expressions do not need to be repacked.

2019-01-11  Thomas Koenig  <tkoenig@gcc.gnu.org>

	PR fortran/59345
	* gfortran.dg/internal_pack_16.f90: New test.

From-SVN: r267829

From-SVN: r267828

	PR target/88785
	* config/i386/sse.md (float<floatunssuffix>v2div2sf2): Turn into
	define_expand.
	(*float<floatunssuffix>v2div2sf2): New define_insn.
	(float<floatunssuffix>v2div2sf2_mask): Turn into define_expand.
	(*float<floatunssuffix>v2div2sf2_mask): New define_insn.
	(*float<floatunssuffix>v2div2sf2_mask_1): Replace
	subrtxes (const_vector:V2SF [(const_int 0) (const_int 0)]) with
	match_operands with "const0_operand" "C".

	* g++.target/i386/pr88785.C: New test.

From-SVN: r267825

2019-01-10  Tamar Christina  <tamar.christina@arm.com>

	* config/aarch64/aarch64-builtins.c
	(aarch64_init_builtins): Move aarch64_init_fcmla_laneq_builtins...
	(aarch64_init_simd_builtins): ...Here.

From-SVN: r267824

re PR rtl-optimization/87305 (Segfault in end_hard_regno in setup_live_pseudos_and_spill_after_risky_transforms on aarch64 big-endian)

2019-01-10  Vladimir Makarov  <vmakarov@redhat.com>

	PR rtl-optimization/87305
	* lra-assigns.c
	(setup_live_pseudos_and_spill_after_risky_transforms): Check
	allocation for big endian pseudos used as paradoxical subregs and
	spill them if it is wrong.
	* lra-constraints.c (lra_constraints): Add a comment.

2019-01-10  Vladimir Makarov  <vmakarov@redhat.com>

	PR rtl-optimization/87305
	* gcc.target/aarch64/pr87305.c: New.

From-SVN: r267823

2019-01-10  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/88792
	* tree-ssa-pre.c (get_representative_for): Do not return a
	value-number here.

	* gcc.dg/torture/pr88792.c: New testcase.

From-SVN: r267821

2019-01-10  Steven G. Kargl  <kargl@gcc.gnu.org>

	PR fortran/86322
	* decl.c (top_var_list): Set locus of expr.
	(gfc_match_data): Detect pointer on non-rightmost part-refs.

2019-01-10  Steven G. Kargl  <kargl@gcc.gnu.org>

	PR fortran/86322
	* gfortran.dg/pr86322_1.f90: New test.
	* gfortran.dg/pr86322_2.f90: Ditto.
	* gfortran.dg/pr86322_3.f90: Ditto.

From-SVN: r267820

Currently Return Address Signing is only supported in lp64. Thus the
tests that I added recently (that enables return address signing by the
mbranch-protection=standard option), should also be exempted from testing in
ilp32. This patch adds the needed dg-require-effective-target directive in the
tests.

*** gcc/testsuite/ChangeLog ***

2019-01-10  Sudakshina Das  <sudi.das@arm.com>

	* gcc.target/aarch64/bti-1.c: Exempt for ilp32.
	* gcc.target/aarch64/bti-2.c: Likewise.
	* gcc.target/aarch64/bti-3.c: Likewise.

Committed as obvious.

From-SVN: r267818

re PR middle-end/84877 (Local stack copy of BLKmode parameter on the stack is not aligned when the requested alignment exceeds MAX_SUPPORTED_STACK_ALIGNMENT)

	PR middle-end/84877
	PR bootstrap/88450
	* function.c (assign_stack_local_1): Revert the 2018-11-21 changes.
	(assign_parm_setup_block): Do the argument slot realignment here
	instead.

From-SVN: r267812

	* testsuite/27_io/filesystem/operations/last_write_time.cc: Fix
	test failures on targets with 32-bit time_t.

From-SVN: r267811

The C++2a draft specifies the value 201811L for this, but as an
extension we return the number of elements erased. This is expected to
be standardised, so the macro has the value 201900L until a proper value
is specified in the draft.

	* include/bits/erase_if.h: Define __cpp_lib_erase_if.
	* include/std/deque: Likewise.
	* include/std/forward_list: Likewise.
	* include/std/list: Likewise.
	* include/std/string: Likewise.
	* include/std/vector: Likewise.
	* include/std/version: Likewise.
	* testsuite/21_strings/basic_string/erasure.cc: Test macro.
	* testsuite/23_containers/deque/erasure.cc: Likewise.
	* testsuite/23_containers/forward_list/erasure.cc: Likewise.
	* testsuite/23_containers/list/erasure.cc: Likewise.
	* testsuite/23_containers/map/erasure.cc: Likewise.
	* testsuite/23_containers/set/erasure.cc: Likewise.
	* testsuite/23_containers/unordered_map/erasure.cc: Likewise.
	* testsuite/23_containers/unordered_set/erasure.cc: Likewise.
	* testsuite/23_containers/vector/erasure.cc: Likewise.

From-SVN: r267810

The AI_NUMERICSERV constant is missing from old Darwin systems, so only
use it if it's supported.

	* include/experimental/internet [AI_NUMERICSERV]
	(resolver_base::numeric_service): Define conditionally.
	* testsuite/experimental/net/internet/resolver/base.cc: Test it
	conditionally.
	* testsuite/experimental/net/internet/resolver/ops/lookup.cc:
	Likewise.

From-SVN: r267809

2019-01-10  Ville Voutilainen  <ville.voutilainen@gmail.com>
	    Jonathan Wakely  <jwakely@redhat.com>

	Implement LWG 2221
	* config/abi/pre/gnu.ver (GLIBCXX_3.4): Tighten patterns.
	(GLIBCXX_3.4.26): Add new exports.
	* include/Makefile.am: Add ostream-inst.cc. Move string-inst.cc to
	correct list of sources.
	* include/Makefile.in: Regenerate.
	* include/std/ostream (operator<<(nullptr_t)): New member function.
	* src/c++17/ostream-inst.cc: New file.
	* testsuite/27_io/basic_ostream/inserters_other/char/lwg2221.cc: New
	test.

Co-Authored-By: Jonathan Wakely <jwakely@redhat.com>

From-SVN: r267808

	libgomp/

	PR lto/71959
	* testsuite/libgomp.oacc-c++/pr71959-aux.cc: New.
	* testsuite/libgomp.oacc-c++/pr71959.C: New.

Co-Authored-By: Julian Brown <julian@codesourcery.com>

From-SVN: r267806

This allows to use unified asm syntax when compiling for the
ARM instruction. This matches documentation and seems what the
initial patch was intended doing when the flag got added.

2019-01-10  Stefan Agner  <stefan@agner.ch>

	PR target/88648
	* config/arm/arm.c (arm_option_override_internal): Force
	opts->x_inline_asm_unified to true only if TARGET_THUMB2_P.

	* gcc.target/arm/pr88648-asm-syntax-unified.c: Add test to
	check if -masm-syntax-unified gets applied properly.

From-SVN: r267804

Also fix some tests that were not cleaning up after themselves, as
identified by the change to nonexistent_path.

	* testsuite/util/testsuite_fs.h (nonexistent_path): Include name
	of the source file containing the caller.
	* testsuite/27_io/filesystem/iterators/directory_iterator.cc: Remove
	directories created by test.
	* testsuite/27_io/filesystem/iterators/recursive_directory_iterator.cc:
	Likewise.
	* testsuite/experimental/filesystem/iterators/directory_iterator.cc:
	Likewise.
	* testsuite/experimental/filesystem/iterators/
	recursive_directory_iterator.cc: Likewise.

From-SVN: r267801

	PR tree-optimization/88775
	* include/bits/stl_function.h (greater<_Tp*>::operator(),
	less<_Tp*>::operator(), greater_equal<_Tp*>::operator(),
	less_equal<_Tp*>::operator()): Use __builtin_is_constant_evaluated
	instead of __builtin_constant_p if available.  Don't bother with
	the pointer comparison in C++11 and earlier.

From-SVN: r267800

	PR c/88568
	* attribs.c (handle_dll_attribute): Clear TREE_STATIC after setting
	DECL_EXTERNAL.

	* gcc.dg/pr88568.c: New test.

From-SVN: r267799

From-SVN: r267797

2019-01-10  Tamar Christina  <tamar.christina@arm.com>

	* config/arm/arm-builtins.c
	(enum arm_type_qualifiers): Add qualifier_lane_pair_index.
	(MAC_LANE_PAIR_QUALIFIERS): New.
	(arm_expand_builtin_args): Use it.
	(arm_expand_builtin_1): Likewise.
	* config/arm/arm-protos.h (neon_vcmla_lane_prepare_operands): New.
	* config/arm/arm.c (neon_vcmla_lane_prepare_operands): New.
	* config/arm/arm-c.c (arm_cpu_builtins): Add __ARM_FEATURE_COMPLEX.
	* config/arm/arm_neon.h:
	(vcadd_rot90_f16): New.
	(vcaddq_rot90_f16): New.
	(vcadd_rot270_f16): New.
	(vcaddq_rot270_f16): New.
	(vcmla_f16): New.
	(vcmlaq_f16): New.
	(vcmla_lane_f16): New.
	(vcmla_laneq_f16): New.
	(vcmlaq_lane_f16): New.
	(vcmlaq_laneq_f16): New.
	(vcmla_rot90_f16): New.
	(vcmlaq_rot90_f16): New.
	(vcmla_rot90_lane_f16): New.
	(vcmla_rot90_laneq_f16): New.
	(vcmlaq_rot90_lane_f16): New.
	(vcmlaq_rot90_laneq_f16): New.
	(vcmla_rot180_f16): New.
	(vcmlaq_rot180_f16): New.
	(vcmla_rot180_lane_f16): New.
	(vcmla_rot180_laneq_f16): New.
	(vcmlaq_rot180_lane_f16): New.
	(vcmlaq_rot180_laneq_f16): New.
	(vcmla_rot270_f16): New.
	(vcmlaq_rot270_f16): New.
	(vcmla_rot270_lane_f16): New.
	(vcmla_rot270_laneq_f16): New.
	(vcmlaq_rot270_lane_f16): New.
	(vcmlaq_rot270_laneq_f16): New.
	(vcadd_rot90_f32): New.
	(vcaddq_rot90_f32): New.
	(vcadd_rot270_f32): New.
	(vcaddq_rot270_f32): New.
	(vcmla_f32): New.
	(vcmlaq_f32): New.
	(vcmla_lane_f32): New.
	(vcmla_laneq_f32): New.
	(vcmlaq_lane_f32): New.
	(vcmlaq_laneq_f32): New.
	(vcmla_rot90_f32): New.
	(vcmlaq_rot90_f32): New.
	(vcmla_rot90_lane_f32): New.
	(vcmla_rot90_laneq_f32): New.
	(vcmlaq_rot90_lane_f32): New.
	(vcmlaq_rot90_laneq_f32): New.
	(vcmla_rot180_f32): New.
	(vcmlaq_rot180_f32): New.
	(vcmla_rot180_lane_f32): New.
	(vcmla_rot180_laneq_f32): New.
	(vcmlaq_rot180_lane_f32): New.
	(vcmlaq_rot180_laneq_f32): New.
	(vcmla_rot270_f32): New.
	(vcmlaq_rot270_f32): New.
	(vcmla_rot270_lane_f32): New.
	(vcmla_rot270_laneq_f32): New.
	(vcmlaq_rot270_lane_f32): New.
	(vcmlaq_rot270_laneq_f32): New.
	* config/arm/arm_neon_builtins.def (vcadd90, vcadd270, vcmla0, vcmla90,
	vcmla180, vcmla270, vcmla_lane0, vcmla_lane90, vcmla_lane180, vcmla_lane270,
	vcmla_laneq0, vcmla_laneq90, vcmla_laneq180, vcmla_laneq270,
	vcmlaq_lane0, vcmlaq_lane90, vcmlaq_lane180, vcmlaq_lane270): New.
	* config/arm/neon.md (neon_vcmla_lane<rot><mode>,
	neon_vcmla_laneq<rot><mode>, neon_vcmlaq_lane<rot><mode>): New.
	* config/arm/arm.c (arm_arch8_3, arm_arch8_4): New.
	* config/arm/arm.h (TARGET_COMPLEX, arm_arch8_3, arm_arch8_4): New.
	(arm_option_reconfigure_globals): Use them.
	* config/arm/iterators.md (VDF, VQ_HSF): New.
	(VCADD, VCMLA): New.
	(VF_constraint, rot, rotsplit1, rotsplit2): Add V4HF and V8HF.
	* config/arm/neon.md (neon_vcadd<rot><mode>, neon_vcmla<rot><mode>): New.
	* config/arm/unspecs.md (UNSPEC_VCADD90, UNSPEC_VCADD270,
	UNSPEC_VCMLA, UNSPEC_VCMLA90, UNSPEC_VCMLA180, UNSPEC_VCMLA270): New.

gcc/testsuite/ChangeLog:

2019-01-10  Tamar Christina  <tamar.christina@arm.com>

	* gcc.target/aarch64/advsimd-intrinsics/vector-complex.c: Add AArch32 regexpr.
	* gcc.target/aarch64/advsimd-intrinsics/vector-complex_f16.c: Likewise.

From-SVN: r267796

gcc/ChangeLog:

2019-01-10  Tamar Christina  <tamar.christina@arm.com>

	* config/aarch64/aarch64-builtins.c (enum aarch64_type_qualifiers): Add qualifier_lane_pair_index.
	(emit-rtl.h): Include.
	(TYPES_QUADOP_LANE_PAIR): New.
	(aarch64_simd_expand_args): Use it.
	(aarch64_simd_expand_builtin): Likewise.
	(AARCH64_SIMD_FCMLA_LANEQ_BUILTINS, aarch64_fcmla_laneq_builtin_datum): New.
	(FCMLA_LANEQ_BUILTIN, AARCH64_SIMD_FCMLA_LANEQ_BUILTIN_BASE,
	AARCH64_SIMD_FCMLA_LANEQ_BUILTINS, aarch64_fcmla_lane_builtin_data,
	aarch64_init_fcmla_laneq_builtins, aarch64_expand_fcmla_builtin): New.
	(aarch64_init_builtins): Add aarch64_init_fcmla_laneq_builtins.
	(aarch64_expand_buildin): Add AARCH64_SIMD_BUILTIN_FCMLA_LANEQ0_V2SF,
	AARCH64_SIMD_BUILTIN_FCMLA_LANEQ90_V2SF, AARCH64_SIMD_BUILTIN_FCMLA_LANEQ180_V2SF,
 	AARCH64_SIMD_BUILTIN_FCMLA_LANEQ2700_V2SF, AARCH64_SIMD_BUILTIN_FCMLA_LANEQ0_V4HF,
	AARCH64_SIMD_BUILTIN_FCMLA_LANEQ90_V4HF, AARCH64_SIMD_BUILTIN_FCMLA_LANEQ180_V4HF,
	AARCH64_SIMD_BUILTIN_FCMLA_LANEQ270_V4HF.
	* config/aarch64/iterators.md (FCMLA_maybe_lane): New.
	* config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins): Add __ARM_FEATURE_COMPLEX.
	* config/aarch64/aarch64-simd-builtins.def (fcadd90, fcadd270, fcmla0, fcmla90,
	fcmla180, fcmla270, fcmla_lane0, fcmla_lane90, fcmla_lane180, fcmla_lane270,
	fcmla_laneq0, fcmla_laneq90, fcmla_laneq180, fcmla_laneq270,
	fcmlaq_lane0, fcmlaq_lane90, fcmlaq_lane180, fcmlaq_lane270): New.
	* config/aarch64/aarch64-simd.md (aarch64_fcmla_lane<rot><mode>,
	aarch64_fcmla_laneq<rot>v4hf, aarch64_fcmlaq_lane<rot><mode>,aarch64_fcadd<rot><mode>,
	aarch64_fcmla<rot><mode>): New.
	* config/aarch64/arm_neon.h:
	(vcadd_rot90_f16): New.
	(vcaddq_rot90_f16): New.
	(vcadd_rot270_f16): New.
	(vcaddq_rot270_f16): New.
	(vcmla_f16): New.
	(vcmlaq_f16): New.
	(vcmla_lane_f16): New.
	(vcmla_laneq_f16): New.
	(vcmlaq_lane_f16): New.
	(vcmlaq_rot90_lane_f16): New.
	(vcmla_rot90_laneq_f16): New.
	(vcmla_rot90_lane_f16): New.
	(vcmlaq_rot90_f16): New.
	(vcmla_rot90_f16): New.
	(vcmlaq_laneq_f16): New.
	(vcmla_rot180_laneq_f16): New.
	(vcmla_rot180_lane_f16): New.
	(vcmlaq_rot180_f16): New.
	(vcmla_rot180_f16): New.
	(vcmlaq_rot90_laneq_f16): New.
	(vcmlaq_rot270_laneq_f16): New.
	(vcmlaq_rot270_lane_f16): New.
	(vcmla_rot270_laneq_f16): New.
	(vcmlaq_rot270_f16): New.
	(vcmla_rot270_f16): New.
	(vcmlaq_rot180_laneq_f16): New.
	(vcmlaq_rot180_lane_f16): New.
	(vcmla_rot270_lane_f16): New.
	(vcadd_rot90_f32): New.
	(vcaddq_rot90_f32): New.
	(vcaddq_rot90_f64): New.
	(vcadd_rot270_f32): New.
	(vcaddq_rot270_f32): New.
	(vcaddq_rot270_f64): New.
	(vcmla_f32): New.
	(vcmlaq_f32): New.
	(vcmlaq_f64): New.
	(vcmla_lane_f32): New.
	(vcmla_laneq_f32): New.
	(vcmlaq_lane_f32): New.
	(vcmlaq_laneq_f32): New.
	(vcmla_rot90_f32): New.
	(vcmlaq_rot90_f32): New.
	(vcmlaq_rot90_f64): New.
	(vcmla_rot90_lane_f32): New.
	(vcmla_rot90_laneq_f32): New.
	(vcmlaq_rot90_lane_f32): New.
	(vcmlaq_rot90_laneq_f32): New.
	(vcmla_rot180_f32): New.
	(vcmlaq_rot180_f32): New.
	(vcmlaq_rot180_f64): New.
	(vcmla_rot180_lane_f32): New.
	(vcmla_rot180_laneq_f32): New.
	(vcmlaq_rot180_lane_f32): New.
	(vcmlaq_rot180_laneq_f32): New.
	(vcmla_rot270_f32): New.
	(vcmlaq_rot270_f32): New.
	(vcmlaq_rot270_f64): New.
	(vcmla_rot270_lane_f32): New.
	(vcmla_rot270_laneq_f32): New.
	(vcmlaq_rot270_lane_f32): New.
	(vcmlaq_rot270_laneq_f32): New.
	* config/aarch64/aarch64.h (TARGET_COMPLEX): New.
	* config/aarch64/iterators.md (UNSPEC_FCADD90, UNSPEC_FCADD270,
	UNSPEC_FCMLA, UNSPEC_FCMLA90, UNSPEC_FCMLA180, UNSPEC_FCMLA270): New.
	(FCADD, FCMLA): New.
	(rot): New.
	* config/arm/types.md (neon_fcadd, neon_fcmla): New.

gcc/testsuite/ChangeLog:

2019-01-10  Tamar Christina  <tamar.christina@arm.com>

	* gcc.target/aarch64/advsimd-intrinsics/vector-complex.c: New test.
	* gcc.target/aarch64/advsimd-intrinsics/vector-complex_f16.c: New test.

From-SVN: r267795

gcc/testsuite/ChangeLog:

2019-01-10  Tamar Christina  <tamar.christina@arm.com>

	* lib/target-supports.exp
	(check_effective_target_arm_v8_3a_complex_neon_ok_nocache,
	check_effective_target_arm_v8_3a_complex_neon_ok,
	add_options_for_arm_v8_3a_complex_neon,
	check_effective_target_arm_v8_3a_complex_neon_hw,
	check_effective_target_vect_complex_rot_N): New.

From-SVN: r267794

2019-01-09  Steven G. Kargl  <kargl@gcc.gnu.org>

	PR fortran/88376
	* resolve.c (is_illegal_recursion): Remove an assert().

2019-01-09  Steven G. Kargl  <kargl@gcc.gnu.org>

	PR fortran/88376
	* gfortran.dg/pr88376.f90: New test.

From-SVN: r267793

From-SVN: r267792

	PR go/86343
	* go-gcc.cc (Gcc_backend::set_placeholder_struct_type): Go back to
	build_distinct_type_copy, but copy the fields so that they have
	the right DECL_CONTEXT.

From-SVN: r267789

This removes updates the removal date of all deprecations in phobos.
Many of the marked functions have passed their end dates, and are now
absent in upstream.

Reviewed-on: https://github.com/dlang/phobos/pull/6828

From-SVN: r267788

2019-01-09  Sandra Loosemore  <sandra@codesourcery.com>

	PR other/16615 [5/5]

	gcc/po/
	* gcc.pot: Regenerate.

From-SVN: r267787

2019-01-09  Sandra Loosemore  <sandra@codesourcery.com>

	PR other/16615 [4/5]

	gcc/
	* config/pa/pa.c: Change "can not" to "cannot".
	* gimple-ssa-evrp-analyze.c: Likewise.
	* ipa-icf.c: Likewise.
	* ipa-polymorphic-call.c: Likewise.
	* ipa-pure-const.c: Likewise.
	* lra-constraints.c: Likewise.
	* lra-remat.c: Likewise.
	* reload1.c: Likewise.
	* reorg.c: Likewise.
	* tree-ssa-uninit.c: Likewise.

	gcc/ada/
	* exp_ch11.adb: Change "can not" to "cannot".
	* sem_ch4.adb: Likewise.

	gcc/fortran/
	* expr.c: Change "can not" to "cannot".

	libobjc/
	* objc/runtime.h: Change "can not" to "cannot".

From-SVN: r267786