src/codegen/verilog · 9e660dbe745bcf24c861dcfa4a4671d333fb5c21 · wenyuanbo / tic · GitLab

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[VERILOG] Basic Verilog Testflow (#70) · 9e660dbe
```
* [VERILOG] Basic Verilog Testflow

* fix build

* fix the comment

* fix lint in verilog
```
Tianqi Chen committed Mar 13, 2017
9e660dbe

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