- 20 Mar, 2020 1 commit
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As part of the unified IR refactor. This PR refactors the target codegen to use IRModule containing tir::PrimFuncs. In order to break the refactor into several steps without breaking the codebase, we built an conversion pass to convert Array<LoweredFunc> into IRModule. The follow-up refactors will gradually move the passes covered by IRModule up until we cover all the passes. Then we can remove the additional redundant concepts such as LoweredFunc.
Tianqi Chen committed
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- 19 Jan, 2020 2 commits
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This PR moves the codegen related code into the target folder, as they are target specific functionalities. We also adopt the term "compiler driver" in common compiler infra such as rust, GHC and clang. As a result, build_module is moved into the driver folder.
Tianqi Chen committed -
TIR is the new namespace for low-level IR for tensor-level optimizations and loop transformations. This PR establishes the namespace and files. - lowered_func.h,buffer.h,data_layout.h -> tir/buffer.h,tir/data_layout.h,tir/lowered_func.h - ir.h -> tir/expr.h, tir/stmt.h - ir_functor_ext.h -> tir/expr_functor.h, tir/stmt_functor.h
Tianqi Chen committed
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- 16 Jan, 2020 1 commit
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Spread the arithmetic.h into several components and move into arith subfolder. The arith namespace will be used for arithmetic expression pattern detections and simplifications.
Tianqi Chen committed
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- 15 Jan, 2020 1 commit
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* [REFACTOR][IR] Unify IntImm and UIntImm This PR unifies UIntImm and IntImm to simplify the codebase. Unsigned integer constants will also be stored as IntImm. For uint constant that does not fit into int64(rare case), we introduced an intrinsic tvm_big_uint_imm to construct such intgers by its lower and higher 32bits. * [REFACTOR][IR] Remove UIntImm to use IntImm * rename big->large
Tianqi Chen committed
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- 09 Jan, 2020 1 commit
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* [REFACTOR][IR] tvm::Expr -> PrimExpr(Primitive Expr) As part of unified IR, we will need to unify relay::Expr and the current tvm::Expr under the same base type. From the techinical point of view. tvm::Expr is a "primitive" expression that only contains POD types and handles and does not do life-cycle management. This PR renames Expr->PrimExpr to clarify that. We will send a subsequent PR to introduce the base expr class. * Remove legacy VarExpr and ExprHash/Equal
Tianqi Chen committed
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- 08 Jan, 2020 1 commit
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* [REFACTOR][IR] Variable -> VarNode * [REFACTOR][IR] Add/Sub/Mul/Div -> AddNode/SubNode etc. * [REFACTOR][IR] Min/Max/FloorDiv/FloorMod -> MinNode/MaxNode etc. * [REFACTOR][IR] EQ/NE/LT/LE/GT/GE/Select -> EQNode/NENode etc. * [REFACTOR][IR] Add Node suffix to Select/Call/Load/Ramp/Shuffle/Let * [REFACTOR][IR] Add node suffix to IntImm/UIntImm/FloatImm/StringImm * [REFACTOR][IR] Add Node suffix to Any, AttrStmt, AssertStmt * [REFACTOR][IR] Add Node suffix to Store/Provide/Allocate/Free * [REFACTOR][IR] Add Node suffix to ProducerConsumer * Fix lint * style updates, test fixes
Tianqi Chen committed
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- 06 Jan, 2020 1 commit
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* [REFACTOR][IR] Introduce SeqStmt to replace Block ir::Block was used to represent a sequence of Stmts in the original low-level IR. The nested ir::Block structure is not really friendly for recursive visits, especially when the statements are unrolled. This PR introduce a SeqStmt that directly stores a sequence of statements in an Array container. The new SeqStmt will be used as a replacement of the original Block structure. * [REFACTOR] Migrate use of Block to SeqStmt. * [REFACTOR] Remove Block * Add more comments per yizhi's comment
Tianqi Chen committed
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- 22 Dec, 2019 1 commit
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dtype.h -> runtime/data_type.h Changes: - Rename all old reference of tvm::Type to DataType - ExprNode.type -> ExprNode.dtype - Expr.type() -> Expr.dtype() - Change Expr related functions to expr_operator. - DataType::min() -> min_value(DataType) - DataType::max() -> max_value(DataType) - Move type constructor Int, UInt, Float, Handle, Bool into DataType. - Int(bits) -> DataType::Int(bits) - UInt(bits) -> DataType::UInt(bits)
Tianqi Chen committed
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- 24 Nov, 2019 1 commit
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* [LINT] Improve the check tool to handle ASF copyright message. * [LINT] Remove unnecessary copyright message as per ASF requirement. * Fix codegen hybrid * [LINT] Broaden license checks to include html, xml * [LINT] Fix rest of the files * Fix notice * [LINT] Improve check file type error message
Tianqi Chen committed
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- 01 Aug, 2019 1 commit
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Jian Weng committed
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- 21 Jul, 2019 1 commit
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Tianqi Chen committed
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- 18 Jul, 2019 1 commit
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Andrew Tulloch committed
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- 08 Apr, 2019 1 commit
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* [HEADER] ASF header dir=include * [HEADER] ASF Header dir=src * [HEADER] ASF Header -dir=python * [HEADER] ASF header dir=topi * [HEADER] ASF Header dir=nnvm * [HEADER] ASF Header -dir=tutorials * [HEADER] ASF Header dir=tests * [HEADER] ASF Header -dir=docker * fix whitespace * [HEADER] ASF Header -dir=jvm * [HEADER] ASF Header -dir=web * [HEADER] ASF Header --dir=apps * [HEADER] ASF Header --dir=vta * [HEADER] ASF Header -dir=go * temp * [HEADER] ASF Header --dir=rust * [HEADER] Add ASF Header --dir=cmake * [HEADER] ASF Header --dir=docs * [HEADER] Header for Jenkinsfile * [HEADER] ASF Header to toml and md * [HEADER] ASF Header to gradle * Finalize rat cleanup * Fix permission * Fix java test * temporary remove nnvm onnx test
Tianqi Chen committed
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- 12 Mar, 2019 1 commit
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Tianqi Chen committed
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- 02 Mar, 2019 1 commit
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Tianqi Chen committed
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- 06 Nov, 2018 1 commit
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Tianqi Chen committed
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- 23 Aug, 2018 1 commit
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MORITA Kazutaka committed
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- 25 Jul, 2018 1 commit
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Tianqi Chen committed
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- 08 Nov, 2017 1 commit
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* Support vector operations for AMD (llvm IR) * fix whitespace * update comments, docstring
eqy committed
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- 16 Oct, 2017 1 commit
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* [CODEGEN] Allow link additional module * fix py3 * add register back
Tianqi Chen committed
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- 20 Sep, 2017 1 commit
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* [CODEGEN] Redo CodegenLLVM. * Add remarks about origin of the pass Properly acknowledge related projects * Fix and expression
Tianqi Chen committed
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- 13 Sep, 2017 1 commit
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* added initial llvm codegen for amdgpu * fixed whitespace * fixed hsaco gen from ir * fixed targetmachine for rocm and added GetSource for rocm * fixed whitespace issues * changed statement to use less than 100 lines * added intrinsics for workgroup - rocm * whitespace - newline error fix * fixed error msg for workitem-workgroup intrinsics * added llvm ir dump for rocm codegen * [ROCM] changed codegen to emit proper amdgpu kernel header * fixed whitespace error * fixed whitespace error- 2 * fixed AddFunction to not to use extra arg 1. Changed AddFunctionInternal to not to take extra arg for target type 2. Use Target from CodeGenLLVM to check for AMDGPU target * fixed whitespaces * fixed whitespaces 2 * fixed codegen for AMDGPU - now generating valid IR * fixed codegen depending on code review * reviewed alignment for amd devices * added code to dump code object to file * fixed cpplint errors * print out IR after pass manager * added code to dump asm, obj to file and std string * fixed whitespaces * Update codegen_amdgpu.cc * used registry for amdgpu llvm * Fixed whitespaces * added code for calling linker * fixed formatting errors * added rocm link python interface * fixed pylint issues and added more body to the function * added doc string * added doc string for module * fixed python code after review, fixed llvm object codegen * fixed linker to generate code object * removed dumping to output file and debugging log out * fixed lint for python code * added fault check after running linker * removed print statement in rocm.py * changed rocm lld linker to raise runtimeerror than emitting error log to stderr * changed the way linker command line is pass to subprocess.popen * removed redundant code and reuse tvm utils * removed commented out code * removed cloning of unused modules, and put IR into string
Aditya Atluri committed
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- 28 Aug, 2017 1 commit
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* [CODEGEN] NVPTX backend. * Fix pylint * use fix
Tianqi Chen committed
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- 20 Aug, 2017 1 commit
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Tianqi Chen committed
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- 08 Aug, 2017 1 commit
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Tianqi Chen committed
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- 05 Aug, 2017 1 commit
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Tianqi Chen committed
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- 19 Jul, 2017 1 commit
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Tianqi Chen committed
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- 16 Jul, 2017 1 commit
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Tianqi Chen committed
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- 08 Jul, 2017 1 commit
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Tianqi Chen committed
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- 07 Jul, 2017 1 commit
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* [RUNTIME] Add System Lib * lint * lint * fix compile
Tianqi Chen committed
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- 06 Jul, 2017 1 commit
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* [CODEGEN/PASS] add restricted, alignment option * fix lint * Fix the alloca
Tianqi Chen committed
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- 21 Jun, 2017 1 commit
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* [CODEGEN] Make codegen registerable * fix llvm disbaled
Tianqi Chen committed
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- 18 Jun, 2017 1 commit
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* [CODEGEN] More storage alignment info aware generation * fix * fix * fix warning
Tianqi Chen committed
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- 25 May, 2017 1 commit
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Tianqi Chen committed
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- 30 Apr, 2017 1 commit
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* [CODEGEN/PASS] Improve callpacked lowering, allow pass array callback. * fix cython
Tianqi Chen committed
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- 25 Apr, 2017 1 commit
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* [PASS] StorageRewrite, reuse memory pass as in NNVM. * fix issue
Tianqi Chen committed
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- 14 Mar, 2017 1 commit
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* [RUNTIME] Refactor runtime to be DLPack compatible. Enable plugin of new runtime. * fix mac compile * ok
Tianqi Chen committed
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- 05 Mar, 2017 1 commit
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* [IterVar/REFACTOR] Add types to IterVar * [ARITH/REFACTOR] Move IntSet to include * [REFACTOR/OP] Move Op detail to seperate folder. * fix test
Tianqi Chen committed
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- 02 Mar, 2017 1 commit
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Tianqi Chen committed
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