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  1. 21 Mar, 2018 22 commits
  3. 20 Mar, 2018 18 commits
    • re PR target/84838 (Minor grammar fixes for x86 options) · 1527df58 
      	PR target/84838
	* Minor grammar fixes for x86 options.

From-SVN: r258694
      David H. Gutteridge committed
    • re PR libstdc++/84998 (std::hash<std::bitset<N>> fails in Debug Mode) · 5dfb5e5b 
      2018-03-20  François Dumont  <fdumont@gcc.gnu.org>

	PR libstdc++/84998
	* include/bits/stl_bvector.h: Fix std::hash friend declaration.
	* include/std/bitset: Likewise.
	* include/bits/stl_map.h (std::map<>): Fix _Rb_tree_merge_helper friend
	declaration.
	* include/bits/stl_multimap.h (std::multimap<>): Likewise.
	* include/bits/stl_multiset.h (std::multiset<>): Likewise.
	* include/bits/stl_set.h (std::set<>): Likewise.
	* include/bits/unordered_map.h (std::unordered_map<>): Fix
	_Hash_merge_helper friend declaration.
	(std::unordered_multimap<>): Likewise.
	* include/bits/unordered_set.h (std::unordered_set<>): Likewise.
	(std::unordered_multiset<>): Likewise.

From-SVN: r258693
      François Dumont committed
    • re PR debug/84875 (ICE in maybe_record_trace_start, at dwarf2cfi.c:2348 on s390x) · 6f21dc3c 
      	PR debug/84875
	* dce.c (delete_unmarked_insns): Don't remove frame related noop moves
	holding REG_CFA_RESTORE notes, instead turn them into a USE.

	* gcc.dg/pr84875.c: New test.

From-SVN: r258692
      Jakub Jelinek committed
    • re PR c++/84927 (ICE with NSDMI and reference) · 1efb1dc2 
      	PR c++/84927
	* constexpr.c (cxx_eval_bare_aggregate): Update constructor's flags
	as we evaluate the elements.
	(cxx_eval_constant_expression): Verify constructor's flags
	unconditionally.

	* g++.dg/cpp1y/nsdmi-aggr9.C: New test.

From-SVN: r258691
      Marek Polacek committed
    • PR c++/84978, ICE with NRVO. · f5f035a3 
      	* cvt.c (cp_get_fndecl_from_callee): Add fold parameter.
	(cp_get_callee_fndecl_nofold): New.
	* cp-gimplify.c (cp_genericize_r): Use it instead.
	* call.c (check_self_delegation): Likewise.

From-SVN: r258689
      Jason Merrill committed
    • re PR target/83789 (__builtin_altivec_lvx fails for powerpc for altivec-4.c) · 91d014ff 
      	PR target/83789
	* config/rs6000/altivec.md (altivec_lvx_<mode>_2op): Delete define_insn.
	(altivec_lvx_<mode>_1op): Likewise.
	(altivec_stvx_<mode>_2op): Likewise.
	(altivec_stvx_<mode>_1op): Likewise.
	(altivec_lvx_<VM2:mode>): New define_expand.
	(altivec_stvx_<VM2:mode>): Likewise.
	(altivec_lvx_<VM2:mode>_2op_<P:mptrsize>): New define_insn.
	(altivec_lvx_<VM2:mode>_1op_<P:mptrsize>): Likewise.
	(altivec_stvx_<VM2:mode>_2op_<P:mptrsize>): Likewise.
	(altivec_stvx_<VM2:mode>_1op_<P:mptrsize>): Likewise.
	* config/rs6000/rs6000-p8swap.c (rs6000_gen_stvx): Use new expanders.
	(rs6000_gen_lvx): Likewise.
	* config/rs6000/rs6000.c (altivec_expand_lv_builtin): Likewise.
	(altivec_expand_stv_builtin): Likewise.
	(altivec_expand_builtin): Likewise.
	* config/rs6000/vector.md: Likewise.

From-SVN: r258688
      Peter Bergner committed
    • This PR shows that we get the load/store_lanes logic wrong for arm big-endian. · 770ebe99 
      It is tricky to get right. Aarch64 does it by adding the appropriate lane-swapping
operations during expansion.

I'd like to do the same on arm eventually, but we'd need to port and validate the VTBL-generating
code and add it to all the right places and I'm not comfortable enough doing it for GCC 8, but I am keen
in getting the wrong-code fixed.
As I say in the PR, vectorisation on armeb is already severely restricted (we disable many patterns on BYTES_BIG_ENDIAN)
and the load/store_lanes patterns really were not working properly at all, so disabling them is not
a radical approach.

The way to do that is to return false in ARRAY_MODE_SUPPORTED_P for BYTES_BIG_ENDIAN.

Bootstrapped and tested on arm-none-linux-gnueabihf.
Also tested on armeb-none-eabi.


     PR target/82518
     * config/arm/arm.c (arm_array_mode_supported_p): Return false for
     BYTES_BIG_ENDIAN.

     * lib/target-supports.exp (check_effective_target_vect_load_lanes):
     Disable for armeb targets.
     * gcc.target/arm/pr82518.c: New test.

From-SVN: r258687
      Kyrylo Tkachov committed
    • [PR c++/84962] ICE with anon-struct member · 6f87580f 
      https://gcc.gnu.org/ml/gcc-patches/2018-03/msg00961.html
	PR c++/84962
	* name-lookup.c (pushdecl_class_level): Push anon-struct's
	member_vec, if there is one.

	PR c++/84962
	* g++.dg/lookup/pr84962.C: New.

From-SVN: r258686
      Nathan Sidwell committed
    • [PR c++/84970] lookup marking · 5770bbac 
      https://gcc.gnu.org/ml/gcc-patches/2018-03/msg00973.html
	PR c++/84970
	* cp-tree.h (lookup_list_keep): Declare.
	* tree.c (lookup_list_keep): New, broken out of ...
	(build_min): ... here.  Call it.
	* decl.c (cp_finish_decl): Call lookup_list_keep.

	PR c++/84970
	* g++.dg/lookup/pr84970.C: New.

From-SVN: r258685
      Nathan Sidwell committed
    • re PR target/84986 (Performance regression: loop no longer vectorized (x86-64)) · b6c1e032 
      2018-03-20  Richard Biener  <rguenther@suse.de>

	PR target/84986
	* config/i386/i386.c (ix86_add_stmt_cost): Only cost
	sign-conversions as zero, fall back to standard scalar_stmt
	cost for the rest.

	* gcc.dg/vect/costmodel/x86_64/costmodel-pr84986.c: New testcase.

From-SVN: r258684
      Richard Biener committed
    • Handle -fno-guess-branch-probability properly in predict.c (PR ipa/84825). · 14b05bee 
      2018-03-20  Martin Liska  <mliska@suse.cz>

	PR ipa/84825
	* predict.c (rebuild_frequencies): Handle case when we have
	PROFILE_ABSENT, but flag_guess_branch_prob is false.
2018-03-20  Martin Liska  <mliska@suse.cz>

	PR ipa/84825
	* g++.dg/ipa/pr84825.C: New test.

From-SVN: r258683
      Martin Liska committed
    • Remove ICEing test-case. · 7e86e0a3 
      2018-03-20  Martin Liska  <mliska@suse.cz>

	* gcc.dg/lto/chkp-ctor-merge_0.c: Remove.

From-SVN: r258682
      Martin Liska committed
    • re PR target/84990 (Boostrap broken with --enable-checking=release and Ada) · d64257a4 
      	PR target/84990
	* dwarf2asm.c (dw2_output_indirect_constant_1): Temporarily turn off
	flag_section_anchors.
	* varasm.c (use_blocks_for_decl_p): Remove hack for
	dw2_force_const_mem.

From-SVN: r258681
      Jakub Jelinek committed
    • PR c++/84937 - ICE with class deduction and auto. · d9bf40a1 
      	* pt.c (rewrite_template_parm): Fix auto handling.

From-SVN: r258680
      Jason Merrill committed
    • force-parallel-4.c: XFAIL one parallelizable loop. · 79cf14ae 
      2018-03-20  Richard Biener  <rguenther@suse.de>

	* testsuite/libgomp.graphite/force-parallel-4.c: XFAIL one
	parallelizable loop.

From-SVN: r258679
      Richard Biener committed
    • re PR target/84845 (ICE: in extract_insn, at recog.c:2304: unrecognizable insn… · cdeba3e0 
      re PR target/84845 (ICE: in extract_insn, at recog.c:2304: unrecognizable insn at -O2 and above at aarch64)

	PR target/84845
	* config/aarch64/aarch64.md (*aarch64_reg_<mode>3_neg_mask2): Rename
	to ...
	(*aarch64_<optab>_reg_<mode>3_neg_mask2): ... this.  If pseudos can't
	be created, use lowpart_subreg of operands[0] rather than operands[0]
	itself.
	(*aarch64_reg_<mode>3_minus_mask): Rename to ...
	(*aarch64_ashl_reg_<mode>3_minus_mask): ... this.
	(*aarch64_<optab>_reg_di3_mask2): Use const_int_operand predicate
	and n constraint instead of aarch64_shift_imm_di and Usd.
	(*aarch64_reg_<optab>_minus<mode>3): Rename to ...
	(*aarch64_<optab>_reg_minus<mode>3): ... this.

	* gcc.c-torture/compile/pr84845.c: New test.

From-SVN: r258678
      Jakub Jelinek committed
    • [ARM][PR82989] Fix unexpected use of NEON instructions for shifts · 094daefb 
      This patch fixes PR82989 so that we avoid NEON instructions when
-mneon-for-64bits is not enabled. This is more of a short term fix
for the real deeper problem of making an early decision of choosing
or rejecting NEON instructions. There is now a new ticket PR84467 to
deal with the longer term solution.
(Please refer to the discussion in the bug report for more details).

Sudi

*** gcc/ChangeLog ***

2018-03-20  Sudakshina Das  <sudi.das@arm.com>

	PR target/82989
	* config/arm/neon.md (ashldi3_neon): Update ?s for constraints
	to favor GPR over NEON registers.
	(<shift>di3_neon): Likewise.

*** gcc/testsuite/ChangeLog ***

2018-03-20  Sudakshina Das  <sudi.das@arm.com>

	PR target/82989
	* gcc.target/arm/pr82989.c: New test.

From-SVN: r258677
      Sudakshina Das committed
    • [nvptx] Fix bar.sync position · 038012e2 
      2018-03-20  Tom de Vries  <tom@codesourcery.com>

	PR target/84952
	* config/nvptx/nvptx.c (nvptx_single): Don't neuter bar.sync.
	(nvptx_process_pars): Emit bar.sync asap and alap.

From-SVN: r258676
      Tom de Vries committed