* testsuite/20_util/hash/chi2_quality.h: Break out from
	chi2_quality.cc.
	* testsuite/20_util/hash/chi2_q_bit_flip_set.cc: Ditto.
	* testsuite/20_util/hash/chi2_q_document_words.cc: Ditto.
	* testsuite/20_util/hash/chi2_q_bit_string_set.cc: Ditto.  Increase
	SAMPLES to 35000 for simulator targets.
	* testsuite/20_util/hash/chi2_q_numeric_pattern_set.cc: Ditto.
	* testsuite/20_util/hash/chi2_q_uniform_random.cc: Ditto.
	* testsuite/20_util/hash/chi2_quality.cc: Remove.

From-SVN: r206167

	* gcc.target/x86_64/abi/callabi/func-2a.c (dg-do): Remove
	target selector.
	* gcc.target/x86_64/abi/callabi/func-indirect-2a.c (dg-do): Ditto.
	* gcc.target/x86_64/abi/callabi/vaarg-4a.c (dg-do): Ditto.
	* gcc.target/x86_64/abi/callabi/vaarg-5a.c (dg-do): Ditto.

From-SVN: r206166

From-SVN: r206165

2013-12-21  Andreas Tobler  <andreast@gcc.gnu.org>

    * include/private/gcconfig.h: Add FreeBSD powerpc64 defines.

From-SVN: r206162

2013-12-20  Sharad Singhai  <singhai@google.com>

	* Makefile.in: Add optinfo.texi.
	* doc/invoke.texi: Fix typo.
	* doc/optinfo.texi: New documentation for optimization info.
	* doc/passes.texi: Add new node.

From-SVN: r206161

From-SVN: r206160

From-SVN: r206155

arm.c (arm_expand_prologue): In a nested APCS frame with arguments to push onto the stack and no varargs...

	* config/arm/arm.c (arm_expand_prologue): In a nested APCS frame with
	arguments to push onto the stack and no varargs, save ip into the last
	stack slot if r3 isn't available on entry.

From-SVN: r206154

	PR c++/59255
	* g++.dg/tree-prof/pr59255.C: New test.

From-SVN: r206152

[gcc/]
2013-12-20  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>

	* config/arm/neon.ml (crypto_intrinsics): Add vceq_64 and vtst_p64.
	* config/arm/arm_neon.h: Regenerate.
	* config/arm/neon-docgen.ml: Add vceq_p64 and vtst_p64.
	* doc/arm-neon-intrinsics.texi: Regenerate.


[gcc/testsuite/]
2013-12-20  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>

	* gcc.target/arm/neon-vceq_p64.c: New test.
	* gcc.target/arm/neon-vtst_p64.c: Likewise.

From-SVN: r206151

2013-12-20  Vladimir Makarov  <vmakarov@redhat.com>

        * config/arm/arm.h (THUMB_SECONDARY_OUTPUT_RELOAD_CLASS): Return NO_REGS
        for LRA.

From-SVN: r206150

2013-12-20  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>

	* config/arm/arm_acle.h: Add underscores before variables.

From-SVN: r206149

2013-12-20  Bingfeng Mei  <bmei@broadcom.com>

	PR tree-optimization/59544
	* tree-vect-stmts.c (perm_mask_for_reverse): Move before
	vectorizable_store. 
	(vectorizable_store): Handle negative step.

	* gcc.target/i386/pr59544.c: New test.

From-SVN: r206148

re PR tree-optimization/59413 (wrong code at -Os on x86_64-linux-gnu in both 32-bit and 64-bit modes)

	PR tree-optimization/59413
	* gcc.c-torture/execute/pr59413.c: New test.

From-SVN: r206147

2013-12-20  Bernhard Reutner-Fischer  <aldot@gcc.gnu.org>

	Makefile.in: Use $(FI) instead of fixincl@EXEEXT@.

From-SVN: r206146

        * config.gcc: Support march=broadwell.
        * config/i386/driver-i386.c (host_detect_local_cpu): Detect Broadwell.
        * config/i386/i386.c (ix86_option_override_internal): Add broadwell.
        * doc/invoke.texi: Document march=broadwell.

From-SVN: r206144

	* ubsan.c: Include tree-ssanames.h, asan.h and gimplify-me.h.
	(ubsan_type_descriptor): Handle BOOLEAN_TYPE and ENUMERAL_TYPE
	like INTEGER_TYPE.
	(instrument_bool_enum_load): New function.
	(ubsan_pass): Call it.
	(gate_ubsan): Also enable for SANITIZE_BOOL or SANITIZE_ENUM.
	* asan.c (create_cond_insert_point): No longer static.
	* asan.h (create_cond_insert_point): Declare.
	* sanitizer.def (BUILT_IN_UBSAN_HANDLE_LOAD_INVALID_VALUE): New
	built-in.
	* opts.c (common_handle_option): Handle -fsanitize=bool and
	-fsanitize=enum.
	* builtins.c (fold_builtin_memory_op): When sanitizing bool
	and enum loads, don't use enum or bool types for memcpy folding.
	* flag-types.h (SANITIZE_BOOL, SANITIZE_ENUM): New.
	(SANITIZE_UNDEFINED): Or these in.

	* c-c++-common/ubsan/load-bool-enum.c: New test.

From-SVN: r206143

2013-12-20  Chung-Ju Wu  <jasonwucj@gmail.com>

	* config/nds32/nds32.h (NDS32_MODE_TYPE_ALIGN): New macro.
	(NDS32_AVAILABLE_REGNUM_FOR_ARG): Use more accurate alignment checking
	to determine available register number.
	* config/nds32/nds32.c (nds32_needs_double_word_align): Use new
	macro NDS32_MODE_TYPE_ALIGN.
	(nds32_function_arg): Refine code layout.

From-SVN: r206142

        * doc/invoke.texi: (dump-rtl-ree): Fix typo and clarify ree
        handles both zero and sign extension.

From-SVN: r206139

From-SVN: r206138

2013-12-19  Teresa Johnson  <tejohnson@google.com>

	PR gcov-profile/59542
	* bb-reorder.c (duplicate_computed_gotos): Invoke fixup_partitions
	if we have made any changes.

From-SVN: r206135

	PR other/59545
	* genattrtab.c (struct attr_hash): Change hashcode type to unsigned.
	(attr_hash_add_rtx, attr_hash_add_string): Change hashcode parameter
	to unsigned.
	(attr_rtx_1): Change hashcode variable to unsigned.
	(attr_string): Likewise.  Perform first multiplication in unsigned
	type.
	* ifcvt.c (noce_try_store_flag_constants): Avoid signed integer
	overflows.
	* double-int.c (neg_double): Likewise.
	* stor-layout.c (set_min_and_max_values_for_integral_type): Likewise.
	* combine.c (force_to_mode): Likewise.
	* postreload.c (move2add_use_add2_insn, move2add_use_add3_insn,
	reload_cse_move2add, move2add_note_store): Likewise.
	* simplify-rtx.c (simplify_const_unary_operation,
	simplify_const_binary_operation): Likewise.
	* ipa-split.c (find_split_points): Initialize first.can_split
	and first.non_ssa_vars.
	* gengtype-state.c (read_state_files_list): Fix up check.
	* genautomata.c (reserv_sets_hash_value): Use portable rotation
	idiom.
java/
	* class.c (hashUtf8String): Compute hash in unsigned type.
	* javaop.h (WORD_TO_INT): Avoid signed integer overflow.

From-SVN: r206134

2013-12-19  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>

	* config/arm/neon-docgen.ml: Add crypto intrinsics documentation.
	* doc/arm-neon-intrinsics.texi: Regenerate.

From-SVN: r206132

[gcc/]
2013-12-19  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>

	* config/arm/neon-testgen.ml (effective_target): Handle "CRYPTO".

[gcc/testsuite]
2013-12-04  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>

	 * lib/target-supports.exp (check_effective_target_arm_crypto_ok):
	 New procedure.
	 (add_options_for_arm_crypto): Likewise.
	 * gcc.target/arm/crypto-vaesdq_u8.c: New test.
	 * gcc.target/arm/crypto-vaeseq_u8.c: Likewise.
	 * gcc.target/arm/crypto-vaesimcq_u8.c: Likewise.
	 * gcc.target/arm/crypto-vaesmcq_u8.c: Likewise.
	 * gcc.target/arm/crypto-vldrq_p128.c: Likewise.
	 * gcc.target/arm/crypto-vmull_high_p64.c: Likewise.
	 * gcc.target/arm/crypto-vmullp64.c: Likewise.
	 * gcc.target/arm/crypto-vsha1cq_u32.c: Likewise.
	 * gcc.target/arm/crypto-vsha1h_u32.c: Likewise.
	 * gcc.target/arm/crypto-vsha1mq_u32.c: Likewise.
	 * gcc.target/arm/crypto-vsha1pq_u32.c: Likewise.
	 * gcc.target/arm/crypto-vsha1su0q_u32.c: Likewise.
	 * gcc.target/arm/crypto-vsha1su1q_u32.c: Likewise.
	 * gcc.target/arm/crypto-vsha256h2q_u32.c: Likewise.
	 * gcc.target/arm/crypto-vsha256hq_u32.c: Likewise.
	 * gcc.target/arm/crypto-vsha256su0q_u32.c: Likewise.
	 * gcc.target/arm/crypto-vsha256su1q_u32.c: Likewise.
	 * gcc.target/arm/crypto-vstrq_p128.c: Likewise.
	 * gcc.target/arm/neon/vbslQp64: Generate.
	 * gcc.target/arm/neon/vbslp64: Likewise.
	 * gcc.target/arm/neon/vcombinep64: Likewise.
	 * gcc.target/arm/neon/vcreatep64: Likewise.
	 * gcc.target/arm/neon/vdupQ_lanep64: Likewise.
	 * gcc.target/arm/neon/vdupQ_np64: Likewise.
	 * gcc.target/arm/neon/vdup_lanep64: Likewise.
	 * gcc.target/arm/neon/vdup_np64: Likewise.
	 * gcc.target/arm/neon/vextQp64: Likewise.
	 * gcc.target/arm/neon/vextp64: Likewise.
	 * gcc.target/arm/neon/vget_highp64: Likewise.
	 * gcc.target/arm/neon/vget_lowp64: Likewise.
	 * gcc.target/arm/neon/vld1Q_dupp64: Likewise.
	 * gcc.target/arm/neon/vld1Q_lanep64: Likewise.
	 * gcc.target/arm/neon/vld1Qp64: Likewise.
	 * gcc.target/arm/neon/vld1_dupp64: Likewise.
	 * gcc.target/arm/neon/vld1_lanep64: Likewise.
	 * gcc.target/arm/neon/vld1p64: Likewise.
	 * gcc.target/arm/neon/vld2_dupp64: Likewise.
	 * gcc.target/arm/neon/vld2p64: Likewise.
	 * gcc.target/arm/neon/vld3_dupp64: Likewise.
	 * gcc.target/arm/neon/vld3p64: Likewise.
	 * gcc.target/arm/neon/vld4_dupp64: Likewise.
	 * gcc.target/arm/neon/vld4p64: Likewise.
	 * gcc.target/arm/neon/vreinterpretQf32_p128: Likewise.
	 * gcc.target/arm/neon/vreinterpretQf32_p64: Likewise.
	 * gcc.target/arm/neon/vreinterpretQp128_f32: Likewise.
	 * gcc.target/arm/neon/vreinterpretQp128_p16: Likewise.
	 * gcc.target/arm/neon/vreinterpretQp128_p64: Likewise.
	 * gcc.target/arm/neon/vreinterpretQp128_p8: Likewise.
	 * gcc.target/arm/neon/vreinterpretQp128_s16: Likewise.
	 * gcc.target/arm/neon/vreinterpretQp128_s32: Likewise.
	 * gcc.target/arm/neon/vreinterpretQp128_s64: Likewise.
	 * gcc.target/arm/neon/vreinterpretQp128_s8: Likewise.
	 * gcc.target/arm/neon/vreinterpretQp128_u16: Likewise.
	 * gcc.target/arm/neon/vreinterpretQp128_u32: Likewise.
	 * gcc.target/arm/neon/vreinterpretQp128_u64: Likewise.
	 * gcc.target/arm/neon/vreinterpretQp128_u8: Likewise.
	 * gcc.target/arm/neon/vreinterpretQp16_p128: Likewise.
	 * gcc.target/arm/neon/vreinterpretQp16_p64: Likewise.
	 * gcc.target/arm/neon/vreinterpretQp64_f32: Likewise.
	 * gcc.target/arm/neon/vreinterpretQp64_p128: Likewise.
	 * gcc.target/arm/neon/vreinterpretQp64_p16: Likewise.
	 * gcc.target/arm/neon/vreinterpretQp64_p8: Likewise.
	 * gcc.target/arm/neon/vreinterpretQp64_s16: Likewise.
	 * gcc.target/arm/neon/vreinterpretQp64_s32: Likewise.
	 * gcc.target/arm/neon/vreinterpretQp64_s64: Likewise.
	 * gcc.target/arm/neon/vreinterpretQp64_s8: Likewise.
	 * gcc.target/arm/neon/vreinterpretQp64_u16: Likewise.
	 * gcc.target/arm/neon/vreinterpretQp64_u32: Likewise.
	 * gcc.target/arm/neon/vreinterpretQp64_u64: Likewise.
	 * gcc.target/arm/neon/vreinterpretQp64_u8: Likewise.
	 * gcc.target/arm/neon/vreinterpretQp8_p128: Likewise.
	 * gcc.target/arm/neon/vreinterpretQp8_p64: Likewise.
	 * gcc.target/arm/neon/vreinterpretQs16_p128: Likewise.
	 * gcc.target/arm/neon/vreinterpretQs16_p64: Likewise.
	 * gcc.target/arm/neon/vreinterpretQs32_p128: Likewise.
	 * gcc.target/arm/neon/vreinterpretQs32_p64: Likewise.
	 * gcc.target/arm/neon/vreinterpretQs64_p128: Likewise.
	 * gcc.target/arm/neon/vreinterpretQs64_p64: Likewise.
	 * gcc.target/arm/neon/vreinterpretQs8_p128: Likewise.
	 * gcc.target/arm/neon/vreinterpretQs8_p64: Likewise.
	 * gcc.target/arm/neon/vreinterpretQu16_p128: Likewise.
	 * gcc.target/arm/neon/vreinterpretQu16_p64: Likewise.
	 * gcc.target/arm/neon/vreinterpretQu32_p128: Likewise.
	 * gcc.target/arm/neon/vreinterpretQu32_p64: Likewise.
	 * gcc.target/arm/neon/vreinterpretQu64_p128: Likewise.
	 * gcc.target/arm/neon/vreinterpretQu64_p64: Likewise.
	 * gcc.target/arm/neon/vreinterpretQu8_p128: Likewise.
	 * gcc.target/arm/neon/vreinterpretQu8_p64: Likewise.
	 * gcc.target/arm/neon/vreinterpretf32_p64: Likewise.
	 * gcc.target/arm/neon/vreinterpretp16_p64: Likewise.
	 * gcc.target/arm/neon/vreinterpretp64_f32: Likewise.
	 * gcc.target/arm/neon/vreinterpretp64_p16: Likewise.
	 * gcc.target/arm/neon/vreinterpretp64_p8: Likewise.
	 * gcc.target/arm/neon/vreinterpretp64_s16: Likewise.
	 * gcc.target/arm/neon/vreinterpretp64_s32: Likewise.
	 * gcc.target/arm/neon/vreinterpretp64_s64: Likewise.
	 * gcc.target/arm/neon/vreinterpretp64_s8: Likewise.
	 * gcc.target/arm/neon/vreinterpretp64_u16: Likewise.
	 * gcc.target/arm/neon/vreinterpretp64_u32: Likewise.
	 * gcc.target/arm/neon/vreinterpretp64_u64: Likewise.
	 * gcc.target/arm/neon/vreinterpretp64_u8: Likewise.
	 * gcc.target/arm/neon/vreinterpretp8_p64: Likewise.
	 * gcc.target/arm/neon/vreinterprets16_p64: Likewise.
	 * gcc.target/arm/neon/vreinterprets32_p64: Likewise.
	 * gcc.target/arm/neon/vreinterprets64_p64: Likewise.
	 * gcc.target/arm/neon/vreinterprets8_p64: Likewise.
	 * gcc.target/arm/neon/vreinterpretu16_p64: Likewise.
	 * gcc.target/arm/neon/vreinterpretu32_p64: Likewise.
	 * gcc.target/arm/neon/vreinterpretu64_p64: Likewise.
	 * gcc.target/arm/neon/vreinterpretu8_p64: Likewise.
	 * gcc.target/arm/neon/vsliQ_np64: Likewise.
	 * gcc.target/arm/neon/vsli_np64: Likewise.
	 * gcc.target/arm/neon/vsriQ_np64: Likewise.
	 * gcc.target/arm/neon/vsri_np64: Likewise.
	 * gcc.target/arm/neon/vst1Q_lanep64: Likewise.
	 * gcc.target/arm/neon/vst1Qp64: Likewise.
	 * gcc.target/arm/neon/vst1_lanep64: Likewise.
	 * gcc.target/arm/neon/vst1p64: Likewise.
	 * gcc.target/arm/neon/vst2p64: Likewise.
	 * gcc.target/arm/neon/vst3p64: Likewise.
	 * gcc.target/arm/neon/vst4p64: Likewise.

From-SVN: r206131

2013-12-19  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>

	 * config/arm/arm.c (enum arm_builtins): Add crypto builtins.
	 (arm_init_neon_builtins): Handle crypto builtins.
	 (bdesc_2arg): Likewise.
	 (bdesc_1arg): Likewise.
	 (bdesc_3arg): New table.
	 (arm_expand_ternop_builtin): New function.
	 (arm_expand_unop_builtin): Handle sha1h explicitly.
	 (arm_expand_builtin): Handle ternary builtins.
	 * config/arm/arm.h (TARGET_CPU_CPP_BUILTINS):
	 Define __ARM_FEATURE_CRYPTO.
	 * config/arm/arm.md: Include crypto.md.
	 (is_neon_type): Add crypto types.
	 * config/arm/arm_neon_builtins.def: Add TImode reinterprets.
	 * config/arm/crypto.def: New.
	 * config/arm/crypto.md: Likewise.
	 * config/arm/iterators.md (CRYPTO_UNARY): New int iterator.
	 (CRYPTO_BINARY): Likewise.
	 (CRYPTO_TERNARY): Likewise.
	 (CRYPTO_SELECTING): Likewise.
	 (crypto_pattern): New int attribute.
	 (crypto_size_sfx): Likewise.
	 (crypto_mode): Likewise.
	 (crypto_type): Likewise.
	 * config/arm/neon-gen.ml: Handle poly64_t and poly128_t types.
	 Handle crypto intrinsics.
	 * config/arm/neon.ml: Add support for poly64 and polt128 types
	 and intrinsics. Define crypto intrinsics.
	 * config/arm/neon.md (neon_vreinterpretti<mode>): New pattern.
	 (neon_vreinterpretv16qi<mode>): Use VQXMOV mode iterator.
	 (neon_vreinterpretv8hi<mode>): Likewise.
	 (neon_vreinterpretv4si<mode>): Likewise.
	 (neon_vreinterpretv4sf<mode>): Likewise.
	 (neon_vreinterpretv2di<mode>): Likewise.
	 * config/arm/unspecs.md (UNSPEC_AESD, UNSPEC_AESE, UNSPEC_AESIMC,
	 UNSPEC_AESMC, UNSPEC_SHA1C, UNSPEC_SHA1M, UNSPEC_SHA1P, UNSPEC_SHA1H,
	 UNSPEC_SHA1SU0, UNSPEC_SHA1SU1, UNSPEC_SHA256H, UNSPEC_SHA256H2,
	 UNSPEC_SHA256SU0, UNSPEC_SHA256SU1, VMULLP64): Define.
	 * config/arm/arm_neon.h: Regenerate.

From-SVN: r206130

	PR driver/59321
	* collect2.c (main): Check -fuse-ld=[bfd|gold] when
	DEFAULT_LINKER is defined.
	* common.opt (fuse-ld=bfd): Add Driver.
	(fuse-ld=gold): Likewise.
	* gcc.c (use_ld): New variable.
	(driver_handle_option): Set use_ld for OPT_fuse_ld_bfd and
	OPT_fuse_ld_gold.
	(main): Check -fuse-ld=[bfd|gold] for -print-prog-name=ld.

From-SVN: r206129

[gcc/]
2013-12-19  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>

	* Makefile.in (TEXI_GCC_FILES): Add arm-acle-intrinsics.texi.
	* config.gcc (extra_headers): Add arm_acle.h.
	* config/arm/arm.c (FL_CRC32): Define.
	(arm_have_crc): Likewise.
	(arm_option_override): Set arm_have_crc.
	(arm_builtins): Add CRC32 builtins.
	(bdesc_2arg): Likewise.
	(arm_init_crc32_builtins): New function.
	(arm_init_builtins): Initialise CRC32 builtins.
	(arm_file_start): Handle architecture extensions.
	* config/arm/arm.h (TARGET_CPU_CPP_BUILTINS): Define __ARM_FEATURE_CRC32.
	Define __ARM_32BIT_STATE.
	(TARGET_CRC32): Define.
	* config/arm/arm-arches.def: Add armv8-a+crc.
	* config/arm/arm-tables.opt: Regenerate.
	* config/arm/arm.md (type): Add crc.
	(<crc_variant>): New insn.
	* config/arm/arm_acle.h: New file.
	* config/arm/iterators.md (CRC): New int iterator.
	(crc_variant, crc_mode): New int attributes.
	* confg/arm/unspecs.md (UNSPEC_CRC32B, UNSPEC_CRC32H, UNSPEC_CRC32W,
	UNSPEC_CRC32CB, UNSPEC_CRC32CH, UNSPEC_CRC32CW): New unspecs.
	* doc/invoke.texi: Document -march=armv8-a+crc option.
	* doc/extend.texi: Document ACLE intrinsics.

[gcc/testsuite/]
2013-12-19  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>

	* lib/target-supports.exp (add_options_for_arm_crc): New procedure.
	(check_effective_target_arm_crc_ok_nocache): Likewise.
	(check_effective_target_arm_crc_ok): Likewise.
	* gcc.target/arm/acle/: New directory.
	* gcc.target/arm/acle/acle.exp: New.
	* gcc.target/arm/acle/crc32b.c: New test.
	* gcc.target/arm/acle/crc32h.c: Likewise.
	* gcc.target/arm/acle/crc32w.c: Likewise.
	* gcc.target/arm/acle/crc32d.c: Likewise.
	* gcc.target/arm/acle/crc32cb.c: Likewise.
	* gcc.target/arm/acle/crc32ch.c: Likewise.
	* gcc.target/arm/acle/crc32cw.c: Likewise.
	* gcc.target/arm/acle/crc32cd.c: Likewise.

From-SVN: r206128

2013-12-19  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>

	* c-c++-common/cilk-plus/SE/ef_error.c: Use -fopen-simd.

From-SVN: r206127

From-SVN: r206126

2013-12-19  Charles Baylis  <charles.baylis@linaro.org>

	PR target/59142
	gcc/
	* config/arm/arm-ldmstm.ml: Use low_register_operand for Thumb
	patterns.
	* config/arm/ldmstm.md: Regenerate.

From-SVN: r206125

2013-12-19  Charles Baylis  <charles.baylis@linaro.org>

	PR target/59142
	gcc/
	* arm/predicates.md (arm_hard_general_register_operand): New
	predicate.
	(arm_hard_register_operand): Remove.
	* config/arm/arm-ldmstm.ml: Use arm_hard_general_register_operand
	for all patterns.
	* config/arm/ldmstm.md: Regenerate.

From-SVN: r206124

2013-12-19  Charles Baylis  <charles.baylis@linaro.org>

	PR target/59142
	* config/arm/predicates.md (vfp_hard_register_operand): New predicate.
	* config/arm/arm.md (vfp_pop_multiple_with_writeback): Use
	vfp_hard_register_operand.

From-SVN: r206123

From-SVN: r206122

	* gcc.dg/long-long-compare-1.c: Don't use deprecated -mcbranchdi option
	for target sh4-*-*.

From-SVN: r206121

gcc/
	* config/aarch64/aarch64-builtins.c (aarch64_init_simd_builtins):
	Define builtin types for poly64_t poly128_t.
	(TYPES_BINOPP, aarch64_types_binopp_qualifiers): New.
	* aarch64/aarch64-simd-builtins.def: Update builtins table.
	* config/aarch64/aarch64-simd.md (aarch64_crypto_pmulldi,
	aarch64_crypto_pmullv2di): New.
	* config/aarch64/aarch64.c (aarch64_simd_mangle_map): Update table for
	poly64x2_t mangler.
	* config/aarch64/arm_neon.h (poly64x2_t, poly64_t, poly128_t): Define.
	(vmull_p64, vmull_high_p64): New.
	* config/aarch64/iterators.md (UNSPEC_PMULL<2>): New.

testsuite/

	* gcc.target/aarch64/pmull_1.c: New.

From-SVN: r206120

gcc/
	* config/aarch64/aarch64-simd-builtins.def: Update builtins table.
	* config/aarch64/aarch64-simd.md (aarch64_crypto_sha256h<sha256_op>v4si,
	aarch64_crypto_sha256su0v4si, aarch64_crypto_sha256su1v4si): New.
	* config/aarch64/arm_neon.h (vsha256hq_u32, vsha256h2q_u32,
	vsha256su0q_u32, vsha256su1q_u32): New.
	* config/aarch64/iterators.md (UNSPEC_SHA256H<2>, UNSPEC_SHA256SU<01>):
	New.
	(CRYPTO_SHA256): New int iterator.
	(sha256_op): New int attribute.

testsuite/
	* gcc.target/aarch64/sha256_1.c: New.

From-SVN: r206119

gcc/
	* config/aarch64/aarch64-simd-builtins.def: Update builtins table.
	* config/aarch64/aarch64-builtins.c (aarch64_types_ternopu_qualifiers,
	TYPES_TERNOPU): New.
	* config/aarch64/aarch64-simd.md (aarch64_crypto_sha1hsi,
	aarch64_crypto_sha1su1v4si, aarch64_crypto_sha1<sha1_op>v4si,
	aarch64_crypto_sha1su0v4si): New.
	* config/aarch64/arm_neon.h (vsha1cq_u32, sha1mq_u32, vsha1pq_u32,
	vsha1h_u32, vsha1su0q_u32, vsha1su1q_u32): New.
	* config/aarch64/iterators.md (UNSPEC_SHA1<CPMH>, UNSPEC_SHA1SU<01>):
	New.
	(CRYPTO_SHA1): New int iterator.
	(sha1_op): New int attribute.

testsuite/
	* gcc.target/aarch64/sha1_1.c: New.

From-SVN: r206118

gcc/
	* config/aarch64/aarch64-simd-builtins.def: Update builtins table.
	* config/aarch64/aarch64-builtins.c (aarch64_types_binopu_qualifiers,
	TYPES_BINOPU): New.
	* config/aarch64/aarch64-simd.md (aarch64_crypto_aes<aes_op>v16qi,
	aarch64_crypto_aes<aesmc_op>v16qi): New.
	* config/aarch64/arm_neon.h (vaeseq_u8, vaesdq_u8, vaesmcq_u8,
	vaesimcq_u8): New.
	* config/aarch64/iterators.md (UNSPEC_AESE, UNSPEC_AESD, UNSPEC_AESMC,
	UNSPEC_AESIMC): New.
	(CRYPTO_AES, CRYPTO_AESMC): New int iterators.
	(aes_op, aesmc_op): New int attributes.

testsuite/
	* gcc.target/aarch64/aes_1.c: New.

From-SVN: r206117

2013-12-19  Yury Gribov  <y.gribov@samsung.com>

	* mklog: Split generated message in parts.

From-SVN: r206116

	* config/arm/types.md (neon_mul_d_long, crypto_aes, crypto_sha1_xor,
	crypto_sha1_fast, crypto_sha1_slow, crypto_sha256_fast,
	crypto_sha256_slow): New.

From-SVN: r206115