Introduce AArch64 Crypto instruction types.

	* config/arm/types.md (neon_mul_d_long, crypto_aes, crypto_sha1_xor,
	crypto_sha1_fast, crypto_sha1_slow, crypto_sha256_fast,
	crypto_sha256_slow): New.

From-SVN: r206115

gcc/ChangeLog

 2013-12-19  Tejas Belagod  <tejas.belagod@arm.com>
 
+	* config/arm/types.md (neon_mul_d_long, crypto_aes, crypto_sha1_xor,
+	crypto_sha1_fast, crypto_sha1_slow, crypto_sha256_fast,
+	crypto_sha256_slow): New.
+
+2013-12-19  Tejas Belagod  <tejas.belagod@arm.com>
+
 	* config/aarch64/aarch64.h (TARGET_CRYPTO): New.
 	(__ARM_FEATURE_CRYPTO): Define if TARGET_CRYPTO is true.
 

gcc/config/arm/types.md

@@ -327,6 +327,7 @@
 ; neon_mul_b_long
 ; neon_mul_h_long
 ; neon_mul_s_long
+; neon_mul_d_long
 ; neon_mul_h_scalar
 ; neon_mul_h_scalar_q
 ; neon_mul_s_scalar
@@ -520,6 +521,15 @@
 ; neon_fp_div_s_q
 ; neon_fp_div_d
 ; neon_fp_div_d_q
+;
+; The classification below is for Crypto instructions.
+;
+; crypto_aes
+; crypto_sha1_xor
+; crypto_sha1_fast
+; crypto_sha1_slow
+; crypto_sha256_fast
+; crypto_sha256_slow
 
 (define_attr "type"
  "adc_imm,\
@@ -823,6 +833,7 @@
   neon_mul_b_long,\
   neon_mul_h_long,\
   neon_mul_s_long,\
+  neon_mul_d_long,\
   neon_mul_h_scalar,\
   neon_mul_h_scalar_q,\
   neon_mul_s_scalar,\
@@ -1037,7 +1048,14 @@
   neon_fp_div_s,\
   neon_fp_div_s_q,\
   neon_fp_div_d,\
-  neon_fp_div_d_q"
+  neon_fp_div_d_q,\
+\
+  crypto_aes,\
+  crypto_sha1_xor,\
+  crypto_sha1_fast,\
+  crypto_sha1_slow,\
+  crypto_sha256_fast,\
+  crypto_sha256_slow"
    (const_string "untyped"))
 
 ; Is this an (integer side) multiply with a 32-bit (or smaller) result?