gcc/ChangeLog:

2015-05-19  Trevor Saunders  <tbsaunde+gcc@tbsaunde.org>

	PR c++/65835
	* config/i386/winnt.c (struct wrapped_symbol_hasher): Change
	value_type to const char *.

From-SVN: r223423

From-SVN: r223422

2015-05-19  Sandra Loosemore  <sandra@codesourcery.com>

	gcc/
	* config.gcc [powerpc*-*-linux*]: Allow --enable-targets=all
	to build a biarch toolchain again.

From-SVN: r223418

gcc/testsuite/
	* gcc.target/sh/pr64366.c: Remove -m4 -ml from dg-options.

From-SVN: r223417

	* include/bits/stl_list.h (_M_resize_pos(size_type&)): Declare.
	(operator==(const list&, const list&)): If size() is O(1) compare
	sizes before comparing each element.
	* include/bits/list.tcc (list::_M_resize_pos(size_type&)): Define.
	(list::resize): Use _M_resize_pos.

From-SVN: r223416

	* ipa-devirt.c (type_in_anonymous_namespace_p): Return true
	or implicit declarations.
	(odr_type_p): Check that TYPE_NAME is TYPE_DECL before looking
	into it.
	(get_odr_type): Check type has linkage before adding bases.
	(register_odr_type): Check that type has linkage before adding it.
	(type_known_to_have_no_deriavations_p): Rename to ..
	(type_known_to_have_no_derivations_p): This one.
	* ipa-utils.h (type_known_to_have_no_deriavations_p): Rename to ..
	(type_known_to_have_no_derivations_p): This one.
	* ipa-polymorphic-call.c
	(ipa_polymorphic_call_context::restrict_to_inner_type): Check that
	type has linkage.

From-SVN: r223415

From-SVN: r223414

2015-05-19  François Dumont  <fdumont@gcc.gnu.org>

	* testsuite/23_containers/unordered_map/cons/66055.cc: Add constructor
	invocations.
	* testsuite/23_containers/unordered_multimap/cons/66055.cc: Likewise.
	* testsuite/23_containers/unordered_multiset/cons/66055.cc: Likewise.
	* testsuite/23_containers/unordered_set/cons/66055.cc: Likewise.

From-SVN: r223413

	* Makefile.in (LIBUNWIND): Move dependency for shared libgcc.
	Remove useless endif/ifneq ($(enable_shared),yes) pair.

From-SVN: r223412

	* stor-layout.c (finalize_type_size): Use AGGREGATE_TYPE_P.
	(layout_type): Use RECORD_OR_UNION_TYPE_P.

From-SVN: r223407

This is a first try to implement at least some of the requirements
regarding the vector bool type documented for IBM XLC.

With this patch error messages will be issued for invalid uses of
vector bool types in binary operators.

vector bool types are being marked opaque in order to prevent the
front-end from complaining about "vector bool long" vs "vector bool
long long" combinations on 64 bit.  The opaque flag basically
suppresses any type checking. However, we still want vector bool to be
accepted only in contexts specified in the documentation (to be
published soon).  Implementing the invalid binary op hook does this
for binary operators at least.  But this is far from being complete :(

gcc/
	* config/s390/s390.c (s390_vector_bool_type_p): New function.
	(s390_invalid_binary_op): New function.
	(TARGET_INVALID_BINARY_OP): Define macro.

From-SVN: r223404

gcc/testsuite/
	* lib/target-supports.exp: Vector do not always have natural
          alignment on s390*.

From-SVN: r223403

loop-invariant.c (create_new_invariant): Don't calculate address cost if mode is not a scalar integer.

2015-05-19  David Sherwood  <david.sherwood@arm.com>

	* loop-invariant.c (create_new_invariant): Don't calculate address cost
	if mode is not a scalar integer.
	(get_inv_cost): Increase computational cost for unused invariants.

	* gcc.dg/loop-invariant.c: New testcase.

From-SVN: r223402

gcc/testsuite/
	* gcc.dg/tree-ssa/gen-vect-11b.c: Disable vector
	  instructions on s390*.
	  * gcc.dg/tree-ssa/gen-vect-11c.c: Likewise.

From-SVN: r223400

gcc/testsuite/
	* gcc.target/s390/zvector/vec-dbl-math-compile-1.c: New test.
	* gcc.target/s390/zvector/vec-genbytemask-1.c: New test.
	* gcc.target/s390/zvector/vec-genmask-1.c: New test.
	* gcc.target/s390/zvector/vec-lcbb-1.c: New test.
	* gcc.target/s390/zvector/vec-overloading-1.c: New test.
	* gcc.target/s390/zvector/vec-overloading-2.c: New test.
	* gcc.target/s390/zvector/vec-overloading-3.c: New test.
	* gcc.target/s390/zvector/vec-overloading-4.c: New test.
	* gcc.target/s390/zvector/vec-test-mask-1.c: New test.
	* gcc.target/s390/zvector/vec-elem-1.c: New test.

From-SVN: r223399

With this patch GCC implements an Altivec style set of builtins to
make use of vector instructions in C/C++ code.  This is provided for
compatibility with the IBM XL compiler.

gcc/
	* config.gcc: Add vecintrin.h to extra_headers.  Add s390-c.o to
	c_target_objs and cxx_target_objs.  Add t-s390 to tmake_file.
	* config/s390/s390-builtin-types.def: New file.
	* config/s390/s390-builtins.def: New file.
	* config/s390/s390-builtins.h: New file.
	* config/s390/s390-c.c: New file.
	* config/s390/s390-modes.def: Add modes CCVEQANY, CCVH,
	CCVHANY, CCVHU, CCVHUANY, CCVFHANY, CCVFHEANY.
	* config/s390/s390-protos.h (s390_expand_vec_compare_cc)
	(s390_cpu_cpp_builtins, s390_register_target_pragmas): Add
	prototypes.
	* config/s390/s390.c (s390-builtins.h, s390-builtins.def):
	Include.
	(flags_builtin, flags_overloaded_builtin_var, s390_builtin_types)
	(s390_builtin_fn_types, s390_builtin_decls, code_for_builtin): New
	variable definitions.
	(s390_const_operand_ok): New function.
	(s390_expand_builtin): Rewrite.
	(s390_init_builtins): New function.
	(s390_handle_vectorbool_attribute): New function.
	(s390_attribute_table): Add s390_vector_bool attribute.
	(s390_match_ccmode_set): Handle new cc modes CCVH, CCVHU.
	(s390_branch_condition_mask): Generate masks for new modes.
	(s390_expand_vec_compare_cc): New function.
	(s390_mangle_type): Add mangling for vector bool types.
	(enum s390_builtin): Remove.
	(s390_atomic_assign_expand_fenv): Rename constants for sfpc and
	efpc builtins.
	* config/s390/s390.h (TARGET_CPU_CPP_BUILTINS): Call
	s390_cpu_cpp_builtins.
	(REGISTER_TARGET_PRAGMAS): New macro.
	* config/s390/s390.md: Define more UNSPEC_VEC_* constants.
	(insn_cmp mode attribute): Add new CC modes.
	(s390_sfpc, s390_efpc): Rename patterns to sfpc and efpc.
	(lcbb): New pattern definition.
	* config/s390/s390intrin.h: Include vecintrin.h.
	* config/s390/t-s390: New file.
	* config/s390/vecintrin.h: New file.
	* config/s390/vector.md: Include vx-builtins.md.
	* config/s390/vx-builtins.md: New file.S/390 zvector builtin support.

From-SVN: r223398

With this patch GCC makes use of the vector instruction which are
available in single element mode.  By using these instructions scalar
double operations can use 32 registers.

gcc/
	* config/s390/s390-modes.def: Add new modes CCVEQ, CCVFH, and
	CCVFHE.
	* config/s390/s390.c (s390_match_ccmode_set): Handle new modes.
	(s390_select_ccmode): Likewise.
	(s390_canonicalize_comparison): Swap operands if necessary.
	(s390_expand_vec_compare_scalar): Expand DFmode compare using
	single element vector instructions.
	(s390_emit_compare): Call s390_expand_vec_compare_scalar.
	(s390_branch_condition_mask): Generate CC masks for the new modes.
	* config/s390/s390.md (v0, vf, vd): New mode attributes.
	(VFCMP, asm_fcmp, insn_cmp): New mode iterator and attributes.
	(*vec_cmp<insn_cmp>df_cconly, *fixuns_truncdfdi2_z13)
	(*fix_trunc<BFP:mode><GPR:mode>2_bfp, *floatunsdidf2_z13)
	(*floatuns<GPR:mode><FP:mode>2, *extendsfdf2_z13)
	(*extend<DSF:mode><BFP:mode>2): New insn definition.
	(fix_trunc<BFP:mode><GPR:mode>2_bfp, loatuns<GPR:mode><FP:mode>2)
	(extend<DSF:mode><BFP:mode>2): Turn into expander.
	(floatdi<mode>2, truncdfsf2, add<mode>3, sub<mode>3, mul<mode>3)
	(div<mode>3, *neg<mode>2, *abs<mode>2, *negabs<mode>2)
	(sqrt<mode>2): Add vector instruction.

gcc/testsuite/
	* gcc.target/s390/vector/vec-scalar-cmp-1.c: New test.

From-SVN: r223397

gcc/testsuite/
	* gcc.target/s390/s390.exp
	(check_effective_target_vector): New check.
	* gcc.target/s390/vector/vec-abi-1.c: New test.
	* gcc.target/s390/vector/vec-abi-2.c: New test.
	* gcc.target/s390/vector/vec-abi-3.c: New test.
	* gcc.target/s390/vector/vec-abi-4.c: New test.
	* gcc.target/s390/vector/vec-abi-align-1.c: New test.
	* gcc.target/s390/vector/vec-abi-single-1.c: New test.
	* gcc.target/s390/vector/vec-abi-single-2.c: New test.
	* gcc.target/s390/vector/vec-abi-struct-1.c: New test.
	* gcc.target/s390/vector/vec-abi-vararg-1.c: New test.
	* gcc.target/s390/vector/vec-abi-vararg-2.c: New test.
	* gcc.target/s390/vector/vec-clobber-1.c: New test.
	* gcc.target/s390/vector/vec-cmp-1.c: New test.
	* gcc.target/s390/vector/vec-cmp-2.c: New test.
	* gcc.target/s390/vector/vec-dbl-math-compile-1.c: New test.
	* gcc.target/s390/vector/vec-genbytemask-1.c: New test.
	* gcc.target/s390/vector/vec-genbytemask-2.c: New test.
	* gcc.target/s390/vector/vec-genmask-1.c: New test.
	* gcc.target/s390/vector/vec-genmask-2.c: New test.
	* gcc.target/s390/vector/vec-init-1.c: New test.
	* gcc.target/s390/vector/vec-int-math-compile-1.c: New test.
	* gcc.target/s390/vector/vec-shift-1.c: New test.
	* gcc.target/s390/vector/vec-sub-1.c: New test.

From-SVN: r223396

gcc/
	* config/s390/constraints.md (j00, jm1, jxx, jyy, v): New
	constraints.
	* config/s390/predicates.md (const0_operand, constm1_operand)
	(constable_operand): Accept vector operands.
	* config/s390/s390-modes.def: Add supported vector modes.
	* config/s390/s390-protos.h (s390_cannot_change_mode_class)
	(s390_function_arg_vector, s390_contiguous_bitmask_vector_p)
	(s390_bytemask_vector_p, s390_expand_vec_strlen)
	(s390_expand_vec_compare, s390_expand_vcond)
	(s390_expand_vec_init): Add prototypes.
	* config/s390/s390.c (VEC_ARG_NUM_REG): New macro.
	(s390_vector_mode_supported_p): New function.
	(s390_contiguous_bitmask_p): Mask out the irrelevant bits.
	(s390_contiguous_bitmask_vector_p): New function.
	(s390_bytemask_vector_p): New function.
	(s390_split_ok_p): Vector regs don't work either.
	(regclass_map): Add VEC_REGS.
	(s390_legitimate_constant_p): Handle vector constants.
	(s390_cannot_force_const_mem): Handle CONST_VECTOR.
	(legitimate_reload_vector_constant_p): New function.
	(s390_preferred_reload_class): Handle CONST_VECTOR.
	(s390_reload_symref_address):  Likewise.
	(s390_secondary_reload): Vector memory instructions only support
	short displacements.  Rename reload*_nonoffmem* to reload*_la*.
	(s390_emit_ccraw_jump): New function.
	(s390_expand_vec_strlen): New function.
	(s390_expand_vec_compare): New function.
	(s390_expand_vcond): New function.
	(s390_expand_vec_init): New function.
	(s390_dwarf_frame_reg_mode): New function.
	(print_operand): Handle addresses with 'O' and 'R' constraints.
	(NR_C_MODES, constant_modes): Add vector modes.
	(s390_output_pool_entry): Handle vector constants.
	(s390_hard_regno_mode_ok): Handle vector registers.
	(s390_class_max_nregs): Likewise.
	(s390_cannot_change_mode_class): New function.
	(s390_invalid_arg_for_unprototyped_fn): New function.
	(s390_function_arg_vector): New function.
	(s390_function_arg_float): Remove size variable.
	(s390_pass_by_reference): Handle vector arguments.
	(s390_function_arg_advance): Likewise.
	(s390_function_arg): Likewise.
	(s390_return_in_memory): Vector values are returned in a VR if
	possible.
	(s390_function_and_libcall_value): Handle vector arguments.
	(s390_gimplify_va_arg): Likewise.
	(s390_call_saved_register_used): Consider the arguments named.
	(s390_conditional_register_usage): Disable v16-v31 for non-vec
	targets.
	(s390_preferred_simd_mode): New function.
	(s390_support_vector_misalignment): New function.
	(s390_vector_alignment): New function.
	(TARGET_STRICT_ARGUMENT_NAMING, TARGET_DWARF_FRAME_REG_MODE)
	(TARGET_VECTOR_MODE_SUPPORTED_P)
	(TARGET_INVALID_ARG_FOR_UNPROTOTYPED_FN)
	(TARGET_VECTORIZE_PREFERRED_SIMD_MODE)
	(TARGET_VECTORIZE_SUPPORT_VECTOR_MISALIGNMENT)
	(TARGET_VECTOR_ALIGNMENT): Define target macro.
	* config/s390/s390.h (FUNCTION_ARG_PADDING): Define macro.
	(FIRST_PSEUDO_REGISTER): Increase value.
	(VECTOR_NOFP_REGNO_P, VECTOR_REGNO_P, VECTOR_NOFP_REG_P)
	(VECTOR_REG_P): Define macros.
	(FIXED_REGISTERS, CALL_USED_REGISTERS)
	(CALL_REALLY_USED_REGISTERS, REG_ALLOC_ORDER)
	(HARD_REGNO_CALL_PART_CLOBBERED, REG_CLASS_NAMES)
	(FUNCTION_ARG_REGNO_P, FUNCTION_VALUE_REGNO_P, REGISTER_NAMES):
	Add vector registers.
	(CANNOT_CHANGE_MODE_CLASS): Call C function.
	(enum reg_class): Add VEC_REGS, ADDR_VEC_REGS, GENERAL_VEC_REGS.
	(SECONDARY_MEMORY_NEEDED): Allow SF<->SI mode moves without
	memory.
	(DBX_REGISTER_NUMBER, FIRST_VEC_ARG_REGNO, LAST_VEC_ARG_REGNO)
	(SHORT_DISP_IN_RANGE, VECTOR_STORE_FLAG_VALUE): Define macro.
	* config/s390/s390.md (UNSPEC_VEC_*): New constants.
	(VR*_REGNUM): New constants.
	(ALL): New mode iterator.
	(INTALL): Remove mode iterator.
	Include vector.md.
	(movti): Implement TImode moves for VRs.
	Disable TImode splitter for VR targets.
	Implement splitting TImode GPR<->VR moves.
	(reload*_tomem_z10, reload*_toreg_z10): Replace INTALL with ALL.
	(reload<mode>_nonoffmem_in, reload<mode>_nonoffmem_out): Rename to
	reload<mode>_la_in, reload<mode>_la_out.
	(*movdi_64, *movsi_zarch, *movhi, *movqi, *mov<mode>_64dfp)
	(*mov<mode>_64, *mov<mode>_31): Add vector instructions.
	(TD/TF mode splitter): Enable for GPRs only (formerly !FP).
	(mov<mode> SF SD): Prefer lder, lde for loading.
	Add lrl and strl instructions.
	Add vector instructions.
	(strlen<mode>): Rename old strlen<mode> to strlen_srst<mode>.
	Call s390_expand_vec_strlen on z13.
	(*cc_to_int): Change predicate to nonimmediate_operand.
	(addti3): Rename to *addti3.  New expander.
	(subti3): Rename to *subti3.  New expander.
	* config/s390/vector.md: New file.

From-SVN: r223395

gcc/
	* common/config/s390/s390-common.c (processor_flags_table): Add
	z13.
	* config.gcc: Add z13.
	* config/s390/s390-opts.h (enum processor_type): Add
	PROCESSOR_2964_Z13.
	* config/s390/s390.c (s390_adjust_priority): Check for
	PROCESSOR_2964_Z13.
	(s390_reorg): Likewise.
	(s390_sched_reorder): Likewise.
	(s390_sched_variable_issue): Likewise.
	(s390_loop_unroll_adjust): Likewise.
	(s390_option_override): Likewise. Default to -mvx when available.
	* config/s390/s390.h (enum processor_flags): Add PF_Z13 and PF_VX.
	(TARGET_CPU_Z13, TARGET_CPU_VX, TARGET_Z13, TARGET_VX)
	(TARGET_VX_ABI): Define macros.
	macros.
	(TARGET_DEFAULT): Add MASK_OPT_VX.
	* config/s390/s390.md ("cpu" attribute): Add z13.
	("cpu_facility" attribute): Add vec.
	* config/s390/s390.opt (processor_type): Add z13.
	(mvx): New options.
	* doc/invoke.texi: Add z13 option for -march.

From-SVN: r223393

gcc/
	* config/s390/predicates.md (shift_count_or_setmem_operand):
        Add mode check to make sure that only scalar integer values
        are accepted.

From-SVN: r223392

	* tree.c (verify_type_variant): Fix #undef.
	(gimple_canonical_types_compatible_p): Move here from lto.c
	(verify_type): Verify TYPE_CANONICAL compatibility.
	* tree.h (gimple_canonical_types_compatible_p): Declare.

	* lto.c (gimple_canonical_types_compatible_p): Move to tree.c

From-SVN: r223391

	PR middle-end/66199
	* tree.h (OMP_TEAMS_COMBINED): Define.
	* gimplify.c (enum gimplify_omp_var_data): Add
	GOVD_LINEAR_LASTPRIVATE_NO_OUTER.
	(enum omp_region_type): Add ORT_COMBINED_TEAMS.
	(omp_notice_variable): Accept both ORT_TEAMS
	and ORT_COMBINED_TEAMS.  Don't recurse if
	GOVD_LINEAR_LASTPRIVATE_NO_OUTER is set and either
	GOVD_LINEAR is set, or GOVD_LASTPRIVATE without
	GOVD_FIRSTPRIVATE.
	(omp_no_lastprivate): New function.
	(gimplify_scan_omp_clauses): For OMP_CLAUSE_LASTPRIVATE
	and OMP_CLAUSE_LINEAR, if omp_no_lastprivate, don't
	notice_outer and set appropriate bits, otherwise make
	sure default(none) combined constructs won't complain.
	(gimplify_adjust_omp_clauses): Remove OMP_CLAUSE_LINEAR
	outer special casing, for OMP_CLAUSE_LASTPRIVATE if
	omp_no_lastprivate either remove the clause or turn it
	into OMP_CLAUSE_PRIVATE.
	(gimplify_omp_for): Fix up handling of implicit
	lastprivate or linear iterators.
	(gimplify_omp_workshare): For OMP_TEAMS_COMBINED use
	ORT_COMBINED_TEAMS.
	* omp-low.c (lower_omp_for_lastprivate): For combined
	for simd use fd.loop.n2 from the for rather than simd.
gcc/c/
	* c-parser.c (c_parser_omp_for_loop): Don't add
	OMP_CLAUSE_SHARED to OMP_PARALLEL_CLAUSES when moving
	OMP_CLAUSE_LASTPRIVATE clause to OMP_FOR_CLAUSES.
	(c_parser_omp_teams): Set OMP_TEAMS_COMBINED for combined
	constructs.
gcc/cp/
	* parser.c (cp_parser_omp_for_loop): Don't add
	OMP_CLAUSE_SHARED to OMP_PARALLEL_CLAUSES when moving
	OMP_CLAUSE_LASTPRIVATE clause to OMP_FOR_CLAUSES.
	(cp_parser_omp_teams): Set OMP_TEAMS_COMBINED for combined
	constructs.
gcc/fortran/
	* trans-openmp.c (gfc_trans_omp_teams): Set OMP_TEAMS_COMBINED for
	combined constructs.
	(gfc_trans_omp_target): Make sure BIND_EXPR has non-NULL
	BIND_EXPR_BLOCK.
libgomp/
	* testsuite/libgomp.c/pr66199-1.c: New test.
	* testsuite/libgomp.c/pr66199-2.c: New test.
	* testsuite/libgomp.c++/pr66199-1.C: New test.
	* testsuite/libgomp.c++/pr66199-2.C: New test.
	* testsuite/libgomp.fortran/pr66199-1.f90: New test.
	* testsuite/libgomp.fortran/pr66199-2.f90: New test.

From-SVN: r223387

2015-05-19  Christophe Lyon  <christophe.lyon@linaro.org>

	* gcc.target/aarch64/advsimd-intrinsics/vqshrun_n.c: New file.

From-SVN: r223386

2015-05-19  Christophe Lyon  <christophe.lyon@linaro.org>

	* gcc.target/aarch64/advsimd-intrinsics/vqshrn_n.c: New file.

From-SVN: r223385

2015-05-19  Christophe Lyon  <christophe.lyon@linaro.org>

	* gcc.target/aarch64/advsimd-intrinsics/vqshlu_n.c: New file.

From-SVN: r223384

gcc/
	* config/cris/cris.c (cris_expand_prologue): Use gen_raw_REG
	instead of gen_rtx_raw_REG.
	(cris_expand_epilogue): Likewise.
	* config/microblaze/microblaze.c (microblaze_classify_address):
	Likewise.
	* config/sparc/sparc.md: Likewise.

From-SVN: r223383

2015-05-19  Christophe Lyon  <christophe.lyon@linaro.org>

	* gcc.target/aarch64/advsimd-intrinsics/vqshl_n.c: New file.

From-SVN: r223382

2015-05-19  Christophe Lyon  <christophe.lyon@linaro.org>

	* gcc.target/aarch64/advsimd-intrinsics/vqshl.c: New file.

From-SVN: r223381

2015-05-19  Christophe Lyon  <christophe.lyon@linaro.org>

	* gcc.target/aarch64/advsimd-intrinsics/vqrshrun_n.c: New file.

From-SVN: r223380

2015-05-19  Christophe Lyon  <christophe.lyon@linaro.org>

	* gcc.target/aarch64/advsimd-intrinsics/vqrshrn_n.c: New file.

From-SVN: r223379

2015-05-19  Christophe Lyon  <christophe.lyon@linaro.org>

	* gcc.target/aarch64/advsimd-intrinsics/vqrshl.c: New file.

From-SVN: r223377

2015-05-19  Christophe Lyon  <christophe.lyon@linaro.org>

	* gcc.target/aarch64/advsimd-intrinsics/vqrdmulh_n.c: New file.

From-SVN: r223376

2015-05-19  Christophe Lyon  <christophe.lyon@linaro.org>

	* gcc.target/aarch64/advsimd-intrinsics/vqrdmulh_lane.c: New file.

From-SVN: r223375

2015-05-19  Christophe Lyon  <christophe.lyon@linaro.org>

	* gcc.target/aarch64/advsimd-intrinsics/vqrdmulh.c: New file.

From-SVN: r223374

2015-05-19  Christophe Lyon  <christophe.lyon@linaro.org>

	* gcc.target/aarch64/advsimd-intrinsics/vqmovun.c: New file.

From-SVN: r223373

2015-05-19  Christophe Lyon  <christophe.lyon@linaro.org>

	* gcc.target/aarch64/advsimd-intrinsics/vqmovn.c: New file.

From-SVN: r223372

	(alpha_preferred_reload_class, alpha_legitimate_constant_p): Use
	CONST_INT_P, CONST_SCALAR_INT_P and CONST_DOUBLE_P predicates.
	(alpha_split_reload_pair) <case CONST_INT, case CONST_WIDE_INT>:
	Use CASE_CONST_SCALAR_INT.
	(print_operand) <case 'M'>: Use mode_width_operand to check the
	value of the constant.
	* config/alpha/alpha.md (movti): Use CONST_SCALAR_INT_P predicate.
	* config/alpha/predicates.md (input_operand): Use general_operand
	instead of match_code as operand check.
	(symbolic_operand): Use match_code with subexpression digits.
	* config/alpha/constraints.md (Q): Ditto.

From-SVN: r223371

The current implementation re-uses the location of the selection
pattern to generate a new one.  This fails if the pattern resides in a
read-only location.

gcc/
	* optabs.c (expand_vec_perm): Don't re-use SEL as target operand.

From-SVN: r223369

We need a scratch register for loading from or storing to a symbolic
memory reference where we cannot use the load/store relative
instructions for.  However, the check currently fails to handle
floating point modes in GPRs correctly.

gcc/
	* config/s390/s390.c (s390_secondary_reload): Fix check for
          load/store relative.

From-SVN: r223368