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riscv-gcc-1
Commit e5561c83 by Richard Sandiford Committed by Richard Sandiford
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cris.c (cris_expand_prologue): Use gen_raw_REG instead of gen_rtx_raw_REG. 

gcc/
	* config/cris/cris.c (cris_expand_prologue): Use gen_raw_REG
	instead of gen_rtx_raw_REG.
	(cris_expand_epilogue): Likewise.
	* config/microblaze/microblaze.c (microblaze_classify_address):
	Likewise.
	* config/sparc/sparc.md: Likewise.

From-SVN: r223383
parent 1b2cb3e7
Showing with 21 additions and 14 deletions
gcc/ChangeLog
2015-05-19 Richard Sandiford <richard.sandiford@arm.com>
* config/cris/cris.c (cris_expand_prologue): Use gen_raw_REG
instead of gen_rtx_raw_REG.
(cris_expand_epilogue): Likewise.
* config/microblaze/microblaze.c (microblaze_classify_address):
Likewise.
* config/sparc/sparc.md: Likewise.
2015-05-19 Uros Bizjak <ubizjak@gmail.com>
* config/alpha/alpha.c (alpha_legitimize_reload_address)
......
gcc/config/cris/cris.c
......@@ -3138,7 +3138,7 @@ cris_expand_prologue (void)
mem = gen_rtx_MEM (SImode, stack_pointer_rtx);
set_mem_alias_set (mem, get_varargs_alias_set ());
insn = emit_move_insn (mem, gen_rtx_raw_REG (SImode, regno));
insn = emit_move_insn (mem, gen_raw_REG (SImode, regno));
/* Note the absence of RTX_FRAME_RELATED_P on the above insn:
the value isn't restored, so we don't want to tell dwarf2
......@@ -3162,7 +3162,7 @@ cris_expand_prologue (void)
mem = gen_rtx_MEM (SImode, stack_pointer_rtx);
set_mem_alias_set (mem, get_frame_alias_set ());
insn = emit_move_insn (mem, gen_rtx_raw_REG (SImode, CRIS_SRP_REGNUM));
insn = emit_move_insn (mem, gen_raw_REG (SImode, CRIS_SRP_REGNUM));
RTX_FRAME_RELATED_P (insn) = 1;
framesize += 4;
}
......@@ -3260,7 +3260,7 @@ cris_expand_prologue (void)
mem = gen_rtx_MEM (SImode, stack_pointer_rtx);
set_mem_alias_set (mem, get_frame_alias_set ());
insn = emit_move_insn (mem, gen_rtx_raw_REG (SImode, regno));
insn = emit_move_insn (mem, gen_raw_REG (SImode, regno));
RTX_FRAME_RELATED_P (insn) = 1;
framesize += 4 + size;
......@@ -3426,7 +3426,7 @@ cris_expand_epilogue (void)
mem = gen_rtx_MEM (SImode, gen_rtx_POST_INC (SImode,
stack_pointer_rtx));
set_mem_alias_set (mem, get_frame_alias_set ());
insn = emit_move_insn (gen_rtx_raw_REG (SImode, regno), mem);
insn = emit_move_insn (gen_raw_REG (SImode, regno), mem);
/* Whenever we emit insns with post-incremented addresses
ourselves, we must add a post-inc note manually. */
......@@ -3512,7 +3512,7 @@ cris_expand_epilogue (void)
{
rtx mem;
rtx insn;
rtx srpreg = gen_rtx_raw_REG (SImode, CRIS_SRP_REGNUM);
rtx srpreg = gen_raw_REG (SImode, CRIS_SRP_REGNUM);
mem = gen_rtx_MEM (SImode,
gen_rtx_POST_INC (SImode,
stack_pointer_rtx));
......@@ -3527,8 +3527,7 @@ cris_expand_epilogue (void)
if (crtl->calls_eh_return)
emit_insn (gen_addsi3 (stack_pointer_rtx,
stack_pointer_rtx,
gen_rtx_raw_REG (SImode,
CRIS_STACKADJ_REG)));
gen_raw_REG (SImode, CRIS_STACKADJ_REG)));
cris_expand_return (false);
}
else
......@@ -3545,7 +3544,7 @@ cris_expand_epilogue (void)
if (return_address_on_stack)
{
rtx mem;
rtx srpreg = gen_rtx_raw_REG (SImode, CRIS_SRP_REGNUM);
rtx srpreg = gen_raw_REG (SImode, CRIS_SRP_REGNUM);
rtx insn;
mem = gen_rtx_MEM (SImode,
......@@ -3569,8 +3568,7 @@ cris_expand_epilogue (void)
if (crtl->calls_eh_return)
emit_insn (gen_addsi3 (stack_pointer_rtx,
stack_pointer_rtx,
gen_rtx_raw_REG (SImode,
CRIS_STACKADJ_REG)));
gen_raw_REG (SImode, CRIS_STACKADJ_REG)));
cris_expand_return (false);
}
......
gcc/config/microblaze/microblaze.c
......@@ -866,7 +866,7 @@ microblaze_classify_address (struct microblaze_address_info *info, rtx x,
}
case CONST_INT:
{
info->regA = gen_rtx_raw_REG (mode, 0);
info->regA = gen_raw_REG (mode, 0);
info->type = ADDRESS_CONST_INT;
info->offset = x;
return true;
......@@ -878,13 +878,13 @@ microblaze_classify_address (struct microblaze_address_info *info, rtx x,
info->type = ADDRESS_SYMBOLIC;
info->symbol_type = SYMBOL_TYPE_GENERAL;
info->symbol = x;
info->regA = gen_rtx_raw_REG (mode, get_base_reg (x));
info->regA = gen_raw_REG (mode, get_base_reg (x));
if (GET_CODE (x) == CONST)
{
if (GET_CODE (XEXP (x, 0)) == UNSPEC)
{
info->regA = gen_rtx_raw_REG (mode,
info->regA = gen_raw_REG (mode,
get_base_reg (XVECEXP (XEXP (x,0), 0, 0)));
return microblaze_classify_unspec (info, XEXP (x, 0));
}
......
gcc/config/sparc/sparc.md
......@@ -2364,7 +2364,7 @@
&& reload_completed"
[(clobber (const_int 0))]
{
operands[0] = gen_rtx_raw_REG (DImode, REGNO (operands[0]));
operands[0] = gen_raw_REG (DImode, REGNO (operands[0]));
if (TARGET_ARCH64)
{
......
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