fp-armv8 is currently defined as a double precision FPv5 with 32 D
registers *and* a special FP_ARMv8 bit. However FP for ARMv8 should only
bring 32 D registers on top of FPv5-D16 so this FP_ARMv8 bit is
spurious. As a consequence, many instruction patterns which are guarded
by TARGET_FPU_ARMV8 are unavailable to FPv5-D16 and FPv5-SP-D16.

This commit gets rid of TARGET_FPU_ARMV8 and rewire all uses to
expressions based on TARGET_VFP5, TARGET_VFPD32 and TARGET_VFP_DOUBLE.
It also redefine ISA_FP_ARMv8 to include the D32 capability to
distinguish it from FPv5-D16. At last, it sets the +fp.sp for ARMv8-R to
enable FPv5-SP-D16 (ie FP for ARMv8 with single precision only and 16 D
registers).

2017-07-14  Thomas Preud'homme  <thomas.preudhomme@arm.com>

    gcc/
    * config/arm/arm-isa.h (isa_bit_FP_ARMv8): Delete enumerator.
    (ISA_FP_ARMv8): Define as ISA_FPv5 and ISA_FP_D32.
    * config/arm/arm-cpus.in (armv8-r): Define fp.sp as enabling FPv5.
    (fp-armv8): Define it as FP_ARMv8 only.
    config/arm/arm.h (TARGET_FPU_ARMV8): Delete.
    (TARGET_VFP_FP16INST): Define using TARGET_VFP5 rather than
    TARGET_FPU_ARMV8.
    config/arm/arm.c (arm_rtx_costs_internal): Replace checks against
    TARGET_FPU_ARMV8 by checks against TARGET_VFP5.
    * config/arm/arm-builtins.c (arm_builtin_vectorized_function): Define
    first ARM_CHECK_BUILTIN_MODE definition using TARGET_VFP5 rather
    than TARGET_FPU_ARMV8.
    * config/arm/arm-c.c (arm_cpu_builtins): Likewise for
    __ARM_FEATURE_NUMERIC_MAXMIN macro definition.
    * config/arm/arm.md (cmov<mode>): Condition on TARGET_VFP5 rather than
    TARGET_FPU_ARMV8.
    * config/arm/neon.md (neon_vrint): Likewise.
    (neon_vcvt): Likewise.
    (neon_<fmaxmin_op><mode>): Likewise.
    (<fmaxmin><mode>3): Likewise.
    * config/arm/vfp.md (l<vrint_pattern><su_optab><mode>si2): Likewise.
    * config/arm/predicates.md (arm_cond_move_operator): Check against
    TARGET_VFP5 rather than TARGET_FPU_ARMV8 and fix spacing.

From-SVN: r250204

gcc/c-family/ChangeLog:
	* c-common.c (try_to_locate_new_include_insertion_point): New
	function.
	(per_file_includes_t): New typedef.
	(added_includes_t): New typedef.
	(added_includes): New variable.
	(maybe_add_include_fixit): New function.
	* c-common.h (maybe_add_include_fixit): New decl.

gcc/c/ChangeLog:
	* c-decl.c (implicitly_declare): When suggesting a missing
	#include, provide a fix-it hint.

gcc/cp/ChangeLog:
	* name-lookup.c (get_std_name_hint): Add '<' and '>' around
	the header names.
	(maybe_suggest_missing_header): Update for addition of '<' and '>'
	to above.  Provide a fix-it hint.
	* pt.c: Include "gcc-rich-location.h"
	(listify): Attempt to add fix-it hint for missing
	#include <initializer_list>.
	* rtti.c: Include "gcc-rich-location.h".
	(typeid_ok_p): Attempt to add fix-it hint for missing
	#include <typeinfo>.

gcc/testsuite/ChangeLog:
	* g++.dg/cpp0x/missing-initializer_list-include.C: New test case.
	* g++.dg/lookup/missing-std-include-2.C: New test case.
	* g++.dg/lookup/missing-std-include-3.C: New test case.
	* g++.dg/rtti/missing-typeinfo-include.C: New test case.
	* gcc.dg/missing-header-fixit-1.c: New test case.
	* gcc.dg/missing-header-fixit-2.c: New test case.
	* gcc.dg/missing-header-fixit-2.h: New header.

From-SVN: r250203

This patch refactors comments in config/aarch64/aarch64.c aarch64_print_operand
to provide a table of aarch64 specific formating options.

---
gcc/

2017-07-14  Jackson Woodruff  <jackson.woodruff@arm.com>

	* config/aarch64/aarch64.c (aarch64_print_operand): Move comments
	to top of function.

From-SVN: r250202

	* gimple-ssa-store-merging.c (clear_bit_region): Replace reference to
	loop in comment with memset.

From-SVN: r250201

re PR sanitizer/81066 (sanitizer_stoptheworld_linux_libcdep.cc:276:22: error: aggregate ‘sigaltstack handler_stack’ has incomplete type and cannot be defined)

	PR sanitizer/81066
	* sanitizer_common/sanitizer_linux.h: Cherry-pick upstream r307969.
	* sanitizer_common/sanitizer_linux.cc: Likewise.
	* sanitizer_common/sanitizer_stoptheworld_linux_libcdep.cc: Likewise.
	* tsan/tsan_platform_linux.cc: Likewise.

From-SVN: r250200

2017-07-14  Martin Liska  <mliska@suse.cz>

	* cfgexpand.c (expand_gimple_basic_block): Remove dead comment.
	* dwarf2out.c (is_java): Remove the function.
	(output_pubname): Remove usage of the function.
	(lower_bound_default): Remove usage of DW_LANG_Java.
	(gen_compile_unit_die): Likewise.
	* gcc.c: Remove compiler defaults for .java and .zip files.
	* gimple-expr.c (remove_suffix): Change as there's no longer
	extension than 4-letter one.
	* gimplify.c (mostly_copy_tree_r): Remove Java-special part.
	(gimplify_save_expr): Likewise.
	* ipa-utils.h (polymorphic_type_binfo_p): Remove the comment
	as it's possible even for other languages than Java.
	* langhooks.h (struct lang_hooks): Remove Java from a comment.
	* lto-opts.c (lto_write_options): Remove reference to Java.
	* opts.c (strip_off_ending): Update file extension handling.
	* tree-cfg.c (verify_gimple_call): Remove comment with Java.
	* tree-eh.c (lower_resx): Likewise.
	* tree.c (free_lang_data_in_type): Remove dead code.
	(find_decls_types_r): Likewise.
	(build_common_builtin_nodes): Remove Java from a comment.
	(verify_type): Remove dead code.
	* varasm.c (assemble_external): Remove Java from a comment.

From-SVN: r250199

2017-07-14  Martin Liska  <mliska@suse.cz>

	* opts.c (finish_options): Add quotes.
	(common_handle_option): Likewise.

From-SVN: r250198

2017-07-14  Martin Liska  <mliska@suse.cz>

	* dbxout.c (get_lang_number): Do not handle GNU Pascal.
	* dbxout.h (extern void dbxout_stab_value_internal_label_diff):
	Remove N_SO_PASCAL.
	* dwarf2out.c (lower_bound_default): Do not handle
	DW_LANG_Pascal83.
	(gen_compile_unit_die): Likewise.
	* gcc.c: Remove default extension binding for GNU Pascal.
	* stmt.c: Remove Pascal language from a comment.
	* xcoffout.c: Likewise.

From-SVN: r250197

From-SVN: r250195

PR c/81405 identifies a crash when printing fix-it hints from
-Wmissing-braces when there are excess elements.

The fix-it hints are bogus (which I've filed separately as PR c/81432),
but they lead to a crash within the fix-it consolidation logic I added
in r247548, in line_corrections::add_hint.

The root cause is that some of the fix-it hints are out-of-order
with respect to the column numbers they affect, which can lead to negative
values when computing the gap between the fix-it hints, leading to bogus
memcpy calls that generate out-of-bounds buffer accesses.

The fix is to sort the fix-it hints after filtering them, ensuring that
the gap >= 0.  The patch also adds numerous assertions to the code, both
directly, and by moving the memcpy calls and their args behind
interfaces (themselves containing gcc_assert).

This fixes the crash; it doesn't fix the bug in -Wmissing-braces that
leads to the bogus hints.

gcc/ChangeLog:
	PR c/81405
	* diagnostic-show-locus.c (fixit_cmp): New function.
	(layout::layout): Sort m_fixit_hints.
	(column_range::column_range): Assert that the values are valid.
	(struct char_span): New struct.
	(correction::overwrite): New method.
	(struct source_line): New struct.
	(line_corrections::add_hint): Add assertions.  Reimplement memcpy
	calls in terms of classes source_line and char_span, and
	correction::overwrite.
	(selftest::test_overlapped_fixit_printing_2): New function.
	(selftest::diagnostic_show_locus_c_tests): Call it.

gcc/testsuite/ChangeLog:
	PR c/81405
	* gcc.dg/Wmissing-braces-fixits.c: Add coverage for PR c/81405.  */

From-SVN: r250187

[gcc]

	2017-07-12  Will Schmidt  <will_schmidt@vnet.ibm.com>

	* config/rs6000/rs6000.c (rs6000_gimple_fold_builtin): Return
	early if there is no lhs.

[testsuite]

	2017-07-12  Will Schmidt  <will_schmidt@vnet.ibm.com>

	* gcc.target/powerpc/fold-vec-missing-lhs: New.

From-SVN: r250185

2017-07-13  Martin Liska  <mliska@suse.cz>

	* dwarf2out.c (gen_pointer_type_die): Remove dead code.
	(gen_reference_type_die): Likewise.
	* stor-layout.c: Remove Pascal-related comment.

From-SVN: r250184

	* pt.c (do_class_deduction): Do list deduction in two phases.

From-SVN: r250183

	* g++.old-deja/g++.bugs/900520_03.C: Limit error to c++14_down.
	* g++.old-deja/g++.law/array2.C: Likewise.

From-SVN: r250182

From-SVN: r250181

	* libcp1plugin.cc (plugin_build_decl): Use
	DECL_CXX_{CON,DE}STRUCTOR directly.

From-SVN: r250180

2017-07-13  Martin Liska  <mliska@suse.cz>

	* opts.c (finish_options): Add quotes to error messages.
	(parse_sanitizer_options): Likewise.
2017-07-13  Martin Liska  <mliska@suse.cz>

	* c-c++-common/ubsan/sanitize-all-1.c: Update scanned pattern.
	* c-c++-common/ubsan/sanitize-recover-1.c:Likewise.
	* c-c++-common/ubsan/sanitize-recover-2.c:Likewise.
	* c-c++-common/ubsan/sanitize-recover-5.c:Likewise.
	* c-c++-common/ubsan/sanitize-recover-7.c:Likewise.
	* c-c++-common/ubsan/sanitize-recover-8.c:Likewise.
	* c-c++-common/ubsan/sanitize-recover-9.c:Likewise.

From-SVN: r250179

2017-07-13  Thomas Preud'homme  <thomas.preudhomme@arm.com>

    gcc/
    * doc/invoke.texi (armv8-r): Document +fp.sp ARMv8-R extension.

From-SVN: r250178

My patch last week to address selection of be8 linking mode broke the
build for vxworks.  It turns out that this port is one of the few
remaining that is still not based on the EABI/AAPCS.

This patch fixes the build, but I've not really tested it beyond
building the core compiler binaries.  Building a workable compiler
entails downloading a load of vxworks stuff that I'm not sure where to
find.

	* config/arm/vxworks.h (TARGET_ENDIAN_DEFAULT): Define.

From-SVN: r250177

gcc/
	* asan.c (asan_emit_allocas_unpoison): Use ptr_mode for arguments
	during expansion.
	* builtins.c (expand_asan_emit_allocas_unpoison): Likewise.

From-SVN: r250176

	PR go/81393
    syscall: don't use GETREGS/SETREGS on s390
    
    They were removed in recent glibc.
    
    Patch by Andreas Krebbel for GCC PR 81393.
    
    Reviewed-on: https://go-review.googlesource.com/48231

From-SVN: r250174

From-SVN: r250173

re PR target/81193 (PowerPC GCC __builtin_cpu_is and __builtin_cpu_supports should warn about old libraries)

[gcc]
2017-07-12  Michael Meissner  <meissner@linux.vnet.ibm.com>

	PR target/81193
	* config/rs6000/rs6000-c.c (rs6000_cpu_cpp_builtins): If GLIBC
	provides the hardware capability bits, define the macro
	__BUILTIN_CPU_SUPPORTS__.
	* config/rs6000/rs6000.c (cpu_expand_builtin): Generate a warning
	if GLIBC does not provide the hardware capability bits.  Add a
	gcc_unreachable call if the built-in cpu function is neither
	__builtin_cpu_is nor __builtin_cpu_supports.
	(rs6000_get_function_versions_dispatcher): Change the warning
	that an old GLIBC is used which does not export the capability
	bits to be an error.
	* doc/extend.texi (target_clones attribute): Document the
	restriction that GLIBC 2.23 or newer is needed on the PowerPC.
	(PowerPC built-in functions): Document that GLIBC 2.23 or newer is
	needed by __builtin_cpu_is and __builtin_cpu_supports.  Document
	the macros defined by GCC if the newer GLIBC is available.

[gcc/testsuite]
2017-07-12  Michael Meissner  <meissner@linux.vnet.ibm.com>

	PR target/81193
	* gcc.target/powerpc/bmi-andn-1.c: Add guard against using
	__builtin_cpu_supports with old GLIBC's.
	* gcc.target/powerpc/bmi-andn-2.c: Likewise.
	* gcc.target/powerpc/bmi-bextr-1.c: Likewise.
	* gcc.target/powerpc/bmi-bextr-2.c: Likewise.
	* gcc.target/powerpc/bmi-bextr-4.c: Likewise.
	* gcc.target/powerpc/bmi-bextr-5.c: Likewise.
	* gcc.target/powerpc/bmi-blsi-1.c: Likewise.
	* gcc.target/powerpc/bmi-blsi-2.c: Likewise.
	* gcc.target/powerpc/bmi-blsmsk-1.c: Likewise.
	* gcc.target/powerpc/bmi-blsmsk-2.c: Likewise.
	* gcc.target/powerpc/bmi-blsr-1.c: Likewise.
	* gcc.target/powerpc/bmi-blsr-2.c: Likewise.
	* gcc.target/powerpc/bmi-tzcnt-1.c: Likewise.
	* gcc.target/powerpc/bmi-tzcnt-2.c: Likewise.
	* gcc.target/powerpc/bmi2-bzhi32-1.c: Likewise.
	* gcc.target/powerpc/bmi2-bzhi64-1.c: Likewise.
	* gcc.target/powerpc/bmi2-mulx32-1.c: Likewise.
	* gcc.target/powerpc/bmi2-mulx32-2.c: Likewise.
	* gcc.target/powerpc/bmi2-mulx64-1.c: Likewise.
	* gcc.target/powerpc/bmi2-mulx64-2.c: Likewise.
	* gcc.target/powerpc/bmi2-pdep32-1.c: Likewise.
	* gcc.target/powerpc/bmi2-pdep64-1.c: Likewise.
	* gcc.target/powerpc/bmi2-pext32-1.c: Likewise.
	* gcc.target/powerpc/bmi2-pext64-1.c: Likewise.
	* gcc.target/powerpc/cpu-builtin-1.c: Likewise.

[libgcc]
2017-07-12  Michael Meissner  <meissner@linux.vnet.ibm.com>

	PR target/81193
	* configure.ac (PowerPC float128 hardware support): Test whether
	we can use __builtin_cpu_supports before enabling the ifunc
	handler.
	* configure: Regenerate.

From-SVN: r250165

	* config/riscv/riscv.c: Remove unnecessary includes.  Reorder
	remaining includes slightly.
	* config/riscv/riscv-builtins.c: Include profile-count.h.

From-SVN: r250162

	* libcp1plugin.cc (plugin_build_decl): Use
	DECL_CXX_{CON,DE}STRUCTOR directly.

From-SVN: r250159

	* cp-tree.h (DECL_CONSTRUCTOR_P, DECL_MAYBE_IN_CHARGE_CONSTRUCTOR,
	DECL_DESTRUCTOR_P, DECL_MAYBE_IN_CHARGE_DESTRCTOR): Look at
	identifier flags.
	* decl.c (grokfndecl): Set DECL_CXX_CONSTRUCTOR and
	DECL_CXX_DESTRUCTOR explicitly.
	* decl2.c (grokclassfn): Likewise.
	* friend.c (do_friend): Likewise.
	* method.c (make_thunk, make_alias_for,
	implicitly_declare_fn): Likewise.

From-SVN: r250158

	PR target/79883
	* config/avr/avr.c (avr_set_current_function): In diagnostic
	messages: Quote keywords and (parts of) identifiers.
	[WITH_AVRLIBC]: Warn for functions named "ISR", "SIGNAL" or
	"INTERUPT".

From-SVN: r250156

gcc/ChangeLog:

2017-07-12  Carl Love  <cel@us.ibm.com>

	* config/rs6000/rs6000-c.c: Add support for built-in functions
	vector bool char vec_revb (vector bool char);
	vector bool short vec_revb (vector short char);
	vector bool int vec_revb (vector bool int);
	vector bool long long vec_revb (vector bool long long);
	* doc/extend.texi: Update the built-in documentation file for the
	new built-in functions.

gcc/testsuite/ChangeLog:

2017-07-12  Carl Love  <cel@us.ibm.com>

	* gcc.target/powerpc/p9-xxbr-1.c (rev_bool_char, rev_bool_short,
	rev_bool_int): Add test cases for builtins.
	* gcc.target/powerpc/p9-xxbr-2.c (rev_long_long, rev_ulong_ulong): Add
	test cases for builtins.

From-SVN: r250155

gcc/testsuite/ChangeLog:

2017-07-12  Carl Love  <cel@us.ibm.com>

	* gcc.target/powerpc/builtins-1-p9-runnable.c (dg-ddo run): Add
	lp64 && p9vector_hw.

From-SVN: r250154

The backend splitter splitting a 3 operand load on condition into 2 is
wrong.  The S/390 load on condition instruction might trap on the
memory operand even if the condition is false.  So if the first load
on condition overwrites a register used as part of the memory address
of the second the second might trigger a segfault even if it does not
actually perform the load.

Trying to fix this I noticed that the generated code looks anyway
better without the splitter.  So removing the splitter entirely is the
way to go here.

gcc/ChangeLog:

2017-07-12  Andreas Krebbel  <krebbel@linux.vnet.ibm.com>

	* config/s390/s390.md: Remove movcc splitter.

From-SVN: r250153

This adds code to the backend rtx_costs function in order to model the
costs of a load/store on condition.

gcc/ChangeLog:

2017-07-12  Andreas Krebbel  <krebbel@linux.vnet.ibm.com>

	* config/s390/s390.c (s390_rtx_costs): Return proper costs for
	load/store on condition.

From-SVN: r250152

	PR target/81407
	* config/avr/avr.c (avr_encode_section_info)
	[progmem && !TREE_READONLY]: Error if progmem object needs
	constructing.

From-SVN: r250151

2017-07-12  Christophe Lyon  <christophe.lyon@linaro.org>

	* lib/target-supports.exp (check_stack_check_available): Make
	testcase name depend on stack_kind.

From-SVN: r250149

2017-07-11  Michael Collison  <michael.collison@arm.com>

	* config/aarch64/aarch64-simd.md(aarch64_sub<mode>_compare0):
	New pattern.
	* testsuite/gcc.target/aarch64/cmp-2.c: New testcase.

From-SVN: r250148

From-SVN: r250147

2017-07-11  Paolo Carlini  <paolo.carlini@oracle.com>

	PR c++/51270
	* g++.dg/warn/Wreturn-local-addr-3.C: New.

From-SVN: r250140

	* decl.c (grokparms): Downgrade error about array of unknown bound
	to pedwarn and disable it for C++17.

From-SVN: r250137

gcc/ChangeLog:

2017-07-11  Carl Love  <cel@us.ibm.com>

	* config/rs6000/rs6000-c.c: Add support for builtins
	vector unsigned int vec_parity_lsbb (vector signed int);
	vector unsigned int vec_parity_lsbb (vector unsigned int);
	vector unsigned __int128 vec_parity_lsbb (vector signed __int128);
	vector unsigned __int128 vec_parity_lsbb (vector unsigned __int128);
	vector unsigned long long vec_parity_lsbb (vector signed long long);
	vector unsigned long long vec_parity_lsbb (vector unsigned long long);
	* config/rs6000/rs6000-builtin.def (VPARITY_LSBB): Add BU_P9V_OVERLOAD1.
	* config/rs6000/altivec.h (vec_parity_lsbb): Add define.
	* doc/extend.texi: Update the built-in documentation file for the
	new built-in functions.

gcc/testsuite/ChangeLog:

2017-07-11  Carl Love  <cel@us.ibm.com>

	* gcc.target/powerpc/builtins-2-p9-runnable.c: Add new file with
	test cases for the builtins.

From-SVN: r250135

From-SVN: r250134

gcc/ChangeLog:
	* diagnostic-show-locus.c: Include "gcc-rich-location.h".
	(layout::m_primary_loc): New field.
	(layout::layout): Initialize new field.  Move location filtering
	logic from here to...
	(layout::maybe_add_location_range): ...this new method.  Add
	support for filtering to just the lines already specified by other
	locations.
	(layout::will_show_line_p): New method.
	(selftest::test_add_location_if_nearby): New test function.
	(selftest::diagnostic_show_locus_c_tests): Call it.
	* gcc-rich-location.h (gcc_rich_location::add_location_if_nearby):
	New method.

From-SVN: r250133