COMPOUND_EXPRs, too.

From-SVN: r7500

        to COMPOUND_EXPRs, too.

From-SVN: r7499

From-SVN: r7498

(muldi3): Fix predicate.
(movdf matcher): Allow update and indexed for lfd instruction.

From-SVN: r7497

From-SVN: r7496

From-SVN: r7495

From-SVN: r7494

From-SVN: r7493

From-SVN: r7492

	* gcc.c: Include multilib.h.
	(print_multi_lib, print_multi_directory, multilib_select,
	multilib_dir): New static variables.
	(option_map): Added --print-multi-lib and --print-multi-directory.
	(set_spec): Get multilib_select from specs file.
	(process_command): Dump multilib_select into specs file.  Handle
	-print-multi-lib and -print-multi-directory.
	(do_spec_1): Try multilib_dir for %D case.
	(find_file): Try multilib_dir.
	(main): Call set_multilib_dir.  Handle print_multi_lib and
	print_multi_directory.
	(used_arg, set_multilib_dir, print_multilib_info): New functions.

From-SVN: r7491

(gcc.o): Depend on multilib.h.
(clean): Remove multilib.h and tmpmultilib*.

From-SVN: r7490

From-SVN: r7489

From-SVN: r7488

	* sparc/sparc.md (cpu): New attribute.
	(type attribute): New value cmove (conditional moves).
	(cmpdi): New pattern for v9.
	(seq*, sne*): Add v9 support.
	(sgt,slt,sge,sle): Explicitly restrict operand 0 to the integer
	registers.  Try emitting a conditional move for v9.
	(sgtu,sltu,sgeu,sleu): Likewise.
	(comparison insns): Add v9 versions.
	(scc insns): Add DImode versions for v9.
	(beq, bne, bgt, blt, bge, ble): If comparing DImode with 0 on v9,
	use brxx insns.  Use emit_jump_insn, not emit_insn, as the latter
	mishandles brxx insns.
	(branch insns): Update calls to output_cbranch.
	Add v9 versions to support multiple floating point condition code regs.
	Add v9 versions to support brxx insns.
	(lo_sum, high, pic): Add v9 support.
	(symbolic move patterns): Disable for v9.
	(DImode, DFmode, TFmode moves): Add v9 support.
	(conditional move insns): Define for v9.
	(zero_extendqidi2, extendqidi2, zero_extendhidi2, extendhidi2,
	zero_extendsidi2, extendsidi2, floatdisf2, floatdidf2, floatditf2,
	fix_truncsfdi2, fix_truncdfdi2, fix_trunctfdi2, muldi3, divdi3,
	udivdi3, ashldi3, ashrdi3, lshrdi3, ffsdi2): New patterns for v9.
	(bitfield compare insn): Add DImode version for v9.
	(adddi3, subdi3, negdi2, anddi3, iordi3, xordi3, one_cmpldi2,
	mixed mode fp mult insns, negdf2, negtf2, absdf2, abstf2, tablejump,
	call, call_value, untyped_call, untyped_return, indirect_jump,
	flush_register_windows, flush): Add v9 support.
	(ldd peep holes): Disable for v9.
	(set/compare peep hole): Define DImode version for v9.
	(sign extend/compare peep hole): Likewise.
	(return peep holes): Add v9 support.
	(call/jump peep holes): Add v9 support.

From-SVN: r7487

	* sparc/sparc.c (SKIP_CALLERS_UNIMP_P): Define.
	(sparc_cpu_type, sparc_arg_count, sparc_n_named_args,
	frame_base_offset, fpconv_stack_temp): New globals.
	(leaf_reg_remap): Add additional registers for v9.
	(sparc_override_options, sparc64_init_expanders,
	sparc64_fpconv_stack_temp, intreg_operand, ccfp_reg_operand,
	data_segment_operand, text_segment_operand, v9_regcmp_op,
	arith11_operand, arith10_operand, arith11_double_operand,
	arith10_double_operand, gen_v9_scc, emit_v9_brxx_insn,
	sparc_init_modes, build_big_number, output_v9branch,
	sparc_initialize_trampoline, sparc64_initialize_trampoline):
	New functions.
	(arith_double_operand, gen_compare_reg, finalize_pic,
	emit_move_sequence, mem_aligned_8, output_move_double,
	output_move_quad, output_fp_move_double, output_fp_move_quad,
	output_block_move, save_regs, restore_regs): Add v9 support.
	(sparc_mode_class): New enum.
	(*_MODES): Redefine to use it.
	(hard_32bit_mode_classes): Renamed from hard_regno_mode_ok.
	(hard_regno_mode_classes, hard_64bit_mode_classes,
	sparc_mode_class): New globals.
	(num_gfregs): Renamed from num_fregs.
	(compute_frame_size): Add v9 support.  Simplify calculations.
	(output_function_prologue): Call build_big_number to compute stack
	size in %g1, then adjust %sp.
	Fix saving of call saved registers.  Handle new v9 registers.
	(output_function_epilogue): Fix restoration of call saved registers.
	Handle new v9 registers.
	Use SKIP_CALLERS_UNIMP_P to see if unimp insn is at return address.
	(sparc_builtin_saveregs): Define v9 version.
	(output_cbranch): New argument fp_cond_reg.  All callers changed.
	Add v9 support.
	(output_return): Use SKIP_CALLERS_UNIMP_P.
	(print_operand): New codes '_', '@', 'C', 'D'.
	(output_double_int): Handle LABEL_REF and MINUS for v9.
	Use ASM_LONGLONG if assembler can handle it.

From-SVN: r7486

	* sparc/sparc.h (cpu_type): New enum.
	(CPP_PREDEFINES,CPP_SPEC): Add v9 support.
	(NO_BUILTIN_PTRDIFF_TYPE, NO_BUILTIN_SIZE_TYPE, MAX_WCHAR_TYPE_SIZE,
	SHORT_TYPE_SIZE, INT_TYPE_SIZE, LONG_TYPE_SIZE, LONG_LONG_TYPE_SIZE,
	FLOAT_TYPE_SIZE, DOUBLE_TYPE_SIZE, MAX_INT_TYPE_SIZE,
	MAX_LONG_TYPE_SIZE): Define.
	(PTRDIFF_TYPE, SIZE_TYPE, BITS_PER_WORD, MAX_BITS_PER_WORD,
	UNITS_PER_WORD, MAX_UNITS_PER_WORD, LONG_DOUBLE_TYPE_SIZE,
	POINTER_SIZE, PARM_BOUNDARY, STACK_BOUNDARY, SPARC_STACK_ALIGN,
	EMPTY_FIELD_BOUNDARY, BIGGEST_ALIGNMENT, FIRST_PSEUDO_REGISTER,
	FIXED_REGISTERS, CALL_USED_REGISTERS, CONDITIONAL_REGISTER_USAGE):
	Add v9 support.
	(sparc_override_options, sparc_code_model): Declare.
	(OVERRIDE_OPTIONS): Call it.
	(MASK_*): Define bits set by target flags.
	(TARGET_*): Use them.
	({MASK,TARGET}_{V9,INT64,LONG64,PTR64,ENV32,STACK_BIAS,
	MEDLOW,MEDANY,FULLANY}): Define.
	(MEDANY_BASE_REG): Define.
	(V9_SWITCHES, TARGET_OPTIONS): Define.
	(TARGET_SWITCHES, TARGET_DEFAULT): Use MASK_*.
	(SPARC_STACK_BIAS, SECONDARY_MEMORY_NEEDED_MODE): Define.
	(SECONDARY_MEMORY_NEEDED): Simplify.
	(hard_regno_mode_class, sparc_mode_class, sparc_cpu_type): Declare.
	(REG_PARM_STACK_SPACE): Do not define if v9.
	(HARD_REGNO_NREGS, HARD_REGNO_MODE_OK, MODES_TIEABLE_P,
	RETURN_IN_MEMORY, STRUCT_VALUE, STRUCT_VALUE_INCOMING, reg_class,
	REG_CLASS_NAMES, REG_CLASS_CONTENTS, REGNO_REG_CLASS, REG_ALLOC_ORDER,
	REG_LEAF_ALLOC_ORDER, LEAF_REGISTERS, REG_CLASS_FROM_LETTER,
	CLASS_MAX_NREGS, STARTING_FRAME_OFFSET, FIRST_PARM_OFFSET,
	BASE_RETURN_VALUE_REG, BASE_OUTGOING_VALUE_REG, BASE_PASSING_ARG_REG,
	BASE_INCOMING_ARG_REG, FUNCTION_ARG_REGNO_P): Add v9 support.
	(sparc_arg_class): New enum (v9 only).
	(sparc_args): New struct to record v9 arguments.
	(CUMULATIVE_ARGS): Use it (v9 only).
	(GET_SPARC_ARG_CLASS): Define.
	(sparc_arg_count, sparc_n_named_args): Declare.
	(PASS_IN_REG_P): Define.
	(ROUND_REG, ROUND_ADVANCE, INIT_CUMULATIVE_ARGS, FUNCTION_ARG_ADVANCE,
	FUNCTION_ARG, FUNCTION_INCOMING_ARG, FUNCTION_ARG_PARTIAL_NREGS,
	FUNCTION_ARG_PASS_BY_REFERENCE, FUNCTION_ARG_CALLEE_COPIES):
	Add v9 support.
	(sparc64_init_expanders, sparc64_fpconv_stack_temp): Declare.
	(INIT_EXPANDERS): Define (v9 only).
	(gen_v9_scc, output_v9branch): Declare.
	(HAVE_conditional_move): Define.
	(FUNCTION_PROFILER, FUNCTION_BLOCK_PROFILER, BLOCK_PROFILER,
	DYNAMIC_CHAIN_ADDRESS, RETURN_ADDR_RTX, REGNO_OK_FOR_FP_P,
	REG_OK_FOR_INDEX_P, REG_OK_FOR_BASE_P, EXTRA_CONSTRAINT,
	CASE_VECTOR_MODE, Pmode, EXTRA_CC_MODES, EXTRA_CC_NAMES,
	SELECT_CC_MODE, REGISTER_NAMES): Add v9 support.
	(REGNO_OK_FOR_CCFP_P): Define.
	(sparc_initialize_trampoline, sparc64_initialize_trampoline): Declare.
	(INITIALIZE_TRAMPOLINE): Call them.
	(ENCODE_SECTION_INFO): Mark functions in v9.
	(RTX_COSTS): Assume MULT costs the same for v9 as v8.
	(ASM_LONGLONG, ASM_FLOAT): Define.
	(ASM_OUTPUT_ADDR_VEC_ELT, ASM_OUTPUT_ADDR_DIFF_ELT): Add v9 support.

From-SVN: r7485

From-SVN: r7484

From-SVN: r7483

	* genconfig.c (main): Allow targets to override HAVE_conditional_move.
	* jump.c (jump_optimize): Use it at run-time.

From-SVN: r7482

	* config.sub (sparc64): New cpu.
	(aout, elf): New os's.

From-SVN: r7481

From-SVN: r7480

(subsi3): Don't handle CONST_INT for operand 2.
(ashiftrt, op2 > 8): New pattern.
(lshiftrt, op2 > 8): New pattern.

From-SVN: r7479

From-SVN: r7478

From-SVN: r7477

From-SVN: r7476

From-SVN: r7475

From-SVN: r7474

(encode, decode): Use 4 HOST_WIDE_INTs for encoded value with HOST_BITS_PER_WIDE_INT/2 bits in each.

(encode, decode): Use 4 HOST_WIDE_INTs for encoded
value with HOST_BITS_PER_WIDE_INT/2 bits in each.
(LOWPART, HIGHPART): New macros.
(BASE): Move definition outside of div_and_round_double.
(add_double, mul_double, lshift_double, rshift_double): Rewrite.
(lrotate_double): Use LOWPART, HIGHPART, and BASE.
(rrotate_double): Likewise.
(div_and_round_double): Major changes to code for general case.
Now it actually produces non-garbage results for large operands.
(div_and_round_double): Simplify condition for special code used when
divisor < BASE.
(const_binop): Delete special cases for multiplying by 0, 1, 2, 4, 8.
(fold, case *_DIV_EXPR): Don't try to optimize for overflow.

From-SVN: r7473

From-SVN: r7472

(finish_enum): Rewrite code to determine precision required for enumeral type.

From-SVN: r7471

CONST_INT cases for FLOAT and UNSIGNED_FLOAT.

From-SVN: r7470

argument, forcing a frame pointer to be needed.

From-SVN: r7469

From-SVN: r7468

From-SVN: r7467

From-SVN: r7466

From-SVN: r7465

From-SVN: r7464

From-SVN: r7463

When determining if needs are nongroup needs, ignore inactive or optional
reloads.
(reload_reg_used_in_op_addr_reload): New variable to indicate when reloads of
class RELOAD_FOR_OPADDR_ADDR are in use.
(mark_reload_reg_in_use, clear_reload_reg_in_use): Process reloads of class
RELOAD_FOR_OPADDR_ADDR.
(reload_reg_free_p, reload_reg_free_before_p, reloads_conflict): Likewise.
(choose_reload_regs): Support RELOAD_FOR_OPADDR_ADDR reloads.
(emit_reload_insns): Output RELOAD_FOR_OPADDR_ADDR reloads.

From-SVN: r7462

RELOAD_FOR_OPERAND_ADDRESS to RELOAD_FOR_OPADDR_ADDR.

From-SVN: r7461