Code scheduling for Cortex-A53 isn't as good as it could be.  It turns out
code runs faster overall if we place loads and stores with a dependency
closer together.  To achieve this effect, this patch adds a bypass between
cortex_a53_load1 and cortex_a53_load*/cortex_a53_store* if the result of an
earlier load is used in an address calculation.  This significantly improved
benchmark scores in a proprietary benchmark suite.

    gcc/
	* config/arm/aarch-common.c (arm_early_load_addr_dep_ptr):
	New function.
	(arm_early_store_addr_dep_ptr): Likewise.
	* config/arm/aarch-common-protos.h
	(arm_early_load_addr_dep_ptr): Add prototype.
	(arm_early_store_addr_dep_ptr): Likewise.
	* config/arm/cortex-a53.md: Add new bypasses.

From-SVN: r247631

re PR c++/71577 (ICE on invalid C++11 code (with extra struct initializer): in digest_init_r, at cp/typeck2.c:1117)

/cp
2017-05-05  Paolo Carlini  <paolo.carlini@oracle.com>

	PR c++/71577
	* decl.c (reshape_init): Unconditionally return error_mark_node
	upon error about too many initializers.

/testsuite
2017-05-05  Paolo Carlini  <paolo.carlini@oracle.com>

	PR c++/71577
	* g++.dg/cpp0x/pr71577.C: New.

From-SVN: r247630

	* tree.c (next_type_uid): Change type to unsigned.
	(type_hash_canon): Decrement back next_type_uid if
	freeing a type node with the highest TYPE_UID.  For INTEGER_TYPEs
	also ggc_free TYPE_MIN_VALUE, TYPE_MAX_VALUE and TYPE_CACHED_VALUES
	if possible.

From-SVN: r247628

From-SVN: r247627

gcc/ChangeLog:
	* builtins.c: Fix a trivial typo in a comment.

From-SVN: r247623

PR libstdc++/54924 - Warn for std::string constructor with wrong size
PR middle-end/79234 - warn on past the end reads by library functions

gcc/ChangeLog:

	PR middle-end/79234
	* builtins.c (check_sizes): Adjust to handle reading past the end.
	Avoid printing excessive upper bound of ranges.  Use %E to print
	tree nodes instead of converting them to %wu.
	(expand_builtin_memchr): New function.
	(compute_dest_size): Rename...
	(compute_objsize): ...to this.
	(expand_builtin_memcpy): Adjust.
	(expand_builtin_mempcpy): Adjust.
	(expand_builtin_strcat): Adjust.
	(expand_builtin_strcpy): Adjust.
	(check_strncat_sizes): Adjust.
	(expand_builtin_strncat): Adjust.
	(expand_builtin_strncpy): Adjust and simplify.
	(expand_builtin_memset): Adjust.
	(expand_builtin_bzero): Adjust.
	(expand_builtin_memcmp): Adjust.
	(expand_builtin): Handle memcmp.
	(maybe_emit_chk_warning): Check strncat just once.

gcc/testsuite/ChangeLog:

	PR middle-end/79234
	* gcc.dg/builtin-stringop-chk-8.c: New test.
	* gcc.dg/builtin-stringop-chk-1.c: Adjust.
	* gcc.dg/builtin-stringop-chk-4.c: Same.
	* gcc.dg/builtin-strncat-chk-1.c: Same.
	* g++.dg/ext/strncpy-chk1.C: Same.
	* g++.dg/torture/Wsizeof-pointer-memaccess1.C: Same.
	* gcc.dg/out-of-bounds-1.c: Same.
	* gcc.dg/pr78138.c: Same.
	* gcc.dg/torture/Wsizeof-pointer-memaccess1.c: Same.
	* gfortran.dg/mvbits_7.f90: Same.

From-SVN: r247622

From-SVN: r247619

PR preprocessor/79214 -  -Wno-system-header defeats strncat buffer overflow warnings
PR middle-end/79222 - missing -Wstringop-overflow= on a stpcpy overflow
PR middle-end/79223 - missing -Wstringop-overflow on a memmove overflow

gcc/ChangeLog:

	PR preprocessor/79214
	PR middle-end/79222
	PR middle-end/79223
	* builtins.c (check_sizes): Add inlinining context and issue
	warnings even when -Wno-system-headers is set.
	(check_strncat_sizes): Same.
	(expand_builtin_strncat): Same.
	(expand_builtin_memmove): New function.
	(expand_builtin_stpncpy): Same.
	(expand_builtin): Handle memmove and stpncpy.

gcc/testsuite/ChangeLog:

	PR preprocessor/79214
	PR middle-end/79222
	PR middle-end/79223
	* gcc.dg/pr79214.c: New test.
	* gcc.dg/pr79214.h: New test header.
	* gcc.dg/pr79222.c: New test.
	* gcc.dg/pr79223.c: New test.
	* gcc.dg/pr78138.c: Adjust.
	* gfortran.dg/unconstrained_commons.f: Same.

From-SVN: r247618

From-SVN: r247614

	* tree-ssa-loop-ivopts.c (struct cost_pair): Remove field inv_expr
	which is not used any more.

From-SVN: r247612

Many supported cores use the AUTOPREFETCHER_WEAK setting which tries
to order loads and stores to improve streaming performance.  Since significant
gains were reported in http://patchwork.ozlabs.org/patch/534469/ it seems
like a good idea to enable this setting too for -mcpu=generic.  Since the
weak model only keeps the order if it doesn't make the schedule worse, it
should not impact performance adversely on cores that don't show a gain.

    gcc/
        * config/aarch64/aarch64.c (generic_tunings): Update prefetch model.

From-SVN: r247610

Set jump alignment to 4 for Cortex cores as it reduces codesize by 0.4% on
average with no obvious performance difference.  See original discussion of
the overheads of various alignments:
https://gcc.gnu.org/ml/gcc-patches/2016-06/msg02075.html.

    gcc/
	* config/aarch64/aarch64.c (cortexa35_tunings): Set jump alignment to 4.
	(cortexa53_tunings): Likewise.
	(cortexa57_tunings): Likewise.
	(cortexa72_tunings): Likewise.
	(cortexa73_tunings): Likewise.

From-SVN: r247609

With -mcpu=generic the loop alignment is currently 4.  All but one of the
supported cores use 8 or higher.  Since using 8 provides performance gains
on several cores, it is best to use that by default.  As discussed in [1],
the jump alignment has no effect on performance, yet has a relatively high
codesize cost [2], so setting it to 4 is best.  This gives a 0.2% overall
codesize improvement as well as performance gains in several benchmarks.

    gcc/
	* config/aarch64/aarch64.c (generic_tunings): Set jump alignment to 4.
	Set loop alignment to 8.

[1] https://gcc.gnu.org/ml/gcc-patches/2017-04/msg00574.html
[2] https://gcc.gnu.org/ml/gcc-patches/2016-06/msg02075.html

From-SVN: r247608

gcc/c-family/ChangeLog:

	PR translation/80280
	* c-attribs.c (handle_alias_ifunc_attribute): Quote a %D directive.
	(handle_weakref_attribute): Same.

PR translation/80280 - Missing closing quote (%>) c/semantics.c and c/c-typeck.c

gcc/ChangeLog:

	PR translation/80280
	* config/i386/i386.c (ix86_function_versions): Quote a %D directive.

PR translation/80280 - Missing closing quote (%>) c/semantics.c and c/c-typeck.c

gcc/cp/ChangeLog:

	PR translation/80280
	* call.c (print_z_candidate): Add missing quoting to %D and other
	like directives.
	(build_op_call_1): Same.
	* constraint.cc (diagnose_check_constraint): Same.
	* mangle.c (mangle_decl): Same.
	* name-lookup.c (cp_binding_level_debug): Same.
	(set_decl_namespace): Same.
	* parser.c (cp_parser_tx_qualifier_opt): Same.
	* pt.c (print_candidates_1): Same.
	(check_template_variable): Same.
	(tsubst_default_argument): Same.
	(most_specialized_partial_spec): Same.
	* semantics.c (omp_reduction_lookup): Same.
	* tree.c (check_abi_tag_redeclaration): Same.
	* typeck.c (comptypes): Same.
	* typeck2.c (abstract_virtuals_error_sfinae): Same.

PR translation/80280 - Missing closing quote (%>) c/semantics.c and c/c-typeck.c

gcc/ChangeLog:

	PR translation/80280
	* builtins.c (expand_builtin_object_size): Add missing quoting to
	%D and like directives.
	* hsa-gen.c (hsa_type_for_scalar_tree_type): Same.
	(hsa_type_for_tree_type): Same.
	(verify_function_arguments): Same.
	* symtab.c (symbol_table::change_decl_assembler_name): Same.
	* varasm.c (get_section): Same.
	(mark_weak): Same.

PR translation/80280 - Missing closing quote (%>) c/semantics.c and c/c-typeck.c

gcc/objc/ChangeLog:

	PR translation/80280
	* objc-gnu-runtime-abi-01.c (objc_eh_runtime_type): Add missing
	quoting to directives.
	* objc-next-runtime-abi-01.c (objc_eh_runtime_type): Ditto.
	* objc-next-runtime-abi-02.c (next_runtime_02_eh_type): Ditto.

PR translation/80280 - Missing closing quote (%>) c/semantics.c and c/c-typeck.c

gcc/testsuite/ChangeLog:

	PR translation/80280
	* g++.dg/abi/Wabi-2-3.C: Adjust.
	* g++.dg/abi/Wabi-3-2.C: Ditto.
	* g++.dg/lookup/using17.C: Ditto.
	* gcc.dg/format/gcc_diag-1.c (foo): Ditto.

From-SVN: r247607

All cores which add a cpu_addrcost_table use a non-zero value for
HI and TI mode shifts (a non-zero value for general indexing also
applies to all shifts).  Given this, it makes no sense to use a
different setting in generic_addrcost_table.  So change it so that
all supported cores, including -mcpu=generic, now generate the same:

int f(short *p, short *q, long x) { return p[x] + q[x]; }

        lsl     x2, x2, 1
        ldrsh   w3, [x0, x2]
        ldrsh   w0, [x1, x2]
        add     w0, w3, w0
        ret

    gcc/
	* config/aarch64/aarch64.c (generic_addrcost_table):
	Change HI/TI mode setting.

From-SVN: r247606

2017-05-04  Martin Jambor  <mjambor@suse.cz>

	PR tree-optimization/80622
	* tree-sra.c (comes_initialized_p): New function.
	(build_accesses_from_assign): Only set write lazily when
	comes_initialized_p is false.
	(analyze_access_subtree): Use comes_initialized_p.
	(propagate_subaccesses_across_link): Assert !comes_initialized_p
	instead of testing for PARM_DECL.

testsuite/
	* gcc.dg/tree-ssa/pr80622.c: New test.

From-SVN: r247604

	* config/aarch64/aarch64.md (prefetch); Adjust predicate and
	constraint on operand 0 to allow more general addressing modes.
	Adjust output template.
	* config/aarch64/aarch64.c (aarch64_address_valid_for_prefetch_p):
	New function.
	* config/aarch64/aarch64-protos.h
	(aarch64_address_valid_for_prefetch_p): Declare prototype.
	* config/aarch64/constraints.md (Dp): New address constraint.
	* config/aarch64/predicates.md (aarch64_prefetch_operand): New
	predicate.

	* gcc.target/aarch64/prfm_imm_offset_1.c: New test.

From-SVN: r247603

	* be.po, da.po, el.po, fi.po, hr.po, id.po, ja.po, nl.po, ru.po,
	sr.po, sv.po, tr.po, uk.po, vi.po, zh_CN.po, zh_TW.po: Update.

From-SVN: r247601

	* cp-tree.h (enum cp_tree_index): Add CPTI_GLOBAL,
	CPTI_GLOBAL_TYPE, CPTI_GLOBAL_IDENTIFIER, CPTI_ANON_IDENTIFIER,
	CPTI_INIT_LIST_IDENTIFIER.
	(global_namespace, global_type_node, global_identifier)
	anon_identifier, init_list_identifier): New.
	* decl.c (global_type_node, global_scope_name): Delete.
	(initialize_predefined_identifiers): Add new identifiers.
	(cxx_init_decl_processing): Adjust.
	* name-lookup.h (global_namespace, global_type_node): Delete.
	* name-lookup.c (global_namespace, anonymous_namespace_name)
	get_anonymous_namespace_name): Delete.
	(namespace_scope_ht_size, begin_scope, pushtag_1)
	push_namespace): Adjust,
	* call.c (type_has_extended_temps): Use init_list_identifier.
	* pt.c (listify): Likewise.
(((--This line, and those below, will be ignored--

M    cp/name-lookup.c
M    cp/name-lookup.h
M    cp/ChangeLog
M    cp/call.c
M    cp/pt.c
M    cp/cp-tree.h
M    cp/decl.c

From-SVN: r247599

ipa-cp.c (perform_estimation_of_a_value): Drop base_time parameter; update use of estimate_ipcp_clone_size_and_time.


	* ipa-cp.c (perform_estimation_of_a_value): Drop base_time parameter;
	update use of estimate_ipcp_clone_size_and_time.
	(estimate_local_effects): Update use of
	estimate_ipcp_clone_size_and_time and perform_estimation_of_a_value.
	* ipa-inline.h (estimate_ipcp_clone_size_and_time): Update prototype.
	* ipa-inline-analysis.c (estimate_ipcp_clone_size_and_time):
	Return nonspecialized time.

	* gcc.dg/ipa/ipcp-2.c: Decrease ipcp threshold
	* gcc.dg/tree-ssa/ipa-cp-1.c: Likewise.

From-SVN: r247597

tree-ssa-alias.c (get_continuation_for_phi): Improve looking for the last VUSE which def dominates the PHI.

2017-05-04  Richard Biener  <rguenther@suse.de>

	* tree-ssa-alias.c (get_continuation_for_phi): Improve looking
	for the last VUSE which def dominates the PHI.  Directly call
	maybe_skip_until.
	(get_continuation_for_phi_1): Remove.

	* gcc.dg/tree-ssa/ssa-fre-58.c: New testcase.

From-SVN: r247596

	* name-lookup.c: Reorder functions to make merging from modules
	branch simpler.

From-SVN: r247592

For the reasons explained in PR77536, niter_for_unrolled_loop assumes 5
iterations in the absence of profiling information, although it doesn't
increase beyond the estimate for the original loop.  This left a hole in
which the new estimate could be less than the old one but still greater
than the limit imposed by CEIL (nb_iterations_upper_bound, unroll factor).

2017-05-04  Richard Sandiford  <richard.sandiford@linaro.org>

gcc/
	* tree-ssa-loop-manip.c (niter_for_unrolled_loop): Add commentary
	to explain the use of truncating division.  Cap the number of
	iterations to the maximum given by nb_iterations_upper_bound,
	if defined.

gcc/testsuite/
	* gcc.dg/vect/vect-profile-1.c: New test.

From-SVN: r247591

From-SVN: r247589

2017-05-04  Thomas Preud'homme  <thomas.preudhomme@arm.com>

	* configure.ac (--enable-mingw-wildcard): Add new configurable feature.
	* configure: Regenerate.
	* config.in: Regenerate.
	* config/i386/driver-mingw32.c: new file.
	* config/i386/x-mingw32: Add rule to build driver-mingw32.o.
	* config.host: Link driver-mingw32.o on MinGW host.
	* doc/install.texi: Document new --enable-mingw-wildcard configure
	option.

From-SVN: r247588

From-SVN: r247587

	PR tree-optimization/80612
	* calls.c (get_size_range): Check for INTEGRAL_TYPE_P.

	* gcc.dg/torture/pr80612.c: New test.

From-SVN: r247586

This patch adds support for purecode to ARMv8-M Baseline, in addition to
the existing support for ARMv7-M and ARMv8-M Mainline.

2017-05-04  Prakhar Bahuguna  <prakhar.bahuguna@arm.com>
            Andre Simoes Dias Vieira  <andre.simoesdiasvieira@arm.com>

    gcc/
    * config/arm/arm.md (movsi): Change TARGET_32BIT to TARGET_HAVE_MOVT.
    (movt splitter): Likewise.
    * config/arm/arm.c (arm_option_check_internal): Change arm_arch_thumb2
    to TARGET_HAVE_MOVT, and merge with -mslow-flash-data check.
    (const_ok_for_arm): Change else to else if (TARGET_THUMB2) and add else
    block for Thumb-1 with MOVT.
    (thumb2_legitimate_address_p): Move code block ...
    (can_avoid_literal_pool_for_label_p): ... into this new function.
    (thumb1_legitimate_address_p): Add check for TARGET_HAVE_MOVT and
    literal pool.
    (thumb_legitimate_constant_p): Add conditional on TARGET_HAVE_MOVT
    * doc/invoke.texi (-mpure-code): Change "ARMv7-M targets" for
    "M-profile targets with the MOVT instruction".

    gcc/testsuite/
    * gcc.target/arm/pure-code/pure-code.exp: Add conditional for
    check_effective_target_arm_thumb1_movt_ok.

Co-Authored-By: Andre Vieira <andre.simoesdiasvieira@arm.com>

From-SVN: r247585

The GCC documentation in section 6.60.8 ARM Floating Point Status and
Control Intrinsics states that the FPSCR register can be read and
written to using the intrinsics __builtin_arm_get_fpscr and
__builtin_arm_set_fpscr. However, these are misnamed within GCC itself
and these intrinsic names are not recognised.

This patch corrects the intrinsic names to match the documentation, and
adds tests to verify these intrinsics generate the correct
instructions.

2017-05-04  Prakhar Bahuguna  <prakhar.bahuguna@arm.com>

    gcc/
    * gcc/config/arm/arm-builtins.c (arm_init_builtins): Rename
    __builtin_arm_ldfscr to __builtin_arm_get_fpscr, and rename
    __builtin_arm_stfscr to __builtin_arm_set_fpscr.

    gcc/testsuite/
    * gcc.target/arm/fpscr.c: New file.

From-SVN: r247584

2017-05-04  Martin Liska  <mliska@suse.cz>

	* tree-vrp.c (simplify_cond_using_ranges_2): Remove unused
	variable cond_code.

From-SVN: r247583

2017-05-04  Thomas Preud'homme  <thomas.preudhomme@arm.com>

gcc/testsuite/
    * gcc.c-torture/execute/pr78622.c: Require c99_runtime effective
    target.

From-SVN: r247582

2017-05-04  Richard Biener  <rguenther@suse.de>

	* tree.c (array_at_struct_end_p): Handle arrays at struct
	end with flexarrays more conservatively.  Refactor and treat
	arrays of arrays or aggregates more strict.  Fix
	VIEW_CONVERT_EXPR handling.  Remove allow_compref argument.
	* tree.c (array_at_struct_end_p): Adjust prototype.
	* emit-rtl.c (set_mem_attributes_minus_bitpos): Adjust.
	* gimple-fold.c (get_range_strlen): Likewise.
	* tree-chkp.c (chkp_may_narrow_to_field): Likewise.

From-SVN: r247581

2017-05-04  Tom de Vries  <tom@codesourcery.com>

	PR testsuite/80557
	* g++.dg/warn/Wstrict-aliasing-float-ref-int-obj.C: Replace absolute
	line numbers.
	* g++.dg/warn/miss-format-1.C: Same.
	* g++.dg/warn/overflow-warn-1.C: Same.
	* g++.dg/warn/overflow-warn-3.C: Same.
	* g++.dg/warn/overflow-warn-4.C: Same.

From-SVN: r247580

2017-05-04  Tom de Vries  <tom@codesourcery.com>

	PR testsuite/80557
	* gcc.target/i386/pr57655.c: Replace absolute line numbers.
	* gcc.target/i386/pr68657.c: Same.
	* gcc.target/i386/pr69255-1.c: Same.
	* gcc.target/i386/pr69255-2.c: Same.
	* gcc.target/i386/pr69255-3.c: Same.

From-SVN: r247579

2017-05-04  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/31130
	* tree-vrp.c (needs_overflow_infinity): Remove as always returning
	false.
	(supports_overflow_infinity): Likewise.
	(is_negative_overflow_infinity): Likewise.
	(is_positive_overflow_infinity): Likewise.
	(is_overflow_infinity): Likewise.
	(stmt_overflow_infinity): Likewise.
	(overflow_infinity_range_p): Likewise.
	(usable_range_p): Remove as always returning true.
	(make_overflow_infinity): Remove.
	(negative_overflow_infinity): Likewise.
	(positive_overflow_infinity): Likewise.
	(avoid_overflow_infinity): Likewise.
	(set_value_range): Adjust accordingly.
	(set_value_range_to_nonnegative): Likewise, remove now unused
	overflow_infinity arg.
	(vrp_operand_equal_p): Adjust.
	(update_value_range): Likewise.
	(range_int_cst_singleton_p): Likewise.
	(operand_less_p): Likewise.
	(compare_values_warnv): Likewise.
	(extract_range_for_var_from_comparison_expr): Likewise.
	(vrp_int_const_binop): Likewise.
	(zero_nonzero_bits_from_vr): Likewise.
	(extract_range_from_multiplicative_op_1): Likewise.
	(extract_range_from_binary_expr_1): Likewise.
	(extract_range_from_unary_expr): Likewise.
	(extract_range_from_comparison): Likewise.
	(extract_range_basic): Likewise.
	(adjust_range_with_scev): Likewise.
	(compare_ranges): Likewise.
	(compare_range_with_value): Likewise.
	(dump_value_range): Likewise.
	(test_for_singularity): Likewise, remove strict_overflow_p parameter
	never used.
	(simplify_cond_using_ranges): Adjust.

	* gcc.dg/Wstrict-overflow-12.c: XFAIL.
	* gcc.dg/Wstrict-overflow-13.c: Likewise.
	* gcc.dg/Wstrict-overflow-21.c: Likewise.
	* gcc.dg/pr52904.c: Remove XFAIL.
	* gcc.dg/tree-ssa/vrp114.c: New testcase.

From-SVN: r247578

From-SVN: r247577

* brig-builtins.def: Added a builtin for class_f64.
* builtin-types.def: Added a builtin type needed by class_f64.
* brigfrontend/brig-code-entry-handler.cc
 (brig_code_entry_handler::build_address_operand): Fix a bug
 with reg+offset addressing on 32b segments. In large mode,
 the offset is treated as 32bits unless it's global, readonly or
 kernarg address space.
* rt/workitems.c: Removed a leftover comment.
* rt/arithmetic.c (__hsail_class_f32, __hsail_class_f64): Fix the
 check for signaling/non-signalling NaN. Add class_f64 default
 implementation.

From-SVN: r247576

From-SVN: r247575

From-SVN: r247570

	* doc/invoke.texi: Note that -faligned-new is on by default
	for C++17.

From-SVN: r247564