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lvzhengyang
riscv-gcc-1
Commits
e1fd9163
Commit
e1fd9163
authored
May 04, 2017
by
Richard Sandiford
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Remove bogus top-level ChangeLog commit (sorry!)
From-SVN: r247587
parent
c89ffd99
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4 changed files
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9 additions
and
12 deletions
+9
-12
ChangeLog
+0
-4
gcc/config/mips/mips.c
+4
-7
gcc/config/mips/mips.md
+5
-0
gcc/testsuite/gcc.target/powerpc/ppc-pow.c
+0
-1
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ChangeLog
View file @
e1fd9163
2017-05-03 Richard Sandiford <richard.sandiford@arm.com>
Wrap tree-data-ref.h macro arguments
2017-04-19 Thomas Koenig <tkoenig@gcc.gnu.org>
Tobias Burnus <tobias.burnus@physik.fu-berlin.de>
...
...
gcc/config/mips/mips.c
View file @
e1fd9163
...
...
@@ -2590,7 +2590,7 @@ mips_stack_address_p (rtx x, machine_mode mode)
return
(
mips_classify_address
(
&
addr
,
x
,
mode
,
false
)
&&
addr
.
type
==
ADDRESS_REG
&&
addr
.
reg
==
stack_pointer_rtx
);
&&
rtx_equal_p
(
addr
.
reg
,
stack_pointer_rtx
)
);
}
/* Return true if ADDR matches the pattern for the LWXS load scaled indexed
...
...
@@ -6098,7 +6098,9 @@ mips_function_arg_boundary (machine_mode mode, const_tree type)
{
unsigned
int
alignment
;
alignment
=
type
?
TYPE_ALIGN
(
type
)
:
GET_MODE_ALIGNMENT
(
mode
);
alignment
=
type
&&
mode
==
BLKmode
?
TYPE_ALIGN
(
TYPE_MAIN_VARIANT
(
type
))
:
GET_MODE_ALIGNMENT
(
mode
);
if
(
alignment
<
PARM_BOUNDARY
)
alignment
=
PARM_BOUNDARY
;
if
(
alignment
>
STACK_BOUNDARY
)
...
...
@@ -8470,11 +8472,6 @@ and_operands_ok (machine_mode mode, rtx op1, rtx op2)
if
(
memory_operand
(
op1
,
mode
))
{
if
(
TARGET_MIPS16
)
{
struct
mips_address_info
addr
;
if
(
!
mips_classify_address
(
&
addr
,
op1
,
mode
,
false
))
return
false
;
}
return
and_load_operand
(
op2
,
mode
);
}
else
...
...
gcc/config/mips/mips.md
View file @
e1fd9163
...
...
@@ -3306,7 +3306,12 @@
switch (which_alternative)
{
case 0:
fprintf (stderr, "-----\n");
fprintf (stderr, "%d %d %d\n", satisfies_constraint_W (operands[1]), memory_operand (operands[1], SImode), stack_operand (operands[1], SImode));
debug_rtx (operands[1]);
/*
operands[1] = gen_lowpart (QImode, operands[1]);
*/
return "lbu\t%0,%1";
case 1:
operands[1] = gen_lowpart (HImode, operands[1]);
...
...
gcc/testsuite/gcc.target/powerpc/ppc-pow.c
View file @
e1fd9163
...
...
@@ -3,7 +3,6 @@
/* Check for VSX here, even though we don't use VSX to eliminate SPE, PAIRED
and other ppc floating point varients. However, we need to also eliminate
Darwin, since it doesn't like -mcpu=power6. */
/* { dg-require-effective-target powerpc_vsx_ok } */
/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power6" } } */
/* { dg-options "-O2 -ffast-math -mcpu=power6 -mno-vsx -mno-altivec" } */
/* { dg-final { scan-assembler-times "fsqrt" 3 } } */
...
...
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