PR target/91050
	* config/rs6000/rs6000.opt (mdejagnu-cpu=): Delete option.
	* config/rs6000/rs6000.c (rs6000_option_override_internal): Remove
	use of deleted rs6000_dejagnu_cpu_index variable.
	* config/rs6000/rs6000.h (DRIVER_SELF_SPECS): Define.
	(SUBTARGET_DRIVER_SELF_SPECS): Likewise.
	* config/darwin.h (DRIVER_SELF_SPECS): Rename from this ...
	(SUBTARGET_DRIVER_SELF_SPECS): ...to this.
	* config/i386/i386.h (DRIVER_SELF_SPECS): Define.
	(SUBTARGET_DRIVER_SELF_SPECS): Likewise.

From-SVN: r273941

The values of the constants are taken from Glibc where the equivalent
constant exists, or by rounding the actual constant to the same number
of digits as the Glibc constants have.

	P0631R4 Math Constants
	* include/Makefile.am: Add new header.
	* include/Makefile.in: Regenerate.
	* include/precompiled/stdc++.h: Include new header.
	* include/std/numbers: New header.
	* include/std/version (__cpp_lib_math_constants): Define.
	* testsuite/26_numerics/numbers/1.cc: New test.
	* testsuite/26_numerics/numbers/2.cc: New test.
	* testsuite/26_numerics/numbers/3.cc: New test.
	* testsuite/26_numerics/numbers/nonfloat_neg.cc: New test.

From-SVN: r273940

	* include/std/bit: Add Doxygen comments.

From-SVN: r273938

	PR libstdc++/91308
	* include/bits/unique_ptr.h (unique_ptr::__safe_conversion_up): Remove
	constraints on deleter that should only apply to the constructor.
	(unique_ptr<T[], D>::__safe_conversion_up): Likewise.
	(unique_ptr<T[], D>::unique_ptr(unique_ptr<U, D>&&)): Restore
	constraints on deleter here.
	* testsuite/20_util/unique_ptr/assign/91308.cc: New test.

From-SVN: r273937

re PR tree-optimization/91280 (ICE in get_constraint_for_component_ref, at tree-ssa-structalias.c:3259 since r260354)

2019-07-31  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/91280
	* tree-ssa-structalias.c (get_constraint_for_component_ref):
	Decompose MEM_REF manually for offset handling.

	* g++.dg/torture/pr91280.C: New testcase.

From-SVN: r273936

	PR c/91192
	* c-parser.c (c_parser_sizeof_expression): Call set_c_expr_source_range
	even if finish is UNKNOWN_LOCATION, just use start as finish in that
	case.

From-SVN: r273935

2019-07-31  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/91293
	* tree-vect-slp.c (vect_build_slp_tree_2): Do not swap operands
	of reduction stmts.

	* gcc.dg/vect/pr91293-1.c: New testcase.
	* gcc.dg/vect/pr91293-2.c: Likewise.
	* gcc.dg/vect/pr91293-3.c: Likewise.

From-SVN: r273934

gcc/ChangeLog:
	* config.gcc (hppa*-*-netbsd*): New target.
	* config/pa/pa-netbsd.h: New file.
	* config/pa/pa32-netbsd.h: New file.

libgcc/ChangeLog:
	* config.host (hppa*-*-netbsd*): New case.
	* config/pa/t-netbsd: New file.


Co-Authored-By: Matthew Green <mrg@eterna.com.au>
Co-Authored-By: Maya Rashish <coypu@sdf.org>
Co-Authored-By: Nick Hudson <nick@nthcliff.demon.co.uk>

From-SVN: r273933

	PR tree-optimization/91201
	* config/i386/mmx.md (reduc_plus_scal_v8qi): New expander.

	* gcc.target/i386/sse2-pr91201-2.c: New test.

From-SVN: r273932

2019-07-31  Andrew Stubbs  <ams@codesourcery.com>

	gcc/
	* config/gcn/gcn-valu.md
	(scatter<mode>_insn_1offset<exec_scatter>): Remove s_waitcnt.
	(scatter<mode>_insn_1offset_ds<exec_scatter>): Likewise.
	(scatter<mode>_insn_2offsets<exec_scatter>): Likewise.
	* config/gcn/gcn.c (gcn_md_reorg): Add delayeduse and reads to
	struct ilist. Add nops for delayeduse insns.
	* config/gcn/gcn.md (delayeduse): New attribute.
	(*movbi): Remove s_waitcnt from stores.
	(*mov<mode>_insn): Likewise.
	(*movti_insn): Likewise. Add delayeduse attribute.
	(sync_compare_and_swap<mode>_insn): Add delayeduse attribute.
	(atomic_store<mode>): Remove or adjust s_waitcnt.

From-SVN: r273931

2019-07-31  Richard Biener  <rguenther@suse.de>

	* vr-values.h (vr_values::swap_vr_value): New.
	(vr_values::free_value_range): likewise.
	* vr-values.c (vr_values::swap_vr_value): Implement.
	* gimple-ssa-evrp-analyze.h (evrp_range_analyzer::pop_value_range):
	Do not return a range or take a var.
	(evrp_range_analyzer::stack): Change back to recording a non-const
	value_range *.
	* gimple-ssa-evrp-analyze.c
	(evrp_range_analyzer::record_ranges_from_stmt): Free unused
	value-range.
	(evrp_range_analyzer::pop_to_marker): Adjust.
	(evrp_range_analyzer::push_value_range): Use new swap_vr_value.
	(evrp_range_analyzer::pop_value_range): Likewise.  Free the
	no longer needed value-range.

From-SVN: r273930

2019-07-31  Martin Liska  <mliska@suse.cz>

	* tree-ssa-dce.c (propagate_necessity): Delete operator can
	have size and (or) alignment as 2nd and later arguments.
	Mark all of them as necessary.

From-SVN: r273929

2019-07-31  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/91178
	* tree-ssa-sccvn.c (vn_reference_maybe_forwprop_address):
	Use tail-recursion.

	* gcc.dg/torture/pr91178-2.c: New testcase.

From-SVN: r273928

	PR tree-optimization/91201
	* config/i386/sse.md (reduc_plus_scal_v16qi): New expander.
	(REDUC_PLUS_MODE): Add V32QImode for TARGET_AVX and V64QImode for
	TARGET_AVX512F.
	(reduc_plus_scal_<mode>): Improve formatting by introducing
	a temporary.

	* gcc.target/i386/sse2-pr91201.c: New test.
	* gcc.target/i386/avx2-pr91201.c: New test.
	* gcc.target/i386/avx512bw-pr91201.c: New test.

From-SVN: r273927

This patch enables the new Transactional Memory Extension announced recently
as part of Arm's new architecture technologies.
We introduce a new optional extension "tme" to enable this. The following
instructions are part of the extension:
   * tstart <Xt>
   * ttest <Xt>
   * tcommit
   * tcancel #<imm>
We have also added ACLE intrinsics for the instructions.

*** gcc/ChangeLog ***

2019-07-31  Sudakshina Das  <sudi.das@arm.com>

	* config/aarch64/aarch64-builtins.c (enum aarch64_builtins): Add
	AARCH64_TME_BUILTIN_TSTART, AARCH64_TME_BUILTIN_TCOMMIT,
	AARCH64_TME_BUILTIN_TTEST and AARCH64_TME_BUILTIN_TCANCEL.
	(aarch64_init_tme_builtins): New.
	(aarch64_init_builtins): Call aarch64_init_tme_builtins.
	(aarch64_expand_builtin_tme): New.
	(aarch64_expand_builtin): Handle TME builtins.
	* config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins): Define
	__ARM_FEATURE_TME when enabled.
	* config/aarch64/aarch64-option-extensions.def: Add "tme".
	* config/aarch64/aarch64.h (AARCH64_FL_TME, AARCH64_ISA_TME): New.
	(TARGET_TME): New.
	* config/aarch64/aarch64.md (define_c_enum "unspec"): Add UNSPEC_TTEST.
	(define_c_enum "unspecv"): Add UNSPECV_TSTART, UNSPECV_TCOMMIT and
	UNSPECV_TCANCEL.
	(tstart, ttest, tcommit, tcancel): New instructions.
	* config/aarch64/arm_acle.h (__tstart, __tcommit): New.
	(__tcancel, __ttest): New.
	(_TMFAILURE_REASON, _TMFAILURE_RTRY, _TMFAILURE_CNCL): New macro.
	(_TMFAILURE_MEM, _TMFAILURE_IMP, _TMFAILURE_ERR): Likewise.
	(_TMFAILURE_SIZE, _TMFAILURE_NEST, _TMFAILURE_DBG): Likewise.
	(_TMFAILURE_INT, _TMFAILURE_TRIVIAL): Likewise.
	* config/arm/types.md: Add new tme type attr.
	* doc/invoke.texi: Document "tme".

*** gcc/testsuite/ChangeLog ***

2019-07-31  Sudakshina Das  <sudi.das@arm.com>

	* gcc.target/aarch64/acle/tme.c: New test.
	* gcc.target/aarch64/pragma_cpp_predefs_2.c: New test.

From-SVN: r273926

At present it is possible to call the CMSE functions for checking
addresses (such as cmse_check_address_range) and  forget to check/use
the return value. This patch makes the interfaces more robust against
programmer error by marking these functions with the warn_unused_result
attribute. With this set, any use of these functions that does not use
the result will produce a warning.

This produces a warning on default warn levels when the result of the
cmse functions is not used.

For the following function:
void foo()
{
     int *data;
     cmse_check_address_range((int*)data, 0, 0);
}
The following warning is emitted:
warning: ignoring return value of 'cmse_check_address_range' declared
with attribute 'warn_unused_result' [-Wunused-result]
     6 |  cmse_check_address_range((int*)data, 0, 0);
        |  ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~

gcc/ChangeLog:

2019-07-31  Joel Hutton  <Joel.Hutton@arm.com>

         * config/arm/arm_cmse.h (cmse_nonsecure_caller): Add
warn_unused_result attribute.
         (cmse_check_address_range): Add warn_unused_result attribute.

libgcc/ChangeLog:

2019-07-31  Joel Hutton  <Joel.Hutton@arm.com>

         * config/arm/cmse.c (cmse_check_address_range): Add
warn_unused_result attribute.

2019-07-31  Joel Hutton  <Joel.Hutton@arm.com>

         * gcc.target/arm/cmse/cmse-17.c: New test.

From-SVN: r273924

2019-07-31  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/91257
	* tree-vrp.c (union_ranges): Unify equality and less tests
	by using compare_values.  Re-order cheap tests first.

From-SVN: r273923

re PR middle-end/91301 (ICE in omp_add_variable on random access iterator distribute parallel for private (iterator))

	PR middle-end/91301
	* gimplify.c (gimplify_omp_for): If for class iterator on
	distribute parallel for there is no data sharing clause
	on inner_for_stmt, look for private clause on combined
	parallel too and if found, move it to inner_for_stmt.

	* testsuite/libgomp.c++/for-27.C: New test.

From-SVN: r273922

lra_insn_reg and lra_operand_data have both a bitmask of earlyclobber
alternatives and an overall boolean.  The danger is that we then test
the overall boolean when really we should be testing for a particular
alternative.  This patch gets rid of the boolean and tests the mask
against zero when we really do need to test "any alternative might
be earlyclobber".  (I think the only instance of that is the
LRA_UNKNOWN_ALT handling in lra-lives.c:reg_early_clobber_p.)

This is needed (and tested) by an upcoming SVE patch.

2019-07-31  Richard Sandiford  <richard.sandiford@arm.com>

gcc/
	* lra-int.h (lra_operand_data): Remove early_clobber field.
	(lra_insn_reg): Likewise.
	* lra.c (debug_operand_data): Update accordingly.
	(setup_operand_alternative): Likewise.
	(new_insn_reg): Likewise.  Remove early_clobber parameter.
	(collect_non_operand_hard_regs): Update call accordingly.
	Don't assign to lra_insn_reg::early_clobber.
	(add_regs_to_insn_regno_info): Remove early_clobber parameter
	and update calls to new_insn_reg.
	(lra_update_insn_regno_info): Update calls accordingly.
	* lra-constraints.c (update_and_check_small_class_inputs): Take the
	alternative number as a parameter and test whether the operand
	is earlyclobbered in that particular alternative.
	(process_alt_operands): Update call accordingly.  Use per-alternative
	checks for earyclobber here too.
	* lra-lives.c (reg_early_clobber_p): Check early_clobber_alts
	against zero for IRA_UNKNOWN_ALT.

From-SVN: r273921

From-SVN: r273920

gcc/testsuite/ChangeLog:
	* g++.dg/ubsan/vla-1.C: Suppress a valid warning.

From-SVN: r273915

re PR fortran/91296 (ICE when passing complex number %re/%im as a procedure argument with -Waliasing.)

2019-07-30  Steven G. Kargl  <kargl@gcc.gnu.org>

	PR fortran/91296
	* interface.c (compare_actual_expr): When checking for aliasing, add
	a case to handle REF_INQUIRY (e.g., foo(x%re, x%im) do not alias).

2019-07-30  Steven G. Kargl  <kargl@gcc.gnu.org>

	PR fortran/91296
	* gfortran.dg/pr91296.f90: New test.

From-SVN: r273914

	* config/alpha/alpha.c (alpha_option_override): Quote a C type.

From-SVN: r273912

My previous change to the Thumb-2 movsi patterns caused a codesize regression
with -Os in large functions.  Fix this by using the literal pool offset of the
16-bit literal load so that the literal pool is dumped earlier, reducing the
number of 32-bit literal loads.

Bootstrap & regress OK on arm-none-linux-gnueabihf --with-cpu=cortex-a57

    gcc/
	* config/arm/thumb2.md (thumb2_movsi_insn): Adjust literal offset.
	* config/arm/vfp.md (thumb2_movsi_vfp): Likewise.

From-SVN: r273911

2019-07-30  Martin Liska  <mliska@suse.cz>

	PR ipa/89330
	* cgraph.c (cgraph_edge::make_direct): Use
	edge->indirect_unknown_callee as edge->resolve_speculation can
	deallocate edge which is this pointer.

From-SVN: r273910

2019-07-30  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/91257
	* bitmap.c (bitmap_ior_and_compl_into): Open-code.

From-SVN: r273909

2019-07-30  Martin Liska  <mliska@suse.cz>

	* doc/invoke.texi: Document new behavior.
	* lto-wrapper.c (cpuset_popcount): New function
	is a copy of libgomp/config/linux/proc.c.
	(init_num_threads): Likewise.
	(run_gcc): Automatically detect core count for -flto.
	(jobserver_active_p): New function.

From-SVN: r273908

2019-07-30  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/91257
	* bitmap.h (bitmap_ior_into_and_free): Declare.
	* bitmap.c (bitmap_list_unlink_element): Add defaulted param
	whether to add the unliked element to the freelist.
	(bitmap_list_insert_element_after): Add defaulted param for
	an already allocated element.
	(bitmap_ior_into_and_free): New function.
	* tree-ssa-structalias.c (condense_visit): Reduce the
	ponts-to and edge bitmaps of the SCC members in a
	logarithmic fashion rather than all to one.

From-SVN: r273907

2019-07-30  Martin Liska  <mliska@suse.cz>

	PR tree-optimization/91270
	* tree-ssa-dce.c (propagate_necessity): Mark 2nd argument
	of delete operator as needed.
2019-07-30  Martin Liska  <mliska@suse.cz>

	PR tree-optimization/91270
	* g++.dg/torture/pr91270.C: New test.

From-SVN: r273906

This patch extends the FMA handling in tree-ssa-math-opts.c so
that it can cope with conditional multiplications as well as
unconditional multiplications.  The addition or subtraction must then
have the same condition as the multiplication (at least for now).

E.g. we can currently fold:

  (IFN_COND_ADD cond (mul x y) z fallback)
    -> (IFN_COND_FMA cond x y z fallback)

This patch also allows:

  (IFN_COND_ADD cond (IFN_COND_MUL cond x y <whatever>) z fallback)
    -> (IFN_COND_FMA cond x y z fallback)

2019-07-30  Richard Sandiford  <richard.sandiford@arm.com>

gcc/
	* tree-ssa-math-opts.c (convert_mult_to_fma): Add a mul_cond
	parameter.  When nonnull, make sure that the addition or subtraction
	has the same condition.
	(math_opts_dom_walker::after_dom_children): Try convert_mult_to_fma
	for CFN_COND_MUL too.

gcc/testsuite/
	* gcc.dg/vect/vect-cond-arith-7.c: New test.

From-SVN: r273905

2019-07-30  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/91291
	* tree-ssa-sccvn.c (rpo_elim::eliminate_push_avail): Ignore
	constant values.

From-SVN: r273903

	PR middle-end/91282
	* gcc.dg/type-convert-var.c: Add -fexcess-precision=fast to
	dg-additional-options.

From-SVN: r273899

	PR middle-end/91216
	* omp-low.c (global_nonaddressable_vars): New variable.
	(use_pointer_for_field): For global decls, if they are non-addressable,
	remember it in the global_nonaddressable_vars bitmap, if they are
	addressable and in the global_nonaddressable_vars bitmap, ignore their
	TREE_ADDRESSABLE bit.
	(omp_copy_decl_2): Clear TREE_ADDRESSABLE also on private copies of
	vars in global_nonaddressable_vars bitmap.
	(execute_lower_omp): Free global_nonaddressable_vars bitmap.

	* gcc.dg/gomp/pr91216.c: New test.

From-SVN: r273898

	PR target/91150
	* config/i386/i386-expand.c (expand_vec_perm_blend): Change mask type
	from unsigned to unsigned HOST_WIDE_INT.  For E_V64QImode cast
	comparison to unsigned HOST_WIDE_INT before shifting it left.

	* gcc.target/i386/avx512bw-pr91150.c: New test.

From-SVN: r273897

From-SVN: r273896

	* config/i386/i386.md (movstrict<mode>): Use register_operand
	predicate for operand 0.  Add expander condition.  Assert that
	operand 0 is a SUBREG RTX.
	(*movstrict<mode>_1): Use register_operand predicate for operand 0.
	Update operand constraints and insn condition.
	(zero_extend<mode>si2_and): Do not call gen_movstrict<mode>.
	(zero_extendqihi2_and): Do not call gen_movstrictqi.
	(*setcc_qi_slp): Use register_operand predicate for operand 0.
	Update operand 0 constraints.
	(setcc_qi_slp splitters): Use register_operand predicate for operand 0.

From-SVN: r273891

gcc/ChangeLog:

2019-07-29  Jozef Lawrynowicz  <jozef.l@mittosystems.com>

	* config/msp430/msp430.h (DRIVER_SELF_SPECS): Define and emit errors
	when -m{code,data}-region are used without -mlarge.
	* config/msp430/msp430.c (msp430_option_override): Error when a
	non-default code or data region is used without -mlarge.
	(msp430_section_attr): Emit a warning and do not add upper/lower/either
	attributes when they are used without -mlarge.

gcc/testsuite/ChangeLog:

2019-07-29  Jozef Lawrynowicz  <jozef.l@mittosystems.com>

	* gcc.target/msp430/pr78818-data-region.c: Add -mlarge to dg-options.
	* gcc.target/msp430/region-misuse-code.c: New test.
	* gcc.target/msp430/region-misuse-data.c: Likewise.
	* gcc.target/msp430/region-misuse-code-data.c: Likewise.
	* gcc.target/msp430/region-attribute-misuse.c: Likewise.

From-SVN: r273884

2019-07-29  Jozef Lawrynowicz  <jozef.l@mittosystems.com>

	PR target/70320
	* config/msp430/msp430.h: Define ADDITIONAL_REGISTER_NAMES.

2019-07-29  Jozef Lawrynowicz  <jozef.l@mittosystems.com>

	PR target/70320
	* gcc.target/msp430/asm-register-names-lower-case.c: New test.
	* gcc.target/msp430/asm-register-names-upper-case.c: Likewise.

From-SVN: r273883

From-SVN: r273882

inchash::hash::add_wide_int operated directly on the raw encoding
of the wide_int, including any redundant upper bits.  The problem
with that is that the upper bits are only defined for some wide-int
storage types (including wide_int itself).  wi::to_wide(tree) instead
returns a value that is extended according to the signedness of the
type (so that wi::to_widest can use the same encoding) while rtxes
have the awkward special case of BI, which can be zero-extended
rather than sign-extended.

In the PR, we computed a hash for a "normal" sign-extended wide_int
while the existing entries hashed wi::to_wide(tree).  This gives
different results for unsigned types that have the top bit set.

The patch fixes that by hashing the canonical sign-extended form even
if the raw encoding happens to be different.

2019-07-29  Richard Sandiford  <richard.sandiford@arm.com>

gcc/
	* wide-int.h (generic_wide_int::sext_elt): New function.
	* inchash.h (hash::add_wide_int): Use it instead of elt.

From-SVN: r273881