Adjust literal pool offset in Thumb-2 movsi patterns

My previous change to the Thumb-2 movsi patterns caused a codesize regression
with -Os in large functions.  Fix this by using the literal pool offset of the
16-bit literal load so that the literal pool is dumped earlier, reducing the
number of 32-bit literal loads.

Bootstrap & regress OK on arm-none-linux-gnueabihf --with-cpu=cortex-a57

    gcc/
	* config/arm/thumb2.md (thumb2_movsi_insn): Adjust literal offset.
	* config/arm/vfp.md (thumb2_movsi_vfp): Likewise.

From-SVN: r273911

gcc/ChangeLog

+2019-07-30  Wilco Dijkstra  <wdijkstr@arm.com>
+
+	* config/arm/thumb2.md (thumb2_movsi_insn): Adjust literal offset.
+	* config/arm/vfp.md (thumb2_movsi_vfp): Likewise.
+
 2019-07-30  Martin Liska  <mliska@suse.cz>
 
 	PR ipa/89330

gcc/config/arm/thumb2.md

@@ -274,7 +274,7 @@
    (set_attr "length" "2,4,2,4,4,4,4")
    (set_attr "predicable" "yes")
    (set_attr "predicable_short_it" "yes,no,yes,no,no,no,no")
-   (set_attr "pool_range" "*,*,*,*,*,4094,*")
+   (set_attr "pool_range" "*,*,*,*,*,1018,*")
    (set_attr "neg_pool_range" "*,*,*,*,*,0,*")]
 )
 

gcc/config/arm/vfp.md

@@ -297,7 +297,7 @@
    (set_attr "predicable_short_it" "yes,no,yes,no,no,no,no,no,no,no,no,no")
    (set_attr "type" "mov_reg,mov_reg,mov_reg,mvn_reg,mov_imm,load_4,store_4,f_mcr,f_mrc,fmov,f_loads,f_stores")
    (set_attr "length" "2,4,2,4,4,4,4,4,4,4,4,4")
-   (set_attr "pool_range"     "*,*,*,*,*,4094,*,*,*,*,1018,*")
+   (set_attr "pool_range"     "*,*,*,*,*,1018,*,*,*,*,1018,*")
    (set_attr "neg_pool_range" "*,*,*,*,*,   0,*,*,*,*,1008,*")]
 )