/cp
2018-05-09  Paolo Carlini  <paolo.carlini@oracle.com>

	PR c++/85713
	Revert:
	2018-05-08  Paolo Carlini  <paolo.carlini@oracle.com>

	PR c++/84588
	* parser.c (cp_parser_parameter_declaration_list): When the
	entire parameter-declaration-list is erroneous maybe call
	abort_fully_implicit_template.

/testsuite
2018-05-09  Paolo Carlini  <paolo.carlini@oracle.com>

	PR c++/85713
	Revert:
	2018-05-08  Paolo Carlini  <paolo.carlini@oracle.com>

	PR c++/84588
	* g++.dg/cpp1y/pr84588.C: New.

From-SVN: r260087

/cp
2018-05-09  Paolo Carlini  <paolo.carlini@oracle.com>

	PR c++/85713
	Revert:
	2018-05-08  Paolo Carlini  <paolo.carlini@oracle.com>

	PR c++/84588
	* parser.c (cp_parser_parameter_declaration_list): When the
	entire parameter-declaration-list is erroneous maybe call
	abort_fully_implicit_template.

/testsuite
2018-05-09  Paolo Carlini  <paolo.carlini@oracle.com>

	PR c++/85713
	Revert:
	2018-05-08  Paolo Carlini  <paolo.carlini@oracle.com>

	PR c++/84588
	* g++.dg/cpp1y/pr84588.C: New.

From-SVN: r260086

2018-05-09  Tom de Vries  <tom@codesourcery.com>

	PR libgomp/82901
	* oacc-parallel.c (GOACC_declare): Use GOMP_ASYNC_SYNC as async argument
	to GOACC_enter_exit_data.

From-SVN: r260085

config/
	* ax_pthread.m4: Add file

From-SVN: r260083

From-SVN: r260082

2018-05-09  Tom de Vries  <tom@codesourcery.com>

	PR libgomp/83792
	* oacc-int.h (async_valid_stream_id_p, async_valid_p)
	(async_synchronous_p): New function.
	* oacc-async.c (acc_async_test, acc_wait, acc_wait_all_async): Use
	async_valid_p.
	* oacc-cuda.c (acc_get_cuda_stream, acc_set_cuda_stream): Use
	async_valid_stream_id_p.
	* oacc-mem.c (gomp_acc_remove_pointer): Use async_synchronous_p.
	* oacc-parallel.c (GOACC_parallel_keyed): Same.

From-SVN: r260081

To satisfy the CopyConstructible requirement a callable object stored in
a std::function must behave the same when copied from a const or
non-const source. If copying a non-const object doesn't produce an
equivalent copy then the behaviour is undefined. But we can make our
std::function more tolerant of such objects by ensuring we always copy
from a const lvalue.

Additionally use an if constexpr statement in the _M_get_pointer
function to avoid unnecessary instantiations in the discarded branch.

	* include/bits/std_function.h (_Base_manager::_M_get_pointer):
	Use constexpr if in C++17 mode.
	(_Base_manager::_M_clone(_Any_data&, const _Any_data&, true_type)):
	Copy from const object.
	* testsuite/20_util/function/cons/non_copyconstructible.cc: New.

From-SVN: r260080

2018-05-09  Richard Biener  <rguenther@suse.de>

	* tree-vect-slp.c (vect_bb_slp_scalar_cost): Fill a cost
	vector.
	(vect_bb_vectorization_profitable_p): Adjust.  Compute
	actual scalar cost using the cost vector and the add_stmt_cost
	machinery.

From-SVN: r260078

The one for the prologue mflr did not have any value set, which means
use the SET that is in the insn pattern.  This works fine, except when
some late pass decides to replace the SET_SRC -- this changes the
meaning of the REG_CFA_REGISTER!  Such passes should not do these
things, but let's be more explicit here, for extra robustness.  It
could be argued that this defaulting is a design misfeature (it does
not save much space either, etc.)


	PR rtl-optimization/85645
	* config/rs6000/rs6000.c (rs6000_emit_prologue_components): Put a SET
	in the REG_CFA_REGISTER note for LR, don't leave it empty.

From-SVN: r260077

In the testcase for PR85645 we do a pretty dumb placement of the
prologue/epilogue for the LR component: we place an epilogue for LR
before a control flow split where one of the branches clobbers LR
eventually, and the other does not.  The branch that does clobber it
will need a prologue again some time later.  Because saving and
restoring LR is a two step process---it needs to be moved via a GPR---
the backend emits CFI directives so that we get correct unwind
information.  But both regcprop and regrename do not properly handle
such CFI directives leading to ICEs.

Now, neither of the two branches needs to have LR restored at all,
because both of the branches end up in an infinite loop.

This patch makes spread_component return a boolean saying if anything
was changed, and if so, it is called again.  This obviously is finite
(there is a finite number of basic blocks, each with a finite number
of components, and spread_components can only assign more components
to a block, never less).  I also instrumented the code, and on a
bootstrap+regtest spread_components made changes a maximum of two
times.  Interestingly though it made changes on two iterations in
a third of the cases it did anything at all!


	PR rtl-optimization/85645
	* shrink-wrap.c (spread_components): Return a boolean saying if
	anything was changed.
	(try_shrink_wrapping_separate): Iterate spread_components until
	nothing changes anymore.

From-SVN: r260076

We should never change the destination of a REG_CFA_REGISTER, just
like for insns with a REG_CFA_RESTORE, because we need to have the
same control flow information on all branches that join.  It is very
doubtful that renaming the scratch registers used for prologue/epilogue
will help anything either.


	PR rtl-optimization/85645
	* regrename.c (build_def_use): Also kill the chains that include the
	destination of a REG_CFA_REGISTER note.

From-SVN: r260075

Changing a SET that has a REG_CFA_REGISTER note is wrong if we are
changing the SET_DEST, or if the REG_CFA_REGISTER has nil as its
argument, and maybe some other cases.  It's never really useful to
propagate into such an instruction, so let's just bail whenever we
see such a note.


	PR rtl-optimization/85645
	*  regcprop.c (copyprop_hardreg_forward_1): Don't propagate into an
	insn that has a REG_CFA_REGISTER note.

From-SVN: r260074

We build up the input to IFN_STORE_LANES one vector at a time.
In RTL, each of these vector assignments becomes a write to
subregs of the form (subreg:VEC (reg:AGGR R)), where R is the
eventual input to the store lanes instruction.  The problem is
that RTL isn't very good at tracking liveness when things are
initialised piecemeal by subregs, so R tends to end up being
live on all paths from the entry block to the store.  This in
turn leads to unnecessary spilling around calls, as well as to
excess register pressure in vector loops.

This patch adds gimple clobbers to indicate the liveness of the
IFN_STORE_LANES variable and makes sure that gimple clobbers are
expanded to rtl clobbers where useful.  For consistency it also
uses clobbers to mark the point at which an IFN_LOAD_LANES
variable is no longer needed.

2018-05-08  Richard Sandiford  <richard.sandiford@linaro.org>

gcc/
	* cfgexpand.c (expand_clobber): New function.
	(expand_gimple_stmt_1): Use it.
	* tree-vect-stmts.c (vect_clobber_variable): New function,
	split out from...
	(vectorizable_simd_clone_call): ...here.
	(vectorizable_store): Emit a clobber either side of an
	IFN_STORE_LANES sequence.
	(vectorizable_load): Emit a clobber after an IFN_LOAD_LANES sequence.

gcc/testsuite/
	* gcc.target/aarch64/store_lane_spill_1.c: New test.
	* gcc.target/aarch64/sve/store_lane_spill_1.c: Likewise.

From-SVN: r260073

2018-05-09  Tom de Vries  <tom@codesourcery.com>

	PR target/85626
	* config/nvptx/nvptx.md (define_insn "trap", define_insn "trap_if_true")
	(define_insn "trap_if_false"): Add exit after trap.

From-SVN: r260072

	PR rtl-optimization/85638
	* bb-reorder.c: Include common/common-target.h.
	(create_forwarder_block): New function extracted from...
	(fix_up_crossing_landing_pad): ...here.  Rename into...
	(dw2_fix_up_crossing_landing_pad): ...this.
	(sjlj_fix_up_crossing_landing_pad): New function.
	(find_rarely_executed_basic_blocks_and_crossing_edges): In SJLJ mode,
	call sjlj_fix_up_crossing_landing_pad if there are incoming EH edges
	from both partitions and exit the loop after one iteration.

From-SVN: r260070

	* pt.c (for_each_template_parm_r): Handle DECLTYPE_TYPE.  Clear
	*walk_subtrees whether or not we walked into the operand.
	(type_uses_auto): Only look at deduced contexts.

From-SVN: r260066

2018-05-08  Kelvin Nilsen  <kelvin@gcc.gnu.org>

	Revert:
	* doc/extend.texi (PowerPC Built-in Functions): Rename this
	subsection.
	(Basic PowerPC Built-in Functions): The new name of the
	subsection previously known as "PowerPC Built-in Functions".
	(Basic PowerPC Built-in Functions Available on all Configurations):
	New subsubsection.
	(Basic PowerPC Built-in Functions Available on ISA 2.05): New
	subsubsection.
	(Basic PowerPC Built-in Functions Available on ISA 2.06): New
	subsubsection.
	(Basic PowerPC Built-in Functions Available on ISA 2.07): New
	subsubsection.
	(Basic PowerPC Built-in Functions Available on ISA 3.0): New
	subsubsection.

From-SVN: r260065

From-SVN: r260063

From-SVN: r260057

	gcc/
	* config/riscv/linux.h (MUSL_ABI_SUFFIX): Delete unnecessary backslash.
	(LD_EMUL_SUFFIX): New.
	(LINK_SPEC): Use it.

From-SVN: r260056

gcc/testsuite/ChangeLog:

2018-05-08  Carl Love  <cel@us.ibm.com>
	* gcc.target/powerpc/builtins-8-p9-runnable.c: Add new test file.

From-SVN: r260055

2018-05-08  François Dumont  <fdumont@gcc.gnu.org>

	* src/c++11/debug.cc [_GLIBCXX_HAVE_EXECINFO_H]: Include execinfo.h.
	[_GLIBCXX_HAVE_EXECINFO_H](_Error_formatter::_M_error): Render
	backtrace.

From-SVN: r260054

2018-05-08  François Dumont  <fdumont@gcc.gnu.org>

	* include/debug/macros.h (__glibcxx_check_valid_range_at): New.
	* include/debug/functions.h (__check_valid_range): Use latter.
	* include/debug/macros.h (__glibcxx_check_valid_constructor_range): New,
	use latter.
	* include/debug/deque
	(deque::deque<_Iter>(_Iter, _Iter, const _Alloc&)): Use latter.
	* include/debug/forward_list
	(forward_list::forward_list<_Iter>(_Iter, _Iter, const _Alloc&)):
	Likewise.
	* include/debug/list
	(list::list<_Iter>(_Iter, _Iter, const _Alloc&)): Likewise.
	* include/debug/list
	(list::list<_Iter>(_Iter, _Iter, const _Alloc&)): Likewise.
	* include/debug/map.h
	(map::map<_Iter>(_Iter, _Iter, const _Alloc&)): Likewise.
	(map::map<_Iter>(_Iter, _Iter, const _Compare&, const _Alloc&)):
	Likewise.
	* include/debug/multimap.h
	(multimap::multimap<_Iter>(_Iter, _Iter, const _Alloc&)): Likewise.
	(multimap::multimap<_Iter>(_Iter, _Iter, const _Compare&,
	const _Alloc&)): Likewise.
	* include/debug/set.h
	(set::set<_Iter>(_Iter, _Iter, const _Alloc&)): Likewise.
	(set::set<_Iter>(_Iter, _Iter, const _Compare&, const _Alloc&)):
	Likewise.
	* include/debug/multiset.h
	(multiset::multiset<_Iter>(_Iter, _Iter, const _Alloc&)): Likewise.
	(multiset::multiset<_Iter>(_Iter, _Iter, const _Compare&,
	const _Alloc&)): Likewise.
	* include/debug/string
	(basic_string::basic_string<_Iter>(_Iter, _Iter, const _Alloc&)):
	Likewise.
	* include/debug/unordered_map
	(unordered_map::unordered_map<_Iter>(_Iter, _Iter, const _Alloc&)):
	Likewise.
	(unordered_multimap::unordered_multimap<_Iter>(_Iter, _Iter,
	const _Alloc&)): Likewise.
	* include/debug/unordered_set
	(unordered_set::unordered_set<_Iter>(_Iter, _Iter, const _Alloc&)):
	Likewise.
	(unordered_multiset::unordered_multiset<_Iter>(_Iter, _Iter,
	const _Alloc&)): Likewise.
	* include/debug/vector
	(vector::vector<_Iter>(_Iter, _Iter, const _Alloc&)): Use latter.

From-SVN: r260053

2018-05-08  François Dumont  <fdumont@gcc.gnu.org>

	* include/debug/formatter.h (_Error_formatter::_M_function): New.
	(_Error_formatter(const char*, unsigned int)): Adapt.
	(_Error_formatter::_M_at): Rename in...
	(_Error_formatter::_S_at): ...that and adapt.
	* include/debug/macros.h (_GLIBCXX_DEBUG_VERIFY_AT_F): New.
	(_GLIBCXX_DEBUG_VERIFY_AT, _GLIBCXX_DEBUG_VERIFY): Adapt.
	* src/c++11/debug.cc (_Error_formatter::_M_error): Render _M_function
	when available.

From-SVN: r260052

/cp
2018-05-08  Paolo Carlini  <paolo.carlini@oracle.com>

	PR c++/84588
	* parser.c (cp_parser_parameter_declaration_list): When the
	entire parameter-declaration-list is erroneous maybe call
	abort_fully_implicit_template.

/testsuite
2018-05-08  Paolo Carlini  <paolo.carlini@oracle.com>

	PR c++/84588
	* g++.dg/cpp1y/pr84588.C: New.

From-SVN: r260050

	PR c++/85695
	* semantics.c (finish_if_stmt_cond): See through typedefs.

	* g++.dg/cpp1z/constexpr-if22.C: New test.

From-SVN: r260049

gcc/ChangeLog:

2018-05-08  Kelvin Nilsen  <kelvin@gcc.gnu.org>

	* doc/extend.texi (PowerPC Built-in Functions): Rename this
	subsection.
	(Basic PowerPC Built-in Functions): The new name of the
	subsection previously known as "PowerPC Built-in Functions".
	(Basic PowerPC Built-in Functions Available on all Configurations):
	New subsubsection.
	(Basic PowerPC Built-in Functions Available on ISA 2.05): New
	subsubsection.
	(Basic PowerPC Built-in Functions Available on ISA 2.06): New
	subsubsection.
	(Basic PowerPC Built-in Functions Available on ISA 2.07): New
	subsubsection.
	(Basic PowerPC Built-in Functions Available on ISA 3.0): New
	subsubsection.

From-SVN: r260048

	PR target/85693
	* gcc.target/i386/pr85693.c: New test.

From-SVN: r260047

	* include/bits/regex_automaton.h (_NFA_base::_M_paren_stack, _NFA):
	Use normal std::vector even in Debug Mode.

From-SVN: r260046

	PR target/85683
	* config/i386/i386.md: Add peepholes for mem {+,-,&,|,^}= x; mem != 0
	after cmpelim optimization.

	* gcc.target/i386/pr49095.c: Add -masm=att to dg-options.  Add
	scan-assembler-times checking that except for [fh]*xor other functions
	don't use any load instructions.

From-SVN: r260045

Restore the behaviour in GCC 8 and earlier where _GLIBCXX_USE_FLOAT128
is not defined when configure detects support is missing. This avoids
having three states where the macro is either 1, 0, or undefined.

	PR libstdc++/85672
	* include/Makefile.am [!ENABLE_FLOAT128]: Change c++config.h entry
	to #undef _GLIBCXX_USE_FLOAT128 instead of defining it to zero.
	* include/Makefile.in: Regenerate.
	* include/bits/c++config (_GLIBCXX_USE_FLOAT128): Move definition
	within conditional block.

From-SVN: r260043

2018-05-08  Olga Makhotina  <olga.makhotina@intel.com>

gcc/

	* config.gcc: Support "goldmont".
	* config/i386/driver-i386.c (host_detect_local_cpu): Detect "goldmont".
	* config/i386/i386-c.c (ix86_target_macros_internal): Handle
	PROCESSOR_GOLDMONT.
	* config/i386/i386.c (m_GOLDMONT): Define.
	(processor_target_table): Add "goldmont".
	(PTA_GOLDMONT): Define.
	(ix86_lea_outperforms): Add TARGET_GOLDMONT.
	(get_builtin_code_for_version): Handle PROCESSOR_GOLDMONT.
	(fold_builtin_cpu): Add M_INTEL_GOLDMONT.
	(fold_builtin_cpu): Add "goldmont".
	(ix86_add_stmt_cost): Add TARGET_GOLDMONT.
	(ix86_option_override_internal): Add "goldmont".
	* config/i386/i386.h (processor_costs): Define TARGET_GOLDMONT.
	(processor_type): Add PROCESSOR_GOLDMONT.
	* config/i386/i386.md: Add CPU "glm".
	* config/i386/glm.md: New file.
	* config/i386/x86-tune.def: Add m_GOLDMONT.
	* doc/invoke.texi: Add goldmont as x86 -march=/-mtune= CPU type.

libgcc/
	* config/i386/cpuinfo.h (processor_types): Add INTEL_GOLDMONT.
	* config/i386/cpuinfo.c (get_intel_cpu): Detect Goldmont.

gcc/testsuite/

	* gcc.target/i386/builtin_target.c: Test goldmont.
	* gcc.target/i386/funcspec-56.inc: Tests for arch=goldmont and
	arch=silvermont.

From-SVN: r260042

	PR target/85572
	* config/i386/i386.c (ix86_expand_sse2_abs): Handle E_V2DImode and
	E_V4DImode.
	* config/i386/sse.md (abs<mode>2): Use VI_AVX2 iterator instead of
	VI1248_AVX512VL_AVX512BW.  Handle V2DImode and V4DImode if not
	TARGET_AVX512VL using ix86_expand_sse2_abs.  Formatting fixes.

	* g++.dg/other/sse2-pr85572-1.C: New test.
	* g++.dg/other/sse2-pr85572-2.C: New test.
	* g++.dg/other/sse4-pr85572-1.C: New test.
	* g++.dg/other/avx2-pr85572-1.C: New test.

From-SVN: r260041

	PR target/85317
	* config/i386/i386.c (ix86_fold_builtin): Handle
	IX86_BUILTIN_{,P}MOVMSK{PS,PD,B}{,128,256}.

	* gcc.target/i386/pr85317.c: New test.
	* gcc.target/i386/avx2-vpmovmskb-2.c (avx2_test): Add asm volatile
	optimization barrier to avoid optimizing away the expected insn.

From-SVN: r260040

	PR target/85480
	* config/i386/sse.md (ssequaterinsnmode): New mode attribute.
	(*<extract_type>_vinsert<shuffletype><extract_suf>_0): New pattern.

	* gcc.target/i386/avx512dq-pr85480-1.c: New test.
	* gcc.target/i386/avx512dq-pr85480-2.c: New test.

From-SVN: r260039

2018-05-08  Richard Sandiford  <richard.sandiford@linaro.org>

gcc/testsuite/
	* g++.dg/other/sve_const_pred_1.C: Rename to...
	* g++.target/aarch64/sve/const_pred_1.C: ...this.  Remove aarch64
	target selectors and explicit -march options.
	* g++.dg/other/sve_const_pred_2.C: Rename to...
	* g++.target/aarch64/sve/const_pred_2.C: ...this and adjust likewise.
	* g++.dg/other/sve_const_pred_3.C: Rename to...
	* g++.target/aarch64/sve/const_pred_3.C: ...this and adjust likewise.
	* g++.dg/other/sve_const_pred_4.C: Rename to...
	* g++.target/aarch64/sve/const_pred_4.C: ...this and adjust likewise.
	* g++.dg/other/sve_tls_2.C: Rename to...
	* g++.target/aarch64/sve/tls_2.C: ...this and adjust likewise.
	* g++.dg/other/sve_vcond_1.C: Rename to...
	* g++.target/aarch64/sve/vcond_1.C: ...this and adjust likewise.
	* g++.dg/other/sve_vcond_1_run.C: Rename to...
	* g++.target/aarch64/sve/vcond_1_run.C: ...this and adjust likewise.

From-SVN: r260038

2018-05-08  Richard Sandiford  <richard.sandiford@linaro.org>

gcc/testsuite/
	PR testsuite/85586
	* gcc.dg/vect/pr85586.c: Restrict LOOP VECTORIZED test to
	!vect_no_align.

From-SVN: r260036

2018-05-08  Paolo Carlini  <paolo.carlini@oracle.com>

	PR c++/57429
	* g++.dg/cpp0x/deleted14.C: New.

From-SVN: r260035

* configure.host: Add RISC-V support.
* Makefile.am: Likewise.
* Makefile.in: Regenerate.
* src/riscv/ffi.c, src/riscv/ffitarget.h, src/riscv/sysv.S: New
files.

From-SVN: r260033

There are a number of places in parsecpu.awk where I've managed to get
the operator precedence between ! and 'in' incorrect (! binds more
tightly).  In most cases this just makes a consistency test
ineffective, but in a few cases it means we fail to correctly diagnose
errors by the user (for example, when passing an invalid cpu or
architecture name to configure.  This patch fixes all the cases I
could find, based on searching for all uses of the two operators in
the same expression.  The tweak to the API of check_fpu is to bring it
into line with the other check functions - it now returns the result
rather than printing it directly.  The caller now does the printing,
in the same way that the chkarch and chkcpu commands do.

	PR target/85658
	* config/arm/parsecpu.awk (check_cpu): Fix operator precedence.
	(check_arch): Likewise.
	(check_fpu): Return the result rather than printing it.
	(end arch): Fix operator precedence.
	(end cpu): Likewise.
	(END): Print the result from check_fpu.

From-SVN: r260032