Commit cd9ba4ca by Segher Boessenkool Committed by Segher Boessenkool

rs6000: Give an argument to every REG_CFA_REGISTER (PR85645)

The one for the prologue mflr did not have any value set, which means
use the SET that is in the insn pattern.  This works fine, except when
some late pass decides to replace the SET_SRC -- this changes the
meaning of the REG_CFA_REGISTER!  Such passes should not do these
things, but let's be more explicit here, for extra robustness.  It
could be argued that this defaulting is a design misfeature (it does
not save much space either, etc.)


	PR rtl-optimization/85645
	* config/rs6000/rs6000.c (rs6000_emit_prologue_components): Put a SET
	in the REG_CFA_REGISTER note for LR, don't leave it empty.

From-SVN: r260077
parent 826f35d8
2018-05-09 Segher Boessenkool <segher@kernel.crashing.org>
PR rtl-optimization/85645
* config/rs6000/rs6000.c (rs6000_emit_prologue_components): Put a SET
in the REG_CFA_REGISTER note for LR, don't leave it empty.
2018-05-09 Segher Boessenkool <segher@kernel.crashing.org>
PR rtl-optimization/85645
* shrink-wrap.c (spread_components): Return a boolean saying if
anything was changed.
(try_shrink_wrapping_separate): Iterate spread_components until
......
......@@ -26151,10 +26151,11 @@ rs6000_emit_prologue_components (sbitmap components)
/* Prologue for LR. */
if (bitmap_bit_p (components, 0))
{
rtx lr = gen_rtx_REG (reg_mode, LR_REGNO);
rtx reg = gen_rtx_REG (reg_mode, 0);
rtx_insn *insn = emit_move_insn (reg, gen_rtx_REG (reg_mode, LR_REGNO));
rtx_insn *insn = emit_move_insn (reg, lr);
RTX_FRAME_RELATED_P (insn) = 1;
add_reg_note (insn, REG_CFA_REGISTER, NULL);
add_reg_note (insn, REG_CFA_REGISTER, gen_rtx_SET (reg, lr));
int offset = info->lr_save_offset;
if (info->push_p)
......@@ -26162,7 +26163,6 @@ rs6000_emit_prologue_components (sbitmap components)
insn = emit_insn (gen_frame_store (reg, ptr_reg, offset));
RTX_FRAME_RELATED_P (insn) = 1;
rtx lr = gen_rtx_REG (reg_mode, LR_REGNO);
rtx mem = copy_rtx (SET_DEST (single_set (insn)));
add_reg_note (insn, REG_CFA_OFFSET, gen_rtx_SET (mem, lr));
}
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