1. 02 Jan, 2017 6 commits
  2. 01 Jan, 2017 8 commits
  3. 31 Dec, 2016 1 commit
  4. 30 Dec, 2016 10 commits
  5. 29 Dec, 2016 9 commits
  6. 28 Dec, 2016 4 commits
    • * gcc.target/i386/pr78904-5.c: Remove duplicate part. · f438882a
      From-SVN: r243956
      Uros Bizjak committed
    • re PR target/78904 (zero-extracts are not effective) · 5c8617dc
      	PR target/78904
      	* config/i386/constraints.md (Bn): New special memory constraint.
      	* config/i386/predicates.md (norex_memory_operand): New predicate.
      	* config/i386/i386.md (*extzvqi_mem_rex64): New insn pattern and
      	corresponding peephole2 pattern.
      
      testsuite/ChangeLog:
      
      	PR target/78904
      	* gcc.target/i386/pr78904-4.c: New test.
      	* gcc.target/i386/pr78904-5.c: Ditto.
      
      From-SVN: r243955
      Uros Bizjak committed
    • cppdiropts.texi, [...]: New files, split from... · c05169aa
      2016-12-27  Sandra Loosemore  <sandra@codesourcery.com>
      
      	gcc/
      	* doc/cppdiropts.texi, doc/cppwarnopts.texi:  New files, split from...
      	* doc/cppopts.texi: .... here.
      	* doc/cpp.texi (Invocation): Adjust includes.
      	* doc/invoke.texi (Option Summary): Add missing preprocesor-related
      	options.  Adjust sorting and formatting.
      	(Warning Options): Include cppwarnopts.texi.
      	(Preprocessor Options): Add pointers and list the specific 
      	preprocessor options from cppopts.texi first instead of last.
      	(Directory Options): Move/merge documentation of -I, -iquote, and
      	-I- to cppdiropts.texi.  Include that file here.
      
      From-SVN: r243954
      Sandra Loosemore committed
    • Daily bump. · c50fe2da
      From-SVN: r243952
      GCC Administrator committed
  7. 27 Dec, 2016 2 commits
    • predicates.md (const_0_to_12_operand): Rename predicate and change test from… · df3aba14
      predicates.md (const_0_to_12_operand): Rename predicate and change test from 0..11 to 0..12 to match the semantics of...
      
      [gcc]
      2016-12-27  Michael Meissner  <meissner@linux.vnet.ibm.com>
      
      	* config/rs6000/predicates.md (const_0_to_12_operand): Rename
      	predicate and change test from 0..11 to 0..12 to match the
      	semantics of the word extract/insert instructions.  Change all
      	callers.
      	(const_0_to_11_operand): Likewise.
      	* config/rs6000/rs6000.c (altivec_expand_builtin): Likewise.
      	* config/rs6000/vsx.md (vextract4b): Likewise.
      	(vextract4b_internal): Likewise.
      	(vinsert4b): Likewise.
      	(vinsert4b_internal): Likewise.
      	(vinsert4b_di): Likewise.
      	(vinsert4b_di_internal): Likewise.
      	* config/rs6000/rs6000.md (zero_extendsi<mode>2): Fix offset used
      	in xxextractuw to zero extend the word in the vector registers.
      	(lfiwzx): Likewise.
      
      [gcc/testsuite]
      2016-12-27  Michael Meissner  <meissner@linux.vnet.ibm.com>
      
      	* gcc.target/powerpc/p9-vinsert4b-2.c: Update test to test for 13
      	being out of bounds instead of 12.
      
      From-SVN: r243948
      Michael Meissner committed
    • * ChangeLog: Update my last entry. · 41a38208
      From-SVN: r243946
      Uros Bizjak committed