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  1. 13 Jul, 2017 5 commits
  3. 12 Jul, 2017 13 commits
    • re PR target/81193 (PowerPC GCC __builtin_cpu_is and __builtin_cpu_supports… · 3787ee47 
      re PR target/81193 (PowerPC GCC __builtin_cpu_is and __builtin_cpu_supports should warn about old libraries)

[gcc]
2017-07-12  Michael Meissner  <meissner@linux.vnet.ibm.com>

	PR target/81193
	* config/rs6000/rs6000-c.c (rs6000_cpu_cpp_builtins): If GLIBC
	provides the hardware capability bits, define the macro
	__BUILTIN_CPU_SUPPORTS__.
	* config/rs6000/rs6000.c (cpu_expand_builtin): Generate a warning
	if GLIBC does not provide the hardware capability bits.  Add a
	gcc_unreachable call if the built-in cpu function is neither
	__builtin_cpu_is nor __builtin_cpu_supports.
	(rs6000_get_function_versions_dispatcher): Change the warning
	that an old GLIBC is used which does not export the capability
	bits to be an error.
	* doc/extend.texi (target_clones attribute): Document the
	restriction that GLIBC 2.23 or newer is needed on the PowerPC.
	(PowerPC built-in functions): Document that GLIBC 2.23 or newer is
	needed by __builtin_cpu_is and __builtin_cpu_supports.  Document
	the macros defined by GCC if the newer GLIBC is available.

[gcc/testsuite]
2017-07-12  Michael Meissner  <meissner@linux.vnet.ibm.com>

	PR target/81193
	* gcc.target/powerpc/bmi-andn-1.c: Add guard against using
	__builtin_cpu_supports with old GLIBC's.
	* gcc.target/powerpc/bmi-andn-2.c: Likewise.
	* gcc.target/powerpc/bmi-bextr-1.c: Likewise.
	* gcc.target/powerpc/bmi-bextr-2.c: Likewise.
	* gcc.target/powerpc/bmi-bextr-4.c: Likewise.
	* gcc.target/powerpc/bmi-bextr-5.c: Likewise.
	* gcc.target/powerpc/bmi-blsi-1.c: Likewise.
	* gcc.target/powerpc/bmi-blsi-2.c: Likewise.
	* gcc.target/powerpc/bmi-blsmsk-1.c: Likewise.
	* gcc.target/powerpc/bmi-blsmsk-2.c: Likewise.
	* gcc.target/powerpc/bmi-blsr-1.c: Likewise.
	* gcc.target/powerpc/bmi-blsr-2.c: Likewise.
	* gcc.target/powerpc/bmi-tzcnt-1.c: Likewise.
	* gcc.target/powerpc/bmi-tzcnt-2.c: Likewise.
	* gcc.target/powerpc/bmi2-bzhi32-1.c: Likewise.
	* gcc.target/powerpc/bmi2-bzhi64-1.c: Likewise.
	* gcc.target/powerpc/bmi2-mulx32-1.c: Likewise.
	* gcc.target/powerpc/bmi2-mulx32-2.c: Likewise.
	* gcc.target/powerpc/bmi2-mulx64-1.c: Likewise.
	* gcc.target/powerpc/bmi2-mulx64-2.c: Likewise.
	* gcc.target/powerpc/bmi2-pdep32-1.c: Likewise.
	* gcc.target/powerpc/bmi2-pdep64-1.c: Likewise.
	* gcc.target/powerpc/bmi2-pext32-1.c: Likewise.
	* gcc.target/powerpc/bmi2-pext64-1.c: Likewise.
	* gcc.target/powerpc/cpu-builtin-1.c: Likewise.

[libgcc]
2017-07-12  Michael Meissner  <meissner@linux.vnet.ibm.com>

	PR target/81193
	* configure.ac (PowerPC float128 hardware support): Test whether
	we can use __builtin_cpu_supports before enabling the ifunc
	handler.
	* configure: Regenerate.

From-SVN: r250165
      Michael Meissner committed
    • riscv.c: Remove unnecessary includes. · 1b68a156 
      	* config/riscv/riscv.c: Remove unnecessary includes.  Reorder
	remaining includes slightly.
	* config/riscv/riscv-builtins.c: Include profile-count.h.

From-SVN: r250162
      Jeff Law committed
    • libcp1plugin.cc (plugin_build_decl): Use DECL_CXX_{CON,DE}STRUCTOR directly. · 75f8b378 
      	* libcp1plugin.cc (plugin_build_decl): Use
	DECL_CXX_{CON,DE}STRUCTOR directly.

From-SVN: r250159
      Nathan Sidwell committed
    • cp-tree.h (DECL_CONSTRUCTOR_P, [...]): Look at identifier flags. · 3da3dcdb 
      	* cp-tree.h (DECL_CONSTRUCTOR_P, DECL_MAYBE_IN_CHARGE_CONSTRUCTOR,
	DECL_DESTRUCTOR_P, DECL_MAYBE_IN_CHARGE_DESTRCTOR): Look at
	identifier flags.
	* decl.c (grokfndecl): Set DECL_CXX_CONSTRUCTOR and
	DECL_CXX_DESTRUCTOR explicitly.
	* decl2.c (grokclassfn): Likewise.
	* friend.c (do_friend): Likewise.
	* method.c (make_thunk, make_alias_for,
	implicitly_declare_fn): Likewise.

From-SVN: r250158
      Nathan Sidwell committed
    • re PR target/79883 (avr i18n: untranslated "interrupt" or "signal") · 1bde114a 
      	PR target/79883
	* config/avr/avr.c (avr_set_current_function): In diagnostic
	messages: Quote keywords and (parts of) identifiers.
	[WITH_AVRLIBC]: Warn for functions named "ISR", "SIGNAL" or
	"INTERUPT".

From-SVN: r250156
      Georg-Johann Lay committed
    • rs6000-c.c: Add support for built-in functions vector bool char vec_revb (vector bool char)... · 118009c1 
      gcc/ChangeLog:

2017-07-12  Carl Love  <cel@us.ibm.com>

	* config/rs6000/rs6000-c.c: Add support for built-in functions
	vector bool char vec_revb (vector bool char);
	vector bool short vec_revb (vector short char);
	vector bool int vec_revb (vector bool int);
	vector bool long long vec_revb (vector bool long long);
	* doc/extend.texi: Update the built-in documentation file for the
	new built-in functions.

gcc/testsuite/ChangeLog:

2017-07-12  Carl Love  <cel@us.ibm.com>

	* gcc.target/powerpc/p9-xxbr-1.c (rev_bool_char, rev_bool_short,
	rev_bool_int): Add test cases for builtins.
	* gcc.target/powerpc/p9-xxbr-2.c (rev_long_long, rev_ulong_ulong): Add
	test cases for builtins.

From-SVN: r250155
      Carl Love committed
    • builtins-1-p9-runnable.c (dg-ddo run): Add lp64 && p9vector_hw. · 5d7b8153 
      gcc/testsuite/ChangeLog:

2017-07-12  Carl Love  <cel@us.ibm.com>

	* gcc.target/powerpc/builtins-1-p9-runnable.c (dg-ddo run): Add
	lp64 && p9vector_hw.

From-SVN: r250154
      Carl Love committed
    • S/390: Remove loc splitter · 561f6312 
      The backend splitter splitting a 3 operand load on condition into 2 is
wrong.  The S/390 load on condition instruction might trap on the
memory operand even if the condition is false.  So if the first load
on condition overwrites a register used as part of the memory address
of the second the second might trigger a segfault even if it does not
actually perform the load.

Trying to fix this I noticed that the generated code looks anyway
better without the splitter.  So removing the splitter entirely is the
way to go here.

gcc/ChangeLog:

2017-07-12  Andreas Krebbel  <krebbel@linux.vnet.ibm.com>

	* config/s390/s390.md: Remove movcc splitter.

From-SVN: r250153
      Andreas Krebbel committed
    • S/390: Calculate costs for load/store on condition · e5309d95 
      This adds code to the backend rtx_costs function in order to model the
costs of a load/store on condition.

gcc/ChangeLog:

2017-07-12  Andreas Krebbel  <krebbel@linux.vnet.ibm.com>

	* config/s390/s390.c (s390_rtx_costs): Return proper costs for
	load/store on condition.

From-SVN: r250152
      Andreas Krebbel committed
    • re PR target/81407 ([avr] Diagnose if a variable in progmem needs constructing.) · 8b718de8 
      	PR target/81407
	* config/avr/avr.c (avr_encode_section_info)
	[progmem && !TREE_READONLY]: Error if progmem object needs
	constructing.

From-SVN: r250151
      Georg-Johann Lay committed
    • [testsuite] Fix dg-require-stack-check · 6ea93a64 
      2017-07-12  Christophe Lyon  <christophe.lyon@linaro.org>

	* lib/target-supports.exp (check_stack_check_available): Make
	testcase name depend on stack_kind.

From-SVN: r250149
      Christophe Lyon committed
    • aarch64-simd.md (aarch64_sub<mode>_compare0): New pattern. · 2f65ab2e 
      2017-07-11  Michael Collison  <michael.collison@arm.com>

	* config/aarch64/aarch64-simd.md(aarch64_sub<mode>_compare0):
	New pattern.
	* testsuite/gcc.target/aarch64/cmp-2.c: New testcase.

From-SVN: r250148
      Michael Collison committed
    • Daily bump. · ee665f0a 
      From-SVN: r250147
      GCC Administrator committed
  5. 11 Jul, 2017 14 commits
  7. 10 Jul, 2017 8 commits