Update vmov_n_1.c now we are generating better code for dup:

        ldr     s0, [x0]
        dup     v0.2s, v0.s[0]
        ret

    gcc/testsuite/
	* gcc.target/aarch64/vmov_n_1.c: Update dup scan-assembler.

From-SVN: r252077

2017-09-13  Eric Botcazou  <ebotcazou@adacore.com>

	* sem_ch13.adb (Register_Address_Clause_Check): New procedure to save
	the suppression status of Alignment_Check on the current scope.
	(Alignment_Checks_Suppressed): New function to use the saved instead of
	the current suppression status of Alignment_Check.
	(Address_Clause_Check_Record): Add Alignment_Checks_Suppressed field.
	(Analyze_Attribute_Definition_Clause): Instead of manually appending to
	the table, call Register_Address_Clause_Check.
	(Validate_Address_Clauses): Call Alignment_Checks_Suppressed on the
	recorded address clause instead of its entity.

2017-09-13  Jerome Guitton  <guitton@adacore.com>

	* libgnarl/s-tpopsp__vxworks-tls.adb,
	libgnarl/s-tpopsp__vxworks-rtp.adb, libgnarl/s-tpopsp__vxworks.adb
	(Self): Register thread if task id is null.

2017-09-13  Arnaud Charlet  <charlet@adacore.com>

	* libgnat/s-htable.adb, libgnat/s-htable.ads: Minor style tuning.

2017-09-13  Arnaud Charlet  <charlet@adacore.com>

	* lib-xref-spark_specific.adb (Scopes): simplify hash map; now it maps
	from an entity to only scope index, as a mapping from an entity to the
	same entity was useless.
	(Get_Scope_Num): refactor as a simple renaming; rename parameter from N
	to E.
	(Set_Scope_Num): refactor as a simple renaming; rename parameter from N
	to E.
	(Is_Constant_Object_Without_Variable_Input): remove local "Result"
	variable, just use return statements.

From-SVN: r252076

	* libgnarl/s-vxwext__kernel-smp.adb,
	libgnarl/s-tpopsp__vxworks-rtp.adb, libgnarl/s-vxwext__noints.adb:
	New file.

From-SVN: r252075

Coprocessor intrinsic tests in gcc.target/arm/acle test whether
__ARM_FEATURE_COPROC has the right bit defined before calling the
intrinsic. This allows to test both the correct setting of that macro
and the availability and correct working of the intrinsic. However the
__ARM_FEATURE_COPROC macro is no longer defined for ARMv8-A since
r249399.

This patch changes the testcases to skip that test for ARMv8-A and
ARMv8-R targets.  It also fixes some irregularity in the coprocessor
effective targets:
- add ldcl and stcl to the list of instructions listed as guarded by
  arm_coproc1_ok
- enable tests guarded by arm_coproc2_ok, arm_coproc3_ok and
  arm_coproc4_ok for Thumb-2 capable targets but disable for Thumb-1
  targets.

2017-09-13  Thomas Preud'homme  <thomas.preudhomme@arm.com>

    gcc/testsuite/
    * gcc.target/arm/acle/cdp.c: Skip __ARM_FEATURE_COPROC check for
    ARMv8-A and ARMv8-R.
    * gcc.target/arm/acle/cdp2.c: Likewise.
    * gcc.target/arm/acle/ldc.c: Likewise.
    * gcc.target/arm/acle/ldc2.c: Likewise.
    * gcc.target/arm/acle/ldc2l.c: Likewise.
    * gcc.target/arm/acle/ldcl.c: Likewise.
    * gcc.target/arm/acle/mcr.c: Likewise.
    * gcc.target/arm/acle/mcr2.c: Likewise.
    * gcc.target/arm/acle/mcrr.c: Likewise.
    * gcc.target/arm/acle/mcrr2.c: Likewise.
    * gcc.target/arm/acle/mrc.c: Likewise.
    * gcc.target/arm/acle/mrc2.c: Likewise.
    * gcc.target/arm/acle/mrrc.c: Likewise.
    * gcc.target/arm/acle/mrrc2.c: Likewise.
    * gcc.target/arm/acle/stc.c: Likewise.
    * gcc.target/arm/acle/stc2.c: Likewise.
    * gcc.target/arm/acle/stc2l.c: Likewise.
    * gcc.target/arm/acle/stcl.c: Likewise.
    * lib/target-supports.exp:
    (check_effective_target_arm_coproc1_ok_nocache): Mention ldcl
    and stcl in the comment.
    (check_effective_target_arm_coproc2_ok_nocache): Allow Thumb-2 targets
    and disable Thumb-1 targets.
    (check_effective_target_arm_coproc3_ok_nocache): Likewise.
    (check_effective_target_arm_coproc4_ok_nocache): Likewise.

Acked-by: Kyrill Tkachov <kyrylo.tkachov@foss.arm.com>

From-SVN: r252074

	* doc/doxygen/mainpage.html: Fix broken URLs.

From-SVN: r252070

	PR libstdc++/81835
	* doc/xml/manual/extensions.xml: Replace unstable URL.
	* doc/html/manual/ext_demangling.html: Regenerate.
	* libsupc++/cxxabi.h (__cxa_demangle): Fix broken URL.

From-SVN: r252066

2017-09-13  Hristian Kirtchev  <kirtchev@adacore.com>

	* einfo.adb: Flag42 is now Is_Controlled_Active.
	(Is_Controlled): This attribute is now synthesized.
	(Is_Controlled_Active): This attribute is now an explicit flag rather
	than a synthesized attribute.	(Set_Is_Controlled): Removed.
	(Set_Is_Controlled_Active): New routine.
	(Write_Entity_Flags): Update the output for Flag42.
	* einfo.ads: Update the documentation of the following attributes:
	Disable_Controlled, Is_Controlled, Is_Controlled_Active, Is_Controlled
	and Is_Controlled_Active have swapped their functionality.
	(Is_Controlled): Renamed to Is_Controlled_Active.
	(Is_Controlled_Active): Renamed to Is_Controlled.
	(Set_Is_Controlled): Renamed to Set_Is_Controlled_Active.
	* exp_ch3.adb (Expand_Freeze_Record_Type): Restore the original use of
	Is_Controlled.
	* exp_util.adb (Has_Some_Controlled_Component): Code clean up.
	(Needs_Finalization): Code clean up. Remove the tests for
	Disable_Controlled because a) they were incorrect as they would reject
	a type which is sublect to the aspect, but may contain controlled
	components, and b) they are no longer necessary.
	* exp_util.ads (Needs_Finalization): Update comment on documentation.
	* freeze.adb (Freeze_Array_Type): Restore the original use of
	Is_Controlled.
	(Freeze_Record_Type): Restore the original use of Is_Controlled.
	* sem_ch3.adb (Analyze_Object_Declaration): Restore the original use of
	Is_Controlled.
	(Array_Type_Declaration): Restore the original use of Is_Controlled.
	(Build_Derived_Private_Type): Restore the original use of
	Is_Controlled.
	(Build_Derived_Record_Type): Set the Is_Controlled_Active flag of a
	type derived from Ada.Finalization.[Limited_]Controlled.
	(Build_Derived_Type): Restore the original use of Is_Controlled.
	(Record_Type_Definition): Restore the original use of Is_Controlled.
	* sem_ch7.adb (Preserve_Full_Attributes): Restore the original use of
	Is_Controlled.
	* sem_ch13.adb (Analyze_Aspect_Disable_Controlled): New routine.
	(Analyze_Aspect_Specifications): Use routine
	Analyze_Aspect_Disable_Controlled to process aspect Disable_Controlled.

2017-09-13  Vincent Celier  <celier@adacore.com>

	* clean.adb (Gnatclean): Fix error when looking for target
	of <target>-gnatclean

2017-09-13  Javier Miranda  <miranda@adacore.com>
            Ed Schonberg  <schonberg@adacore.com>

	* sem_ch8.adb (Find_Expanded_Name): Complete code that identifies an
	expanded name that designates the current instance of a child unit in
	its own body and appears as the prefix of a reference to an entity
	local to the child unit.

From-SVN: r252065

re PR c++/47226 ([C++0x] GCC doesn't expand template parameter pack that appears in a lambda-expression)

2017-09-13  Paolo Carlini  <paolo.carlini@oracle.com>

	PR c++/47226
	* g++.dg/cpp0x/lambda/lambda-variadic4.C: New.
	* g++.dg/cpp0x/lambda/lambda-variadic5.C: Likewise.

From-SVN: r252064

2017-09-13  Richard Biener  <rguenther@suse.de>

	* dwarf2out.c (output_die_symbol): Remove.
	(output_die): Do not output a DIEs symbol.

From-SVN: r252063

2017-09-13  Richard Biener  <rguenther@suse.de>

	PR middle-end/82128
	* gimple-fold.c (gimple_fold_call): Update SSA name in-place to
	default-def to avoid breaking iterator update with the weird
	interaction with cgraph_update_edges_for_call_stmt_node.

	* g++.dg/pr82128.C: New testcase.

From-SVN: r252062

2017-09-13  Richard Biener  <rguenther@suse.de>

	* tree-cfg.c (verify_gimple_assign_binary): Add verification
	for WIDEN_SUM_EXPR, VEC_WIDEN_MULT_{HI,LO,EVEN,ODD}_EXPR,
	VEC_PACK_{TRUNC,SAT,FIX_TRUNC}_EXPR.
	(verify_gimple_assign_ternary): Add verification for DOT_PROD_EXPR.

From-SVN: r252061

From-SVN: r252060

From-SVN: r252059

From-SVN: r252058

From-SVN: r252057

From-SVN: r252056

	* include/bits/allocated_ptr.h (__allocated_ptr::get): Use
	__to_address.
	(__allocated_ptr::_S_raw_ptr): Remove.
	* include/bits/forward_list.h (_Fwd_list_base::_M_get_node): Use
	__to_address.
	* include/bits/hashtable_policy.h (_Hashtable_alloc): Likewise.
	* include/bits/ptr_traits.h (__to_address): Define new function
	template.
	* include/bits/shared_ptr_base.h (__shared_ptr): Use __to_address.
	(__shared_ptr::_S_raw_ptr): Remove.
	* include/bits/stl_vector.h [__cplusplus >= 201103L]
	(vector::_M_data_ptr): Use __to_address.
	[__cplusplus < 201103L] (vector::_M_data_ptr): Don't dereference
	possibly invalid pointers.
	* include/ext/alloc_traits.h (__alloc_traits::construct)
	(__alloc_traits::destroy): Use __to_address.

From-SVN: r252055

From-SVN: r252054

gcc/testsuite/ChangeLog:

2017-09-13  Kugan Vivekanandarajah  <kuganv@linaro.org>

	* gcc.target/aarch64/pr63304_1.c: Remove-mno-fix-cortex-a53-843419.

gcc/ChangeLog:

2017-09-13  Kugan Vivekanandarajah  <kuganv@linaro.org>

	* config/aarch64/aarch64.c (aarch64_override_options_after_change_1):
	Disable pc relative literal load irrespective of TARGET_FIX_ERR_A53_84341
	for default.

From-SVN: r252053

From-SVN: r252051

	* config/sparc/sparc.c (output_return): Output the source location of
	the insn in the delay slot, if any.
	(output_sibcall): Likewise.

From-SVN: r252041

re PR c++/70621 (ICE on invalid code at -O1 and above on x86_64-linux-gnu in record_reference, at cgraphbuild.c:64)

/cp
2017-09-12  Paolo Carlini  <paolo.carlini@oracle.com>

	PR c++/70621
	* decl.c (start_decl): Early return error_mark_node if duplicate_decls
	returns it; avoid misleading error message.

/testsuite
2017-09-12  Paolo Carlini  <paolo.carlini@oracle.com>

	PR c++/70621
	* g++.dg/torture/pr70621.C: New.

From-SVN: r252040

2017-09-12  Paul Thomas  <pault@gcc.gnu.org>

	PR fortran/82173
	PR fortran/82168
	* decl.c (variable_decl): Check pdt template components for
	appearance of KIND/LEN components in the type parameter name
	list, that components corresponding to type parameters have
	either KIND or LEN attributes and that KIND or LEN components
	are scalar. Copy the initializer to the parameter value.
	(gfc_get_pdt_instance): Add a label 'error_return' and follow
	it with repeated code, while replacing this code with a jump.
	Check if a parameter appears as a component in the template.
	Make sure that the parameter expressions are integer. Validate
	KIND expressions.
	(gfc_match_decl_type_spec): Search for pdt_types in the parent
	namespace since they are instantiated in the template ns.
	* expr.c (gfc_extract_int): Use a KIND parameter if it
	appears as a component expression.
	(gfc_check_init_expr): Allow expressions with the pdt_kind
	attribute.
	*primary.c (gfc_match_actual_arglist): Make sure that the first
	keyword argument is recognised when 'pdt' is set.


2017-09-12  Paul Thomas  <pault@gcc.gnu.org>

	PR fortran/82173
	* gfortran.dg/pdt_4.f03 : Remove the 'is being used before it
	is defined' error.
	* gfortran.dg/pdt_6.f03 : New test.
	* gfortran.dg/pdt_7.f03 : New test.
	* gfortran.dg/pdt_8.f03 : New test.

	PR fortran/82168
	* gfortran.dg/pdt_9.f03 : New test.

From-SVN: r252039

2017-09-12  Steve Ellcey  <sellcey@cavium.com>

	PR other/81096
	* Makefile.am (ttest_CFLAGS): Add $(AM_CFLAGS)
	* Makefile.in: Regenerate.

From-SVN: r252038

  A new vendor CFA DW_CFA_AARCH64_negate_ra_state was introduced for ARMv8.3-A
return address signing, it is multiplexing DW_CFA_GNU_window_save in CFA vendor
extension space.

  This patch adds necessary code to make it available to external, the GDB
patch (https://sourceware.org/ml/gdb-patches/2017-08/msg00215.html) is intended
to use it.

  A new DW_CFA_DUP for it is added in dwarf2.def.  The use of DW_CFA_DUP is to
avoid duplicated case value issue when included in libiberty/dwarfnames.

  Native x86 builds OK to make sure no macro expanding errors.

Committed on behalf of Jiong Wang.

    include/
	* dwarf2.def (DW_CFA_AARCH64_negate_ra_state): New DW_CFA_DUP.
	* dwarf2.h (DW_CFA_DUP): New define.

    libiberty/
	* dwarfnames.c (DW_CFA_DUP): New define.

From-SVN: r252037

When warn_if_not_aligned_p is true, a warning will be issued on function
declaration later.  There is no need to warn function alignment when
warn_if_not_aligned_p is true.

	* c-attribs.c (common_handle_aligned_attribute): Don't warn
	function alignment if warn_if_not_aligned_p is true.

From-SVN: r252036

2017-09-12  Steve Ellcey  <sellcey@cavium.com>

	PR other/81096
	* libbacktrace/Makefile.in
	(HAVE_PTHREAD_TRUE@@NATIVE_TRUE@ttest_CFLAGS): Add $(AM_CFLAGS)

From-SVN: r252035

This patch adds -static-pie to GCC driver to create static PIE.  A static
position independent executable (PIE) is similar to static executable,
but can be loaded at any address without a dynamic linker.  All linker
input files must be compiled with -fpie or -fPIE and linker must support
--no-dynamic-linker to avoid linking with dynamic linker.  "-z text" is
also needed to prevent dynamic relocations in read-only segments.

	PR driver/81498
	* common.opt (-static-pie): New alias.
	(shared): Negate static-pie.
	(-no-pie): Update help text.
	(-pie): Likewise.
	(static-pie): New option.
	* config/gnu-user.h (GNU_USER_TARGET_STARTFILE_SPEC): Add
	-static-pie support.
	(GNU_USER_TARGET_ENDFILE_SPEC): Likewise.
	(LINK_EH_SPEC): Likewise.
	(LINK_GCC_C_SEQUENCE_SPEC): Likewise.
	* config/i386/gnu-user.h (GNU_USER_TARGET_LINK_SPEC): Likewise.
	* config/i386/gnu-user64.h (GNU_USER_TARGET_LINK_SPEC): Likewise.
	* gcc.c (LINK_COMMAND_SPEC): Likewise.
	(init_gcc_specs): Likewise.
	(init_spec): Likewise.
	(display_help): Update help message for -pie.
	* doc/invoke.texi: Update -pie, -no-pie and -static.  Document
	-static-pie.

From-SVN: r252034

Remove the remaining uses of '*' from the movsi/di/ti patterns.
Using '*' in alternatives is typically incorrect at it tells the register
allocator to ignore those alternatives.  So remove these from all the
integer move patterns.  This removes unnecessary int to float moves, for
example gcc.target/aarch64/pr62178.c no longer generates a redundant fmov
since the w = m variant is now allowed.

    gcc/
	* config/aarch64/aarch64.md (movsi_aarch64): Remove all '*'.
	(movdi_aarch64): Likewise.
	(movti_aarch64): Likewise.

From-SVN: r252033

	PR target/80204
	* config/darwin-driver.c (darwin_find_version_from_kernel): Eliminate
	calculation of the minor version, always output as 0.

From-SVN: r252029

	PR target/82112
	* config/rs6000/rs6000-c.c (altivec_resolve_overloaded_builtin): For
	ALTIVEC_BUILTIN_VEC_LD if arg1 has array type call default_conversion
	on it early, rather than manual conversion late.  For
	ALTIVEC_BUILTIN_VEC_ST if arg2 has array type call default_conversion
	instead of performing manual conversion.

	* gcc.target/powerpc/pr82112.c: New test.
	* g++.dg/ext/altivec-18.C: New test.

From-SVN: r252028

altivec.md (vec_widen_umult_even_v4si, [...]): Add define expands for vmuleuw, vmulesw, vmulouw, vmulosw.

gcc/ChangeLog:

2017-09-12  Carl Love  <cel@us.ibm.com>

        * config/rs6000/altivec.md (vec_widen_umult_even_v4si,
	vec_widen_smult_even_v4si): Add define expands for vmuleuw, vmulesw,
	vmulouw, vmulosw.
        * config/rs6000/rs6000-builtin.def (VMLEUW, VMULESW, VMULOUW,
        VMULOSW): Add definitions.
        * config/rs6000/rs6000-c.c (altivec_overloaded_builtins): Add
        ALTIVEC_BUILTIN_VMULESW, ALTIVEC_BUILTIN_VMULEUW,
        ALTIVEC_BUILTIN_VMULOSW, ALTIVEC_BUILTIN_VMULOUW entries.
        * config/rs6000/rs6000.c (rs6000_gimple_fold_builtin,
        builtin_function_type): Add ALTIVEC_BUILTIN_* case statements.

From-SVN: r252027

There seems to be a partial misconception in the AArch64 backend that
load1/load2 referred to the number of registers to load, rather than the
number of words to load. This patch fixes that using the new "number of
byte" types added in the previous patch.

That means using the load_16 and store_16 types that were defined in the
previous patch for the first time in the AArch64 backend. To ensure
continuity for scheduling models, I've just split this out from load_8.
Please update your models if this is very wrong!

---
gcc/

	* config/aarch64/aarch64.md (movdi_aarch64): Set load/store
	types correctly.
	(movti_aarch64): Likewise.
	(movdf_aarch64): Likewise.
	(movtf_aarch64): Likewise.
	(load_pairdi): Likewise.
	(store_pairdi): Likewise.
	(load_pairdf): Likewise.
	(store_pairdf): Likewise.
	(loadwb_pair<GPI:mode>_<P:mode>): Likewise.
	(storewb_pair<GPI:mode>_<P:mode>): Likewise.
	(ldr_got_small_<mode>): Likewise.
	(ldr_got_small_28k_<mode>): Likewise.
	(ldr_got_tiny): Likewise.
	* config/aarch64/iterators.md (ldst_sz): New.
	(ldpstp_sz): Likewise.
	* config/aarch64/thunderx.md (thunderx_storepair): Split store_8
	to store_16.
	(thunderx_load): Split load_8 to load_16.
	* config/aarch64/thunderx2t99.md (thunderx2t99_loadpair): Split
	load_8 to load_16.
	(thunderx2t99_storepair_basic): Split store_8 to store_16.
	* config/arm/xgene1.md (xgene1_load_pair): Split load_8 to load_16.
	(xgene1_store_pair): Split store_8 to store_16.
	* config/aarch64/falkor.md (falkor_ld_3_ld): Split load_8 to load_16.
	(falkor_st_0_st_sd): Split store_8 to store_16.

From-SVN: r252026

In the AArch64 backend and scheduling models there is some confusion as to
what the load1/load2 etc. scheduling types refer to. This leads to us using
load1/load2 in two contexts - for a variety of 32-bit, 64-bit and 128-bit
loads in AArch32 and 128-bit loads in AArch64. That leads to an undesirable
confusion in scheduling.

Fixing it is easy, but mechanical and boring. Essentially,

  s/load1/load_4/
  s/load2/load_8/
  s/load3/load_12/
  s/load4/load_16/
  s/store1/store_4/
  s/store2/store_8/
  s/store3/store_12/
  s/store4/store_16/

Across all sorts of pipeline models, and the two backends.

I have intentionally not modified any of the patterns which now look obviously
incorrect. I'll be doing a second pass over the AArch64 back-end in patch
2/2 which will fix these bugs.

---
gcc/

	* config/arm/types.md (type): Rename load1/2/3/4 to load_4/8/12/16
	and store1/2/3/4 to store_4/8/12/16.
	* config/aarch64/aarch64.md: Update for rename.
	* config/arm/arm.md: Likewise.: Likewise.
	* config/arm/arm.c: Likewise.
	* config/arm/thumb1.md: Likewise.
	* config/arm/thumb2.md: Likewise.
	* config/arm/vfp.md: Likewise.
	* config/arm/arm-generic.md: Likewise.
	* config/arm/arm1020e.md: Likewise.
	* config/arm/arm1026ejs.md: Likewise.
	* config/arm/arm1136jfs.md: Likewise.
	* config/arm/arm926ejs.md: Likewise.
	* config/arm/cortex-a15.md: Likewise.
	* config/arm/cortex-a17.md: Likewise.
	* config/arm/cortex-a5.md: Likewise.
	* config/arm/cortex-a53.md: Likewise.
	* config/arm/cortex-a57.md: Likewise.
	* config/arm/cortex-a7.md: Likewise.
	* config/arm/cortex-a8.md: Likewise.
	* config/arm/cortex-a9.md: Likewise.
	* config/arm/cortex-m4.md: Likewise.
	* config/arm/cortex-m7.md: Likewise.
	* config/arm/cortex-r4.md: Likewise.
	* config/arm/exynos-m1.md: Likewise.
	* config/arm/fa526.md: Likewise.
	* config/arm/fa606te.md: Likewise.
	* config/arm/fa626te.md: Likewise.
	* config/arm/fa726te.md: Likewise.
	* config/arm/fmp626.md: Likewise.
	* config/arm/iwmmxt.md: Likewise.
	* config/arm/ldmstm.md: Likewise.
	* config/arm/marvell-pj4.md: Likewise.
	* config/arm/xgene1.md: Likewise.
	* config/aarch64/thunderx.md: Likewise.
	* config/aarch64/thunderx2t99.md: Likewise.
	* config/aarch64/falkor.md: Likewise.

From-SVN: r252025

2017-09-12  Martin Liska  <mliska@suse.cz>

	PR testsuite/82114
	* gcc.dg/gimplefe-14.c (main): Add handling of case 0.

From-SVN: r252024

	c-family/
	* c-common.c (field_decl_cmp, resort_data, resort_field_decl_cmp,
	resort_sorted_fields): Move to c/c-decl.c.
	* c-common.h (field_decl_cmp, resort_sorted_fields): Delete.
	(struct sorted_fields_type): Move to c/c-lang.h.

	c/
	* c-decl.c (field_decl_cmp, resort_data, resort_field_decl_cmp,
	resort_sorted_fields): Moved from c-family/c-common.c.
	* c-lang.h (struct sorted_fields_type): Moved from c-family/c-common.h.

From-SVN: r252023

2017-09-12  Martin Liska  <mliska@suse.cz>

	* attribs.c (private_lookup_attribute): New function.
	* attribs.h (private_lookup_attribute): Declared here.
	(lookup_attribute): Called from this place.

From-SVN: r252022

2017-09-12  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/82157
	* tree-ssa-pre.c (remove_dead_inserted_code): Do not remove
	stmts with side-effects.

	* gcc.dg/torture/pr82157.c: New testcase.

From-SVN: r252020

	PR libstdc++/79433
	* include/Makefile.am: Remove <bits/c++14_warning.h>.
	* include/Makefile.in: Regenerate.
	* include/bits/c++14_warning.h: Remove.
	* include/experimental/algorithm: Do not include <c++14_warning.h>.
	* include/experimental/any: Likewise.
	* include/experimental/array: Likewise.
	* include/experimental/bits/erase_if.h: Likewise.
	* include/experimental/bits/lfts_config.h: Likewise.
	* include/experimental/bits/shared_ptr.h: Likewise.
	* include/experimental/bits/string_view.tcc: Likewise.
	* include/experimental/chrono: Likewise.
	* include/experimental/deque: Likewise.
	* include/experimental/filesystem: Do not include <c++0x_warning.h>.
	* include/experimental/forward_list: Do not include <c++14_warning.h>.
	* include/experimental/functional: Likewise.
	* include/experimental/iterator: Likewise.
	* include/experimental/list: Likewise.
	* include/experimental/map: Likewise.
	* include/experimental/memory: Likewise.
	* include/experimental/numeric: Likewise.
	* include/experimental/optional: Likewise.
	* include/experimental/propagate_const: Likewise.
	* include/experimental/ratio: Likewise.
	* include/experimental/regex: Likewise.
	* include/experimental/set: Likewise.
	* include/experimental/string: Likewise.
	* include/experimental/string_view: Likewise.
	* include/experimental/system_error: Likewise.
	* include/experimental/tuple: Likewise.
	* include/experimental/type_traits: Likewise.
	* include/experimental/unordered_map: Likewise.
	* include/experimental/unordered_set: Likewise.
	* include/experimental/vector: Likewise.
	* testsuite/experimental/any/misc/any_cast_neg.cc: Adjust dg-error
	line number.
	* testsuite/experimental/array/neg.cc: Likewise.
	* testsuite/experimental/propagate_const/assignment/move_neg.cc:
	Likewise.
	* testsuite/experimental/propagate_const/cons/move_neg.cc: Likewise.
	* testsuite/experimental/propagate_const/requirements2.cc: Likewise.
	* testsuite/experimental/propagate_const/requirements3.cc: Likewise.
	* testsuite/experimental/propagate_const/requirements4.cc: Likewise.
	* testsuite/experimental/propagate_const/requirements5.cc: Likewise.

From-SVN: r252019

	PR libstdc++/79433
	* doc/xml/manual/status_cxx2017.xml: Update feature-test macros.
	* doc/html/*: Regenerate.
	* include/Makefile.am: Remove <bits/c++17_warning.h>.
	* include/Makefile.in: Regenerate.
	* include/bits/c++17_warning.h: Remove.
	* include/bits/string_view.tcc: Do not include <bits/c++17_warning.h>
	for pre-C++17 modes.
	* include/std/any: Likewise.
	(__cpp_lib_any): Define.
	* include/std/mutex (__cpp_lib_scoped_lock): Adjust value as per new
	SD-6 draft.
	* include/std/numeric (__cpp_lib_gcd_lcm): Define as per new SD-6
	draft.
	* include/std/optional: Do not include <bits/c++17_warning.h>.
	(__cpp_lib_optional): Define.
	* include/std/shared_mutex: Do not include <bits/c++14_warning.h>.
	* include/std/string_view: Do not include <bits/c++17_warning.h>.
	(__cpp_lib_string_view): Define.
	* include/std/variant: Do not include <bits/c++17_warning.h>.
	(__cpp_lib_variant): Define.
	* testsuite/20_util/optional/cons/value_neg.cc: Adjust dg-error line
	numbers.
	* testsuite/26_numerics/gcd/1.cc: Test for __cpp_lib_gcd_lcm.
	* testsuite/26_numerics/gcd/gcd_neg.cc: Adjust dg-error line
	numbers.
	* testsuite/26_numerics/lcm/1.cc: Test for __cpp_lib_gcd_lcm.
	* testsuite/26_numerics/lcm/lcm_neg.cc: Adjust dg-error line
	numbers.
	* testsuite/30_threads/scoped_lock/requirements/typedefs.cc: Adjust
	expected value of __cpp_lib_scoped_lock.

From-SVN: r252018