Commit ff76f0b5 by Wilco Dijkstra

Remove '*' from movsi/di/ti patterns

Remove the remaining uses of '*' from the movsi/di/ti patterns.
Using '*' in alternatives is typically incorrect at it tells the register
allocator to ignore those alternatives.  So remove these from all the
integer move patterns.  This removes unnecessary int to float moves, for
example gcc.target/aarch64/pr62178.c no longer generates a redundant fmov
since the w = m variant is now allowed.

    gcc/
	* config/aarch64/aarch64.md (movsi_aarch64): Remove all '*'.
	(movdi_aarch64): Likewise.
	(movti_aarch64): Likewise.

From-SVN: r252033
parent 7d843469
2017-09-02 Simon Wright <simon@pushface.org> 2017-09-12 Wilco Dijkstra <wdijkstr@arm.com>
* config/aarch64/aarch64.md (movsi_aarch64): Remove all '*'.
(movdi_aarch64): Likewise.
(movti_aarch64): Likewise.
2017-09-12 Simon Wright <simon@pushface.org>
PR target/80204 PR target/80204
* config/darwin-driver.c (darwin_find_version_from_kernel): Eliminate * config/darwin-driver.c (darwin_find_version_from_kernel): Eliminate
...@@ -15,16 +21,16 @@ ...@@ -15,16 +21,16 @@
2017-09-12 Carl Love <cel@us.ibm.com> 2017-09-12 Carl Love <cel@us.ibm.com>
* config/rs6000/altivec.md (vec_widen_umult_even_v4si, * config/rs6000/altivec.md (vec_widen_umult_even_v4si,
vec_widen_smult_even_v4si): Add define expands for vmuleuw, vmulesw, vec_widen_smult_even_v4si): Add define expands for vmuleuw, vmulesw,
vmulouw, vmulosw. vmulouw, vmulosw.
* config/rs6000/rs6000-builtin.def (VMLEUW, VMULESW, VMULOUW, * config/rs6000/rs6000-builtin.def (VMLEUW, VMULESW, VMULOUW,
VMULOSW): Add definitions. VMULOSW): Add definitions.
* config/rs6000/rs6000-c.c (altivec_overloaded_builtins): Add * config/rs6000/rs6000-c.c (altivec_overloaded_builtins): Add
ALTIVEC_BUILTIN_VMULESW, ALTIVEC_BUILTIN_VMULEUW, ALTIVEC_BUILTIN_VMULESW, ALTIVEC_BUILTIN_VMULEUW,
ALTIVEC_BUILTIN_VMULOSW, ALTIVEC_BUILTIN_VMULOUW entries. ALTIVEC_BUILTIN_VMULOSW, ALTIVEC_BUILTIN_VMULOUW entries.
* config/rs6000/rs6000.c (rs6000_gimple_fold_builtin, * config/rs6000/rs6000.c (rs6000_gimple_fold_builtin,
builtin_function_type): Add ALTIVEC_BUILTIN_* case statements. builtin_function_type): Add ALTIVEC_BUILTIN_* case statements.
2017-09-12 James Greenhalgh <james.greenhalgh@arm.com> 2017-09-12 James Greenhalgh <james.greenhalgh@arm.com>
......
...@@ -932,8 +932,8 @@ ...@@ -932,8 +932,8 @@
) )
(define_insn_and_split "*movsi_aarch64" (define_insn_and_split "*movsi_aarch64"
[(set (match_operand:SI 0 "nonimmediate_operand" "=r,k,r,r,r,r,*w,m, m,r,r ,*w, r,*w,w") [(set (match_operand:SI 0 "nonimmediate_operand" "=r,k,r,r,r,r,w, m, m, r, r, w,r,w, w")
(match_operand:SI 1 "aarch64_mov_operand" " r,r,k,M,n,m, m,rZ,*w,Usa,Ush,rZ,w,*w,Ds"))] (match_operand:SI 1 "aarch64_mov_operand" " r,r,k,M,n,m,m,rZ,*w,Usa,Ush,rZ,w,w,Ds"))]
"(register_operand (operands[0], SImode) "(register_operand (operands[0], SImode)
|| aarch64_reg_or_zero (operands[1], SImode))" || aarch64_reg_or_zero (operands[1], SImode))"
"@ "@
...@@ -966,8 +966,8 @@ ...@@ -966,8 +966,8 @@
) )
(define_insn_and_split "*movdi_aarch64" (define_insn_and_split "*movdi_aarch64"
[(set (match_operand:DI 0 "nonimmediate_operand" "=r,k,r,r,r,r,r,*w,m, m,r,r, *w,r,*w,w") [(set (match_operand:DI 0 "nonimmediate_operand" "=r,k,r,r,r,r,r,w, m,m, r, r, w,r,w, w")
(match_operand:DI 1 "aarch64_mov_operand" " r,r,k,N,M,n,m, m,rZ,*w,Usa,Ush,rZ,w,*w,Dd"))] (match_operand:DI 1 "aarch64_mov_operand" " r,r,k,N,M,n,m,m,rZ,w,Usa,Ush,rZ,w,w,Dd"))]
"(register_operand (operands[0], DImode) "(register_operand (operands[0], DImode)
|| aarch64_reg_or_zero (operands[1], DImode))" || aarch64_reg_or_zero (operands[1], DImode))"
"@ "@
...@@ -1023,9 +1023,9 @@ ...@@ -1023,9 +1023,9 @@
(define_insn "*movti_aarch64" (define_insn "*movti_aarch64"
[(set (match_operand:TI 0 [(set (match_operand:TI 0
"nonimmediate_operand" "=r, *w,r ,*w,r,m,m,*w,m") "nonimmediate_operand" "=r, w,r,w,r,m,m,w,m")
(match_operand:TI 1 (match_operand:TI 1
"aarch64_movti_operand" " rn,r ,*w,*w,m,r,Z, m,*w"))] "aarch64_movti_operand" " rn,r,w,w,m,r,Z,m,w"))]
"(register_operand (operands[0], TImode) "(register_operand (operands[0], TImode)
|| aarch64_reg_or_zero (operands[1], TImode))" || aarch64_reg_or_zero (operands[1], TImode))"
"@ "@
......
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