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macroplacement
Commit 6b4fe784 by sakundu
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Updated MemPool tile sdc 

Signed-off-by: sakundu <sakundu@ucsd.edu>
parent 1ff0c6d0
Showing with 5 additions and 5 deletions
.gitignore
Flows/*/*/run/*/ Flows/*/*/run/*/
\ No newline at end of file Flows/job
Flows/ASAP7/mempool_tile/constraints/mempool_tile_wrap.sdc
...@@ -1299,4 +1299,4 @@ set_clock_uncertainty -setup 0.08 [get_clocks clk_i] ...@@ -1299,4 +1299,4 @@ set_clock_uncertainty -setup 0.08 [get_clocks clk_i]
set_clock_uncertainty -hold 0.08 [get_clocks clk_i] set_clock_uncertainty -hold 0.08 [get_clocks clk_i]
set_clock_latency 0.07 [get_clocks vclk_i] set_clock_latency 0.07 [get_clocks vclk_i]
## List of unsupported SDC commands ## ## List of unsupported SDC commands ##
set_critical_range 0.100 [current_design] #set_critical_range 0.100 [current_design]
Flows/NanGate45/mempool_tile/constraints/mempool_tile_wrap.sdc
...@@ -56,4 +56,4 @@ set_input_delay [expr 0.30*$clock_cycle] -clock vclk_i rst_ni ...@@ -56,4 +56,4 @@ set_input_delay [expr 0.30*$clock_cycle] -clock vclk_i rst_ni
# Critical range # Critical range
# Depending on the synthesis tool used, this can be helpful. # Depending on the synthesis tool used, this can be helpful.
set_critical_range 0.100 [current_design] #set_critical_range 0.100 [current_design]
Flows/SKY130HD/mempool_tile/constraints/mempool_tile_wrap.sdc
...@@ -56,4 +56,4 @@ set_input_delay [expr 0.30*$clock_cycle] -clock vclk_i rst_ni ...@@ -56,4 +56,4 @@ set_input_delay [expr 0.30*$clock_cycle] -clock vclk_i rst_ni
# Critical range # Critical range
# Depending on the synthesis tool used, this can be helpful. # Depending on the synthesis tool used, this can be helpful.
set_critical_range 0.100 [current_design] #set_critical_range 0.100 [current_design]
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