Commits · 951ca48b9c0ef7ef5161795eb213bb9e199ee104 · lvzhengyang / abc · GitLab

24 Jan, 2016 1 commit
- Small changes to sort for timing. · 951ca48b
  Alan Mishchenko committed Jan 24, 2016
  
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20 Jan, 2016 2 commits
- Bug fix in 'aig', for the case of non-min-base SOPs. · 9ef44765
  Alan Mishchenko committed Jan 20, 2016
  
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- Generating sorting network as a PLA file. · df34a262
  Alan Mishchenko committed Jan 20, 2016
  
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17 Jan, 2016 1 commit
- New command to dump LUT network. · f5ee46eb
  Alan Mishchenko committed Jan 16, 2016
  
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15 Jan, 2016 3 commits
- Changing the resource file to get rid of a warning on Linux. · 579bcccc
  Alan Mishchenko committed Jan 14, 2016
  
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- Compiler warning. · 334f4a29
  Alan Mishchenko committed Jan 14, 2016
  
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- Changes to PDR to compute f-inf clauses and import invariant (or clauses) as a network. · c4446189
  Alan Mishchenko committed Jan 14, 2016
  
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14 Jan, 2016 2 commits
- Experiments with SAT-based mapping. · f30facfe
  Alan Mishchenko committed Jan 14, 2016
  
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- Adding a way to derive cardinality constraint as a sorting network. · 4ecf43f1
  Alan Mishchenko committed Jan 13, 2016
  
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13 Jan, 2016 2 commits
- Adding support for delay/area tradeoff. · 87f6828d
  Alan Mishchenko committed Jan 13, 2016
  
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- Integrating new CNF generation into &bmc. · 8dd31fb4
  Alan Mishchenko committed Jan 12, 2016
  
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12 Jan, 2016 1 commit
- Better print-out of SOPs. Changing default of 'fx'. Updating 'satclp' to fine prine SOPs. · de695c9d
  Alan Mishchenko committed Jan 12, 2016
  
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11 Jan, 2016 2 commits
- Experiments with SAT-based mapping. · 7984628d
  Alan Mishchenko committed Jan 10, 2016
  
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- Experiments with SAT-based mapping. · 1bbf2398
  Alan Mishchenko committed Jan 10, 2016
  
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10 Jan, 2016 1 commit
- Adding support of candinality clause to the SAT solver. · d6178631
  Alan Mishchenko committed Jan 10, 2016
  
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08 Jan, 2016 1 commit
- Consolidating timing manager Scl_Con_t and propagating changes. · a4f97763
  Alan Mishchenko committed Jan 07, 2016
  
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07 Jan, 2016 2 commits
- Bug fix in constraint file reader. · 15a891f9
  Alan Mishchenko committed Jan 07, 2016
  
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- Adding switch &miter -x for XORs outputs of two word-level POs. · 5453820c
  Alan Mishchenko committed Jan 06, 2016
  
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06 Jan, 2016 5 commits
- Fixing last-minute bug fix in &nf. · 3240abdb
  Alan Mishchenko committed Jan 05, 2016
  
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- Buf fix in floating time reporting. · b9e71bba
  Alan Mishchenko committed Jan 05, 2016
  
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- Fix in &nf for the case when PO can be driven by an inverter. · 7bf3f5e1
  Alan Mishchenko committed Jan 05, 2016
  
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- Fix in &nf for the case when PO can be driven by an inverter. · 30d09e2c
  Alan Mishchenko committed Jan 05, 2016
  
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- Migrating to using 32-bit timing representation in &nf. · c158dd5a
  Alan Mishchenko committed Jan 05, 2016
  
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05 Jan, 2016 1 commit
- Migrating back to using 'float' in area-flow computation in &nf. · 19ad75f1
  Alan Mishchenko committed Jan 05, 2016
  
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23 Dec, 2015 2 commits
- Corner-case bug in 'read_profile'. · 6642e40a
  Alan Mishchenko committed Dec 22, 2015
  
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- Adding names to GIA inputs/outputs (addressing x-valued flops). · 68bc46be
  Alan Mishchenko committed Dec 22, 2015
  
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22 Dec, 2015 3 commits
- Adding names to GIA inputs/outputs. Changing polarity of invariant generated by PDR. · 617055f5
  Alan Mishchenko committed Dec 22, 2015
  
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- Adding names to GIA inputs/outputs. Changing polarity of invariant generated by PDR. · 2e8543fc
  Alan Mishchenko committed Dec 21, 2015
  
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- Adding names to GIA inputs/outputs. Changing polarity of invariant generated by PDR. · 1228e26c
  Alan Mishchenko committed Dec 21, 2015
  
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18 Dec, 2015 1 commit
- Corner-case bug in invariant profiling. · ba5e6995
  Alan Mishchenko committed Dec 18, 2015
  
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16 Dec, 2015 1 commit
- Compiler warning. · 54269c7c
  Alan Mishchenko committed Dec 16, 2015
  
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14 Dec, 2015 2 commits
- Branch merge. · 09a17b89
  Alan Mishchenko committed Dec 14, 2015
  
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- Adding code to support gate profiles. · 19586f10
  Alan Mishchenko committed Dec 14, 2015
  
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08 Dec, 2015 2 commits
- Extending Verilog parser to handle 'default' in the case-statement (bug fix). · e8f459d8
  Alan Mishchenko committed Dec 07, 2015
  
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- Extending Verilog parser to handle 'default' in the case-statement. · 64afe6e9
  Alan Mishchenko committed Dec 07, 2015
  
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07 Dec, 2015 1 commit
- Adding code to support gate profiles. · e9abb0f4
  Alan Mishchenko committed Dec 07, 2015
  
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06 Dec, 2015 1 commit
- Adding commands to read/write/print gate profiles. · 0f29ba75
  Alan Mishchenko committed Dec 05, 2015
  
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23 Nov, 2015 1 commit
- New command %psinv. · 56880eab
  Alan Mishchenko committed Nov 23, 2015
  
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21 Nov, 2015 2 commits
- add a new #define ABC_NAMESPACE_USING_NAMESPACE that adds a using decelaration when needed · 63fcf25a
  Baruch Sterin committed Nov 20, 2015
  
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- move namespace logic into a separate file. It is useful for users of ABC that… · 11581ca9
```
move namespace logic into a separate file. It is useful for users of ABC that need to use symbols without the entire baggage of including abc_global.h
```
  Baruch Sterin committed Nov 20, 2015
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