Commit f5ee46eb by Alan Mishchenko

New command to dump LUT network.

parent 579bcccc
......@@ -1408,6 +1408,7 @@ extern Gia_Man_t * Gia_ManUpdateExtraAig2( void * pTime, Gia_Man_t * pAi
extern Gia_Man_t * Gia_ManDupCollapse( Gia_Man_t * p, Gia_Man_t * pBoxes, Vec_Int_t * vBoxPres, int fSeq );
extern int Gia_ManVerifyWithBoxes( Gia_Man_t * pGia, int nBTLimit, int nTimeLim, int fSeq, int fVerbose, char * pFileSpec );
/*=== giaTruth.c ===========================================================*/
extern word Gia_LutComputeTruth6( Gia_Man_t * p, int iObj, Vec_Wrd_t * vTruths );
extern word Gia_ObjComputeTruthTable6Lut( Gia_Man_t * p, int iObj, Vec_Wrd_t * vTemp );
extern word Gia_ObjComputeTruthTable6( Gia_Man_t * p, Gia_Obj_t * pObj, Vec_Int_t * vSupp, Vec_Wrd_t * vTruths );
extern void Gia_ObjCollectInternal( Gia_Man_t * p, Gia_Obj_t * pObj );
......
......@@ -54,6 +54,48 @@ static inline word * Gla_ObjTruthDup( Gia_Man_t * p, word * pDst, word * pSrc, i
/**Function*************************************************************
Synopsis [Compute truth table.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
word Gia_LutComputeTruth6_rec( Gia_Man_t * p, int iNode, Vec_Wrd_t * vTruths )
{
Gia_Obj_t * pObj;
word Truth0, Truth1;
if ( Gia_ObjIsTravIdCurrentId(p, iNode) )
return Vec_WrdEntry(vTruths, iNode);
Gia_ObjSetTravIdCurrentId(p, iNode);
pObj = Gia_ManObj( p, iNode );
assert( Gia_ObjIsAnd(pObj) );
Truth0 = Gia_LutComputeTruth6_rec( p, Gia_ObjFaninId0p(p, pObj), vTruths );
Truth1 = Gia_LutComputeTruth6_rec( p, Gia_ObjFaninId1p(p, pObj), vTruths );
if ( Gia_ObjFaninC0(pObj) )
Truth0 = ~Truth0;
if ( Gia_ObjFaninC1(pObj) )
Truth1 = ~Truth1;
Vec_WrdWriteEntry( vTruths, iNode, Truth0 & Truth1 );
return Truth0 & Truth1;
}
word Gia_LutComputeTruth6( Gia_Man_t * p, int iObj, Vec_Wrd_t * vTruths )
{
int k, iFan;
assert( Gia_ObjIsLut(p, iObj) );
Gia_ManIncrementTravId( p );
Gia_LutForEachFanin( p, iObj, iFan, k )
{
Vec_WrdWriteEntry( vTruths, iFan, s_Truths6[k] );
Gia_ObjSetTravIdCurrentId( p, iFan );
}
return Gia_LutComputeTruth6_rec( p, iObj, vTruths );
}
/**Function*************************************************************
Synopsis [Computes truth table of a 6-LUT.]
Description []
......
......@@ -1930,6 +1930,98 @@ Vec_Int_t * Gia_ManPoXSim( Gia_Man_t * p, int nFrames, int fVerbose )
return vRes;
}
#define MAX_LUT_SIZE 8
typedef struct Gia_MapLut_t_
{
int Type; // node type: PI=1, PO=2, LUT=3
int Out; // ID
int StartId; // -1
int nFans; // fanin count
float Delay; // 0.0
int pFans[MAX_LUT_SIZE]; // fanin IDs
unsigned pTruth[MAX_LUT_SIZE<6?1:(1<<(MAX_LUT_SIZE-5))]; // the truth table
} Gia_MapLut_t;
/**Function*************************************************************
Synopsis []
Description []
SideEffects []
SeeAlso []
***********************************************************************/
void Gia_AigerWriteLut( Gia_Man_t * p, char * pFileName )
{
Gia_Obj_t * pObj;
int i, k, iFan, iLut = 0;
int LutSizeMax = Gia_ManLutSizeMax( p );
int nUints = Abc_TruthWordNum(LutSizeMax);
int nLuts = 1 + Gia_ManCiNum(p) + Gia_ManCoNum(p) + Gia_ManLutNum(p);
Gia_MapLut_t * pLuts = ABC_CALLOC( Gia_MapLut_t, nLuts );
Vec_Wrd_t * vTruths = Vec_WrdStart( Gia_ManObjNum(p) );
assert( LutSizeMax <= 6 );
// set obj numbers
// constant
pLuts->Type = 3;
memset( pLuts->pTruth, 0xFF, sizeof(unsigned) * nUints );
Gia_ManFillValue(p);
Gia_ManConst0(p)->Value = pLuts[iLut].Out = Abc_Var2Lit( iLut, 0 );
iLut++;
// inputs
Gia_ManForEachCi( p, pObj, i )
{
pLuts[iLut].Type = 1;
memset( pLuts[iLut].pTruth, 0xAA, sizeof(unsigned) * nUints );
pObj->Value = pLuts[iLut].Out = Abc_Var2Lit( iLut, 0 );
iLut++;
}
// nodes
Gia_ManForEachObj( p, pObj, i )
if ( i && Gia_ObjIsLut(p, i) )
{
pLuts[iLut].Type = 3;
Gia_LutForEachFanin( p, i, iFan, k )
pLuts[iLut].pFans[k] = Gia_ManObj(p, iFan)->Value;
pLuts[iLut].nFans = k;
*(word *)pLuts[iLut].pTruth = Gia_LutComputeTruth6(p, i, vTruths);
pObj->Value = pLuts[iLut].Out = Abc_Var2Lit( iLut, 0 );
iLut++;
}
// outputs
Gia_ManForEachCo( p, pObj, i )
{
pLuts[iLut].Type = 2;
pLuts[iLut].pFans[0] = Gia_ObjFanin0(pObj)->Value;
if ( Gia_ObjFaninC0(pObj) ^ Gia_ObjIsConst0(Gia_ObjFanin0(pObj)) )
memset( pLuts[iLut].pTruth, 0x55, sizeof(unsigned) * nUints );
else
memset( pLuts[iLut].pTruth, 0xAA, sizeof(unsigned) * nUints );
pLuts[iLut].nFans = 1;
pObj->Value = pLuts[iLut].Out = Abc_Var2Lit( iLut, 0 );
iLut++;
}
assert( iLut == nLuts );
// dump into a file
{
FILE * pFile = fopen( pFileName, "wb" );
if ( pFile == NULL )
printf( "Cannot open file \"%s\" for writing.\n", pFileName );
else
{
int nSize1 = nLuts * sizeof(Gia_MapLut_t);
int nSize2 = fwrite( pLuts, 1, nSize1, pFile );
assert( nSize1 == nSize2 );
printf( "Successfully dumped %d bytes of binary data.\n", nSize1 );
}
fclose( pFile );
}
ABC_FREE( pLuts );
Vec_WrdFree( vTruths );
}
////////////////////////////////////////////////////////////////////////
/// END OF FILE ///
////////////////////////////////////////////////////////////////////////
......
......@@ -342,6 +342,7 @@ static int Abc_CommandAbc9ReadStg ( Abc_Frame_t * pAbc, int argc, cha
static int Abc_CommandAbc9ReadVer ( Abc_Frame_t * pAbc, int argc, char ** argv );
static int Abc_CommandAbc9WriteVer ( Abc_Frame_t * pAbc, int argc, char ** argv );
static int Abc_CommandAbc9Write ( Abc_Frame_t * pAbc, int argc, char ** argv );
static int Abc_CommandAbc9WriteLut ( Abc_Frame_t * pAbc, int argc, char ** argv );
static int Abc_CommandAbc9Ps ( Abc_Frame_t * pAbc, int argc, char ** argv );
static int Abc_CommandAbc9PFan ( Abc_Frame_t * pAbc, int argc, char ** argv );
static int Abc_CommandAbc9PSig ( Abc_Frame_t * pAbc, int argc, char ** argv );
......@@ -965,6 +966,7 @@ void Abc_Init( Abc_Frame_t * pAbc )
Cmd_CommandAdd( pAbc, "ABC9", "&read_ver", Abc_CommandAbc9ReadVer, 0 );
Cmd_CommandAdd( pAbc, "ABC9", "&write_ver", Abc_CommandAbc9WriteVer, 0 );
Cmd_CommandAdd( pAbc, "ABC9", "&w", Abc_CommandAbc9Write, 0 );
Cmd_CommandAdd( pAbc, "ABC9", "&wlut", Abc_CommandAbc9WriteLut, 0 );
Cmd_CommandAdd( pAbc, "ABC9", "&ps", Abc_CommandAbc9Ps, 0 );
Cmd_CommandAdd( pAbc, "ABC9", "&pfan", Abc_CommandAbc9PFan, 0 );
Cmd_CommandAdd( pAbc, "ABC9", "&psig", Abc_CommandAbc9PSig, 0 );
......@@ -26852,6 +26854,87 @@ usage:
SeeAlso []
***********************************************************************/
int Abc_CommandAbc9WriteVer( Abc_Frame_t * pAbc, int argc, char ** argv )
{
char * pFileSpec = NULL;
Abc_Ntk_t * pNtkSpec = NULL;
char * pFileName;
char ** pArgvNew;
int c, nArgcNew;
int fVerbose = 0;
Extra_UtilGetoptReset();
while ( ( c = Extra_UtilGetopt( argc, argv, "Svh" ) ) != EOF )
{
switch ( c )
{
case 'S':
if ( globalUtilOptind >= argc )
{
Abc_Print( -1, "Command line switch \"-S\" should be followed by a file name.\n" );
goto usage;
}
pFileSpec = argv[globalUtilOptind];
globalUtilOptind++;
break;
case 'v':
fVerbose ^= 1;
break;
case 'h':
goto usage;
default:
goto usage;
}
}
pArgvNew = argv + globalUtilOptind;
nArgcNew = argc - globalUtilOptind;
if ( nArgcNew != 1 )
{
Abc_Print( -1, "Expecting output file name on the command line.\n" );
return 1;
}
pFileName = argv[globalUtilOptind];
if ( pAbc->pNtkCur == NULL )
{
Abc_Print( -1, "There is no mapped file to write.\n" );
return 1;
}
if ( pFileSpec == NULL )
{
Abc_Print( -1, "The specification file is not given.\n" );
return 1;
}
pNtkSpec = Io_ReadNetlist( pFileSpec, Io_ReadFileType(pFileSpec), 0 );
if ( pNtkSpec == NULL )
{
Abc_Print( -1, "Reading hierarchical Verilog for the specification has failed.\n" );
return 1;
}
Abc_NtkInsertHierarchyGia( pNtkSpec, pAbc->pNtkCur, fVerbose );
Io_WriteVerilog( pNtkSpec, pFileName );
Abc_NtkDelete( pNtkSpec );
return 0;
usage:
Abc_Print( -2, "usage: &write_ver [-S <file>] [-vh] <file>\n" );
Abc_Print( -2, "\t writes hierarchical Verilog after mapping\n" );
Abc_Print( -2, "\t-S file : file name for the original hierarchical design (required)\n" );
Abc_Print( -2, "\t-v : toggle verbose output [default = %s]\n", fVerbose? "yes": "no" );
Abc_Print( -2, "\t-h : print the command usage\n");
Abc_Print( -2, "\t<file> : the file name\n");
return 1;
}
/**Function*************************************************************
Synopsis []
Description []
SideEffects []
SeeAlso []
***********************************************************************/
int Abc_CommandAbc9Write( Abc_Frame_t * pAbc, int argc, char ** argv )
{
char * pFileName;
......@@ -26927,28 +27010,18 @@ usage:
SeeAlso []
***********************************************************************/
int Abc_CommandAbc9WriteVer( Abc_Frame_t * pAbc, int argc, char ** argv )
int Abc_CommandAbc9WriteLut( Abc_Frame_t * pAbc, int argc, char ** argv )
{
char * pFileSpec = NULL;
Abc_Ntk_t * pNtkSpec = NULL;
extern void Gia_AigerWriteLut( Gia_Man_t * pGia, char * pFileName );
char * pFileName;
char ** pArgvNew;
int c, nArgcNew;
int fVerbose = 0;
Extra_UtilGetoptReset();
while ( ( c = Extra_UtilGetopt( argc, argv, "Svh" ) ) != EOF )
while ( ( c = Extra_UtilGetopt( argc, argv, "vh" ) ) != EOF )
{
switch ( c )
{
case 'S':
if ( globalUtilOptind >= argc )
{
Abc_Print( -1, "Command line switch \"-S\" should be followed by a file name.\n" );
goto usage;
}
pFileSpec = argv[globalUtilOptind];
globalUtilOptind++;
break;
case 'v':
fVerbose ^= 1;
break;
......@@ -26962,38 +27035,29 @@ int Abc_CommandAbc9WriteVer( Abc_Frame_t * pAbc, int argc, char ** argv )
nArgcNew = argc - globalUtilOptind;
if ( nArgcNew != 1 )
{
Abc_Print( -1, "Expecting output file name on the command line.\n" );
Abc_Print( -1, "There is no file name.\n" );
return 1;
}
pFileName = argv[globalUtilOptind];
if ( pAbc->pNtkCur == NULL )
{
Abc_Print( -1, "There is no mapped file to write.\n" );
return 1;
}
if ( pFileSpec == NULL )
if ( pAbc->pGia == NULL )
{
Abc_Print( -1, "The specification file is not given.\n" );
Abc_Print( -1, "Abc_CommandAbc9WriteLut(): There is no AIG to write.\n" );
return 1;
}
pNtkSpec = Io_ReadNetlist( pFileSpec, Io_ReadFileType(pFileSpec), 0 );
if ( pNtkSpec == NULL )
if ( !Gia_ManHasMapping(pAbc->pGia) )
{
Abc_Print( -1, "Reading hierarchical Verilog for the specification has failed.\n" );
Abc_Print( -1, "Abc_CommandAbc9WriteLut(): AIG has no mapping.\n" );
return 1;
}
Abc_NtkInsertHierarchyGia( pNtkSpec, pAbc->pNtkCur, fVerbose );
Io_WriteVerilog( pNtkSpec, pFileName );
Abc_NtkDelete( pNtkSpec );
Gia_AigerWriteLut( pAbc->pGia, pFileName );
return 0;
usage:
Abc_Print( -2, "usage: &write_ver [-S <file>] [-vh] <file>\n" );
Abc_Print( -2, "\t writes hierarchical Verilog after mapping\n" );
Abc_Print( -2, "\t-S file : file name for the original hierarchical design (required)\n" );
Abc_Print( -2, "\t-v : toggle verbose output [default = %s]\n", fVerbose? "yes": "no" );
Abc_Print( -2, "\t-h : print the command usage\n");
Abc_Print( -2, "\t<file> : the file name\n");
Abc_Print( -2, "usage: &wlut [-umvh] <file>\n" );
Abc_Print( -2, "\t writes the the current LUT mapping into a binary file\n" );
Abc_Print( -2, "\t-v : toggle verbose output [default = %s]\n", fVerbose? "yes": "no" );
Abc_Print( -2, "\t-h : print the command usage\n");
Abc_Print( -2, "\t<file> : the file name\n");
return 1;
}
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