1. 31 Jul, 2019 1 commit
    • [VTA] VTA Compilation Script for Intel FPGA (#3494) · 83591aa5
      * initial compilation script for chisel-vta;
      
      * replace tabs with spaces;
      
      * compile script for de10-nano;
      
      * remove generated verilog source code;
      
      * remove `altsource_probe`, `debounce`, `edge_detect` ip;
      
      * replace quartus project files with a single tcl script;
      
      * Update install.md
      
      * improved makefile-based compilation script;
      
      * complete makefile-based compilation of chisel-vta for de10-nano;
      
      * install quartus;
      
      * conversion to .rbf file;
      
      * document chisel-vta compilation process for de10-nano;
      
      * rename generated bitstream file;
      
      * download and extract custom ip for de10-nano;
      
      * minor change
      
      * minor change
      
      * fix indentation;
      
      * bug fix;
      
      * improved robustness in makefile;
      
      * clean up;
      
      * add `.sdc .ipx .qsys` allowance in jenkins;
      
      * add ASF header;
      
      * add ASF header;
      
      * remove IntelShell.scala, update vta_hw.tcl, clean up Makefile & soc_system.qsys;
      
      * add ASF header;
      
      * keep sources compact;
      
      * keep sources compact;
      
      * it's not necessary now
      
      * AXI4LiteClient -> AXI3Client for IntelShell
      
      * remove connection to fpga_only_master;
      
      * a few important bug fix: wire reset pin, and set host_r_last to high
      
      * remove intel specific interface definition;
      
      * add NO_DSP option in Makefile;
      
      * AXI4Lite is not used in IntelShell;
      
      * minor fix: disable dsp and use logic instead;
      
      * quartus version change: 18.0 -> 18.1
      
      * remove altera related statement;
      
      * compose compile_design.tcl
      
      * initial tcl script for soc_system generation;
      
      * remove .qsys file;
      
      * remove unused;
      
      * .qsys can be generated by tcl script;
      
      * remove hps_io and shrink size of soc_system;
      
      * integrate into makefile;
      
      * version change: 18.0 -> 18.1
      
      * add sample config file for de10-nano;
      
      * parameterize DEVICE and PROJECT_NAME
      
      * remove extra lines;
      
      * brief description on flashing sd card image for de10-nano
      
      * docs on building additional components
      
      * parameterize DEVICE and DEVICE_FAMILY
      
      * parameterize DEVICE and DEVICE_FAMILY
      
      * parameterize DEVICE and DEVICE_FAMILY
      
      * de10-nano -> de10nano
      
      * minor change
      
      * add comment in code and document in order to address review comments;
      Liangfu Chen committed