- 28 Feb, 2019 1 commit
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Add tests for splitnets command Expand coverage for trace command Expand coverage for splice command (tests for options) Expand coverage for scc command (different loops) Expand coverage for rename command Change test for passes/techmap/deminout Update test for 'dff2dffe -direct' command Add test for 'dffsr2dff' command Expand coverage for iopadmap command
SergeyDegtyar committed
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- 05 Feb, 2019 1 commit
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backends ======= 1. backends/firrtl/firrtl.cc – skipped because of error: ERROR: Unclocked write port 0 on memory top.ram. Add model with memory block too, so you can cover line block starting at line 419 simple ========= + 1. passes/techmap/attrmap.cc There is example in help block create example with (* keep="true" *) attribute and run example + 2. passes/techmap/dff2dffe.cc execute with -unmap parameter + 3. passes/techmap/dff2dffs.cc + 4. passes/techmap/extract.cc Lot of variations of input parameters is not excersised ? 5. passes/techmap/extract_counter.cc This is specific to greenpak4 architecture, but idea is to have counter in design and call this after synth_greenpak + 6. passes/techmap/shregmap.cc. This also seams to be greenpak4 specific, but extracting shift register misc ======== 1. passes/techmap/insbuf.cc Testing problems: 1. backends/firrtl/firrtl.cc – skipped because of error: ERROR: Unclocked write port 0 on memory top.ram. Add model with memory block too, so you can cover line block starting at line 419 2.dff2dffe -direct - skipped: ERROR: Found error in internal cell \dffe.$procdff$47 ($dffe) at 3.insbuf -buf $_BUF_ in out - skipped: ERROR: Found error in internal cell
SergeyDegtyar committed
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- 12 Dec, 2018 1 commit
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SergeyDegtyar committed
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- 05 Sep, 2018 1 commit
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Signed-off-by: Clifford Wolf <clifford@clifford.at>
Clifford Wolf committed
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