- 23 Jan, 2019 1 commit
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IV frontends ============= For frontends idea is that you do not do read_verilog but some you are reading input in different format. Since most of formats yosys can also read and write you can use plain verilog write blif for example and use that as source for this coverage. For liberty files many examples can be found so that is also in list of tasks 1. http://scratch.clifford.at/coverage_html/frontends/blif/blifparse.cc.gcov.html 2. http://scratch.clifford.at/coverage_html/frontends/ilang/ilang_frontend.cc.gcov.html 3. http://scratch.clifford.at/coverage_html/frontends/json/jsonparse.cc.gcov.html 4. http://scratch.clifford.at/coverage_html/frontends/liberty/liberty.cc.gcov.html
SergeyDegtyar committed
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- 15 Jan, 2019 1 commit
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SergeyDegtyar committed
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- 02 Jan, 2019 1 commit
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5. clk2fflogic (104 - 144,180-195 are not covered) 9. memory_nordff(75-101 is not covered) 10. memory_unpack(91-108 is not covered) 12. hierarchy (the coverage from 44% increased to 61,3%)
SergeyDegtyar committed
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