Commit e630e78b by Eddie Hung

Update synth_xilinx_nodsp to check only for DSPs

parent 3a4a23f9
......@@ -17,11 +17,5 @@ equiv_opt -assert -map +/xilinx/cells_sim.v synth_xilinx -nodsp -noiopad # equiv
design -load postopt # load the post-opt design (otherwise equiv_opt loads the pre-opt design)
cd top # Constrain all select calls below inside the top module
stat
select -assert-count 3 t:CARRY4
select -assert-count 17 t:LUT2
select -assert-count 1 t:LUT3
select -assert-count 2 t:LUT4
select -assert-count 4 t:LUT5
select -assert-count 35 t:LUT6
select -assert-count 4 t:MUXF7
select -assert-none t:LUT2 t:LUT3 t:LUT4 t:LUT5 t:LUT6 t:MUXF7 t:CARRY4 %% t:* %D
select -assert-none t:DSP48E1
select -assert-none t:LUT* t:MUXF* t:CARRY4 %% t:* %D
Markdown is supported
0% or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment