add tests for synth_anlogic and 'regression'
1. Add tests for synth_anlogic command Now this tests are commented because of: + iverilog -o testbench ../testbench.v synth.v ../../common.v ../../../../../techlibs/common/simcells.v ../../../../../techlibs/anlogic/cells_sim.v ../../../../../techlibs/anlogic/cells_sim.v:20: error: Unable to bind wire/reg/memory `A' in `testbench.uut._09_' ../../../../../techlibs/anlogic/cells_sim.v:20: error: Unable to elaborate r-value: (INIT)>>(A) 2 error(s) during elaboration. 2. Add 'regression' test
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architecture/scripts/synth_anlogic.ys
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architecture/scripts/synth_anlogic_edif.ys
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architecture/scripts/synth_anlogic_json.ys
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architecture/synth_anlogic/testbench.v
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regression/common.v
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regression/run.sh
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regression/scripts/case_stmt_assertion.ys
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