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lvzhengyang
yosys-tests
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d5375997
Commit
d5375997
authored
Sep 20, 2019
by
SergeyDegtyar
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Fix regression on #160 build.
parent
e6e0dae3
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architecture/xilinx_ug901_synthesis_examples/macc.ys
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architecture/xilinx_ug901_synthesis_examples/macc.ys
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d5375997
...
@@ -10,14 +10,14 @@ cd macc
...
@@ -10,14 +10,14 @@ cd macc
stat
stat
select -assert-count 1 t:BUFG
select -assert-count 1 t:BUFG
select -assert-count 53 t:FDRE
select -assert-count 53 t:FDRE
select -assert-count 6
4
t:LUT2
select -assert-count 6
3
t:LUT2
select -assert-count 1
0
t:LUT3
select -assert-count 1
1
t:LUT3
select -assert-count 22 t:LUT4
select -assert-count 22 t:LUT4
select -assert-count 1
4
t:LUT5
select -assert-count 1
3
t:LUT5
select -assert-count 12
3
t:LUT6
select -assert-count 12
9
t:LUT6
select -assert-count 34 t:MUXCY
select -assert-count 34 t:MUXCY
select -assert-count 4
1
t:MUXF7
select -assert-count 4
5
t:MUXF7
select -assert-count 1
4
t:MUXF8
select -assert-count 1
5
t:MUXF8
select -assert-count 36 t:XORCY
select -assert-count 36 t:XORCY
select -assert-none t:BUFG t:FDRE t:LUT2 t:LUT3 t:LUT4 t:LUT5 t:LUT6 t:MUXCY t:MUXF7 t:MUXF8 t:XORCY %% t:* %D
select -assert-none t:BUFG t:FDRE t:LUT2 t:LUT3 t:LUT4 t:LUT5 t:LUT6 t:MUXCY t:MUXF7 t:MUXF8 t:XORCY %% t:* %D
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