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yosys-tests
Commit a54bf028 by SergeyDegtyar
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Add additional checks

parent 8574217a
Showing with 11 additions and 0 deletions
simple_reviewed/dff2dffe/dff2dffe_unmap.ys
...@@ -2,10 +2,13 @@ read_verilog ../top.v ...@@ -2,10 +2,13 @@ read_verilog ../top.v
proc proc
dff2dffe dff2dffe
dff2dffe -unmap dff2dffe -unmap
select -assert-none t:$dffe
dump dump
synth -top top synth -top top
dff2dffe dff2dffe
dff2dffe -unmap dff2dffe -unmap
select -assert-none t:$dffe
flatten flatten
opt opt
opt_rmdff opt_rmdff
......
simple_reviewed/dff2dffe/dff2dffe_unmap_direct.ys
...@@ -7,6 +7,7 @@ dump ...@@ -7,6 +7,7 @@ dump
synth -top top synth -top top
dff2dffe -direct $_DFF_P_ $_DFFE_PP_ dff2dffe -direct $_DFF_P_ $_DFFE_PP_
dff2dffe -unmap dff2dffe -unmap
select -assert-none t:$_DFFE_PP_
flatten flatten
opt opt
opt_rmdff opt_rmdff
......
simple_reviewed/dff2dffe/dff2dffe_unmap_direct_match.ys
...@@ -3,6 +3,8 @@ proc ...@@ -3,6 +3,8 @@ proc
synth -top top synth -top top
dff2dffe -direct-match $_DFF_P_ dff2dffe -direct-match $_DFF_P_
dff2dffe -unmap dff2dffe -unmap
select -assert-none t:$dffe
flatten flatten
opt opt
opt_rmdff opt_rmdff
......
simple_reviewed/dff2dffe/dff2dffe_unmap_mince.ys
...@@ -2,10 +2,14 @@ read_verilog ../top.v ...@@ -2,10 +2,14 @@ read_verilog ../top.v
proc proc
dff2dffe dff2dffe
dff2dffe -unmap-mince 2 dff2dffe -unmap-mince 2
select -assert-none t:$dffe
dump dump
synth -top top synth -top top
dff2dffe dff2dffe
dff2dffe -unmap-mince 2 dff2dffe -unmap-mince 2
select -assert-none t:$dffe
flatten flatten
opt opt
opt_rmdff opt_rmdff
......
simple_reviewed/opt_demorgan/opt_demorgan_reduce.ys
...@@ -2,3 +2,4 @@ read_verilog ../top_reduce.v ...@@ -2,3 +2,4 @@ read_verilog ../top_reduce.v
techmap -autoproc techmap -autoproc
extract_reduce extract_reduce
opt_demorgan top opt_demorgan top
select -assert-count 3 t:$not
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