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lvzhengyang
yosys-tests
Commits
60f10935
Commit
60f10935
authored
Aug 01, 2019
by
Eddie Hung
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Account for multipliers less-equal to DSP_{A,B,Y}_MINWIDTH (value 1,1,10)
parent
af072aec
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architecture/synth_ice40_dsp/assert_area.py
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architecture/synth_ice40_dsp/assert_area.py
View file @
60f10935
...
...
@@ -19,9 +19,14 @@ for fn in glob.glob('*.v'):
Y
=
(
B
+
14
)
//
16
count_MAC
=
X
*
Y
count_DFF
=
0
# TODO: Tighter bounds on count_DFF
if
A
%
16
==
1
or
B
%
16
==
1
:
count_DFF
+=
A
+
B
if
A
%
16
>
1
and
B
%
16
>
1
and
(
A
%
16
+
B
%
16
)
<
11
:
count_MAC
-=
1
if
Areg
or
Breg
:
count_DFF
+=
A
%
16
+
B
%
16
else
:
# TODO: Tighter bounds on count_DFF
if
Areg
or
Breg
and
(
A
%
16
==
1
or
B
%
16
==
1
):
count_DFF
+=
A
+
B
if
Preg
:
count_DFF
+=
A
+
B
# TODO: Assert on number of SB_CARRY and SB_LUT too
...
...
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