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lvzhengyang
yosys-tests
Commits
60ac790e
Commit
60ac790e
authored
Apr 30, 2019
by
SergeyDegtyar
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Fix tests in 'regression' for the current Yosys revision.
parent
2da46f4b
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16 changed files
with
57 additions
and
24 deletions
+57
-24
regression/issue_00059/testbench.v
+3
-2
regression/issue_00059/top.v
+4
-1
regression/issue_00067/testbench.v
+3
-2
regression/issue_00067/top.v
+4
-1
regression/issue_00071/testbench.v
+3
-2
regression/issue_00071/top.v
+4
-1
regression/issue_00078/testbench.v
+3
-2
regression/issue_00078/top.v
+4
-1
regression/issue_00081/testbench.v
+3
-2
regression/issue_00081/top.v
+4
-1
regression/issue_00085/testbench.v
+3
-2
regression/issue_00085/top.v
+4
-1
regression/issue_00086/testbench.v
+3
-2
regression/issue_00086/top.v
+4
-1
regression/issue_00088/testbench.v
+3
-2
regression/issue_00088/top.v
+5
-1
No files found.
regression/issue_00059/testbench.v
View file @
60ac790e
...
...
@@ -13,10 +13,11 @@ module testbench;
$
display
(
"OKAY"
)
;
end
wire
c
;
top
uut
(
.
b
(
clk
)
.
b
(
clk
)
,
.
c
(
c
)
)
;
endmodule
regression/issue_00059/top.v
View file @
60ac790e
module
top
(
b
)
;
module
top
(
b
,
c
)
;
input
b
;
output
c
;
assign
c
=
b
;
endmodule
regression/issue_00067/testbench.v
View file @
60ac790e
...
...
@@ -13,10 +13,11 @@ module testbench;
$
display
(
"OKAY"
)
;
end
wire
c
;
top
uut
(
.
b
(
clk
)
.
b
(
clk
)
,
.
c
(
c
)
)
;
endmodule
regression/issue_00067/top.v
View file @
60ac790e
module
top
(
b
)
;
module
top
(
b
,
c
)
;
input
b
;
output
c
;
assign
c
=
b
;
endmodule
regression/issue_00071/testbench.v
View file @
60ac790e
...
...
@@ -13,10 +13,11 @@ module testbench;
$
display
(
"OKAY"
)
;
end
wire
c
;
top
uut
(
.
b
(
clk
)
.
b
(
clk
)
,
.
c
(
c
)
)
;
endmodule
regression/issue_00071/top.v
View file @
60ac790e
module
top
(
b
)
;
module
top
(
b
,
c
)
;
input
b
;
output
c
;
assign
c
=
b
;
endmodule
regression/issue_00078/testbench.v
View file @
60ac790e
...
...
@@ -13,10 +13,11 @@ module testbench;
$
display
(
"OKAY"
)
;
end
wire
c
;
top
uut
(
.
b
(
clk
)
.
b
(
clk
)
,
.
c
(
c
)
)
;
endmodule
regression/issue_00078/top.v
View file @
60ac790e
module
top
(
b
)
;
module
top
(
b
,
c
)
;
input
b
;
output
c
;
assign
c
=
b
;
endmodule
regression/issue_00081/testbench.v
View file @
60ac790e
...
...
@@ -13,10 +13,11 @@ module testbench;
$
display
(
"OKAY"
)
;
end
wire
c
;
top
uut
(
.
b
(
clk
)
.
b
(
clk
)
,
.
c
(
c
)
)
;
endmodule
regression/issue_00081/top.v
View file @
60ac790e
module
top
(
b
)
;
module
top
(
b
,
c
)
;
input
b
;
output
c
;
assign
c
=
b
;
endmodule
regression/issue_00085/testbench.v
View file @
60ac790e
...
...
@@ -13,10 +13,11 @@ module testbench;
$
display
(
"OKAY"
)
;
end
wire
c
;
top
uut
(
.
b
(
clk
)
.
b
(
clk
)
,
.
c
(
c
)
)
;
endmodule
regression/issue_00085/top.v
View file @
60ac790e
module
top
(
b
)
;
module
top
(
b
,
c
)
;
input
b
;
output
c
;
assign
c
=
b
;
endmodule
regression/issue_00086/testbench.v
View file @
60ac790e
...
...
@@ -13,10 +13,11 @@ module testbench;
$
display
(
"OKAY"
)
;
end
wire
c
;
top
uut
(
.
b
(
clk
)
.
b
(
clk
)
,
.
c
(
c
)
)
;
endmodule
regression/issue_00086/top.v
View file @
60ac790e
module
top
(
b
)
;
module
top
(
b
,
c
)
;
input
b
;
output
c
;
assign
c
=
b
;
endmodule
regression/issue_00088/testbench.v
View file @
60ac790e
...
...
@@ -13,10 +13,11 @@ module testbench;
$
display
(
"OKAY"
)
;
end
wire
c
;
top
uut
(
.
b
(
clk
)
.
b
(
clk
)
,
.
c
(
c
)
)
;
endmodule
regression/issue_00088/top.v
View file @
60ac790e
parameter
X
=
2
;
module
top
(
b
)
;
module
top
(
b
,
c
)
;
input
b
;
output
c
;
parameter
Y
=
3
;
assign
c
=
b
;
endmodule
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