Add tests for new cells for firrts; Add test for 'abc -g cmos';

backends/Makefile

@@ -59,6 +59,9 @@ $(eval $(call template,write_firrtl_reduce,write_firrtl ))
 $(eval $(call template,write_firrtl_shift,write_firrtl ))
 $(eval $(call template,write_firrtl_shiftx,write_firrtl ))
 $(eval $(call template,write_firrtl_paramod,write_firrtl))
+$(eval $(call template,write_firrtl_mul,write_firrtl))
+$(eval $(call template,write_firrtl_sub,write_firrtl))
+$(eval $(call template,write_firrtl_pow,write_firrtl))
 $(eval $(call template,write_firrtl_error, write_firrtl_fully_selected write_firrtl_negative_edge_ff write_firrtl_inout_port write_firrtl_unclocked_write_port write_firrtl_complex_write_enable ))
 
 #write_ilang

backends/write_firrtl_mul/testbench.v

+module testbench;
+    reg [2:0] in;
+
+	wire patt_out,out;
+	wire patt_carry_out,carryout;
+
+    initial begin
+        // $dumpfile("testbench.vcd");
+        // $dumpvars(0, testbench);
+
+        #5 in = 0;
+        repeat (10000) begin
+            #5 in = in + 1;
+        end
+
+        $display("OKAY");
+    end
+
+    top uut (
+	.x(in[0]),
+	.y(in[1]),
+	.cin(in[2]),
+	.A(out),
+	.cout(carryout)
+	);
+
+	assign patt_carry_out =  in[2] / in[1];
+	assign patt_out =  in[2] * in[0];
+
+	assert_comb out_test(.A(patt_out), .B(out));
+	//assert_comb carry_test(.A(patt_carry_out), .B(carryout));
+
+endmodule

backends/write_firrtl_mul/top.v

+module top
+(
+ input x,
+ input y,
+ input cin,
+
+ output A,
+ output cout
+ );
+
+`ifndef BUG
+assign cout =  cin / y;
+assign A =  cin * x;
+`else
+assign {cout,A} =  cin - y * x;
+`endif
+
+endmodule

backends/write_firrtl_pow/testbench.v

+module testbench;
+    reg [2:0] in;
+
+	wire patt_out,out;
+	wire patt_carry_out,carryout;
+
+    initial begin
+        // $dumpfile("testbench.vcd");
+        // $dumpvars(0, testbench);
+
+        #5 in = 0;
+        repeat (10000) begin
+            #5 in = in + 1;
+        end
+
+        $display("OKAY");
+    end
+
+    top uut (
+	.x(in[0]),
+	.y(in[1]),
+	.cin(in[2]),
+	.A(out),
+	.cout(carryout)
+	);
+
+	//assign patt_carry_out =  in[2] ** in[1];
+	assign patt_out =  in[2] * in[0];
+
+	assert_comb out_test(.A(patt_out), .B(out));
+	//assert_comb carry_test(.A(patt_carry_out), .B(carryout));
+
+endmodule

backends/write_firrtl_pow/top.v

+module top
+(
+ input x,
+ input y,
+ input cin,
+
+ output A,
+ output cout
+ );
+
+`ifndef BUG
+ wire pow,p,n;
+
+assign pow = 2 ** y;
+
+assign p =  +x;
+assign n =  -x;
+assign A =  cin * x;
+`else
+assign {cout,A} =  cin - y * x;
+`endif
+
+endmodule

backends/write_firrtl_sub/testbench.v

+module testbench;
+    reg [2:0] in;
+
+	wire patt_out,out;
+	wire patt_carry_out,carryout;
+
+    initial begin
+        // $dumpfile("testbench.vcd");
+        // $dumpvars(0, testbench);
+
+        #5 in = 0;
+        repeat (10000) begin
+            #5 in = in + 1;
+        end
+
+        $display("OKAY");
+    end
+
+    top uut (
+	.x(in[0]),
+	.y(in[1]),
+	.cin(in[2]),
+	.A(out),
+	.cout(carryout)
+	);
+
+	assign patt_carry_out =  in[2] % in[1];
+	assign patt_out =  in[2] - in[0];
+
+	assert_comb out_test(.A(patt_out), .B(out));
+	//assert_comb carry_test(.A(patt_carry_out), .B(carryout));
+
+endmodule

backends/write_firrtl_sub/top.v

+module top
+(
+ input x,
+ input y,
+ input cin,
+
+ output A,
+ output cout
+ );
+
+`ifndef BUG
+assign cout =  cin % y;
+assign A =  cin - x;
+`else
+assign {cout,A} =  cin - y * x;
+`endif
+
+endmodule

misc/Makefile

@@ -208,9 +208,9 @@ $(eval $(call template,tee_error, tee_o_cant_create_file tee_a_cant_create_file
 $(eval $(call template,test_autotb, test_autotb test_autotb_file test_autotb_n test_autotb_seed))
 
 #abc
-$(eval $(call template,abc, abc_D abc_g_aig abc_g_cmos2 abc_g_simple abc_mux16 abc_mux4 abc_mux8 abc_S abc_dff abc_constr_liberty))
-$(eval $(call template,abc_dff, abc_D abc_g_aig abc_g_cmos2 abc_g_simple abc_mux16 abc_mux4 abc_mux8 abc_S abc_dff abc_constr_liberty))
-$(eval $(call template,abc_mux, abc_D abc_g_aig abc_g_cmos2 abc_g_simple abc_mux16 abc_mux4 abc_mux8 abc_S abc_dff abc_constr_liberty))
+$(eval $(call template,abc, abc_D abc_g_aig abc_g_cmos2 abc_g_cmos abc_g_simple abc_mux16 abc_mux4 abc_mux8 abc_S abc_dff abc_constr_liberty))
+$(eval $(call template,abc_dff, abc_D abc_g_aig abc_g_cmos2 abc_g_cmos abc_g_simple abc_mux16 abc_mux4 abc_mux8 abc_S abc_dff abc_constr_liberty))
+$(eval $(call template,abc_mux, abc_D abc_g_aig abc_g_cmos2 abc_g_cmos abc_g_simple abc_mux16 abc_mux4 abc_mux8 abc_S abc_dff abc_constr_liberty))
 $(eval $(call template,abc_error, abc_cannot_open abc_constr_no_liberty abc_lut_liberty abc_unsup_gate_type abc_inv_luts_synt  abc_return_code abc_clk_domain_not_found abc_script_o abc_script_top))
 
 #hilomap

misc/scripts/abc_g_cmos.ys

+read_verilog ../top.v
+synth -top top
+tee -o result.log abc -g cmos