Review and update tests for issues 1091-1231

regression/Makefile

@@ -17,46 +17,6 @@ clean::
 ))
 endef
 
-
-#issue_01091
-$(eval $(call template,issue_01091,issue_01091))
-
-#issue_01093
-$(eval $(call template,issue_01093,issue_01093))
-
-#issue_01115
-$(eval $(call template,issue_01115,issue_01115))
-
-#issue_01118
-$(eval $(call template,issue_01118,issue_01118))
-
-#issue_01128
-$(eval $(call template,issue_01128,issue_01128))
-
-#issue_01131
-$(eval $(call template,issue_01131,issue_01131))
-
-#issue_01132
-$(eval $(call template,issue_01132,issue_01132))
-
-#issue_01135
-$(eval $(call template,issue_01135,issue_01135))
-
-#issue_01144
-$(eval $(call template,issue_01144,issue_01144))
-
-#issue_01145
-$(eval $(call template,issue_01145,issue_01145))
-
-#issue_01220
-$(eval $(call template,issue_01220,issue_01220))
-
-#issue_01223
-$(eval $(call template,issue_01223,issue_01223))
-
-#issue_01231
-$(eval $(call template,issue_01231,issue_01231))
-
 #issue_01243
 $(eval $(call template,issue_01243,issue_01243))
 
@@ -79,26 +39,7 @@ $(eval $(call template,issue_01372,issue_01372))
 
 
 #Still open bugs (should be failed):
-#issue_01126
-$(eval $(call template,issue_01126,issue_01126))
-
-#issue_01161
-$(eval $(call template,issue_01161,issue_01161))
-
-#issue_01193
-$(eval $(call template,issue_01193,issue_01193))
-
-#issue_01206
-$(eval $(call template,issue_01206,issue_01206))
-
-#issue_01216
-$(eval $(call template,issue_01216,issue_01216))
-
-#issue_01217
-$(eval $(call template,issue_01217,issue_01217))
 
-#issue_01225
-$(eval $(call template,issue_01225,issue_01225))
 
 #issue_01259
 $(eval $(call template,issue_01259,issue_01259))

regression/scripts/issue_01131.ys

-tee -o result.log read_verilog ../top.v

regression/scripts/issue_01217.ys

-tee -o result.log read_verilog ../top.v

regression_revised/Makefile

@@ -443,6 +443,46 @@ $(eval $(call template,issue_01070,issue_01070))
 #issue_01084
 $(eval $(call template,issue_01084,issue_01084))
 
+#issue_01091
+$(eval $(call template,issue_01091,issue_01091))
+
+#issue_01093
+$(eval $(call template,issue_01093,issue_01093_fail))
+
+#issue_01115
+$(eval $(call template,issue_01115,issue_01115))
+
+#issue_01118
+$(eval $(call template,issue_01118,issue_01118))
+
+#issue_01128
+$(eval $(call template,issue_01128,issue_01128))
+
+#issue_01131
+$(eval $(call template,issue_01131,issue_01131_fail))
+
+#issue_01132
+$(eval $(call template,issue_01132,issue_01132))
+
+#issue_01135
+$(eval $(call template,issue_01135,issue_01135))
+
+#issue_01144
+$(eval $(call template,issue_01144,issue_01144_fail))
+
+#issue_01145
+$(eval $(call template,issue_01145,issue_01145))
+
+#issue_01220
+$(eval $(call template,issue_01220,issue_01220))
+
+#issue_01223
+$(eval $(call template,issue_01223,issue_01223))
+
+#issue_01231
+$(eval $(call template,issue_01231,issue_01231))
+
+
 #Still open bugs (should be failed):
 #issue_00329
 $(eval $(call template,issue_00329,issue_00329))
@@ -453,4 +493,25 @@ $(eval $(call template,issue_00623,issue_00623))
 #issue_00656
 $(eval $(call template,issue_00656,issue_00656))
 
+#issue_01126
+$(eval $(call template,issue_01126,issue_01126))
+
+#issue_01161
+$(eval $(call template,issue_01161,issue_01161))
+
+#issue_01193
+$(eval $(call template,issue_01193,issue_01193))
+
+#issue_01206
+$(eval $(call template,issue_01206,issue_01206))
+
+#issue_01216
+$(eval $(call template,issue_01216,issue_01216))
+
+#issue_01217
+$(eval $(call template,issue_01217,issue_01217))
+
+#issue_01225
+$(eval $(call template,issue_01225,issue_01225))
+
 .PHONY: all clean

regression/scripts/issue_01091.ys → regression_revised/issue_01091/issue_01091.ys

@@ -3,6 +3,5 @@ proc
 opt
 techmap
 muxcover -nopartial
-stat
 select -assert-count 1 t:$_MUX4_
 select -assert-none t:$_MUX4_ %% t:* %D

regression_revised/issue_01093/issue_01093_fail.pat

+ERROR: Design has no top module, use the 'hierarchy' command to specify one.

regression/scripts/issue_01093.ys → regression_revised/issue_01093/issue_01093_fail.ys

 read_verilog ../top.v
 proc
-tee -o result.log sim
+sim

regression_revised/issue_01115/issue_01115.pat

+connect \\\o 33'xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx

regression/scripts/issue_01115.ys → regression_revised/issue_01115/issue_01115.ys

 read_verilog ../top.v
 proc
-tee -o result.log dump
+tee -o result.out dump

regression/scripts/issue_01144.ys → regression_revised/issue_01118/issue_01118.ys

 read_verilog ../top.v
-tee -o result.log stat

regression_revised/issue_01126/issue_01126.pat

+assign d = c\\[5:0\\]

regression/scripts/issue_01126.ys → regression_revised/issue_01126/issue_01126.ys

 read_verilog ../top.v
-write_verilog result.log
+write_verilog result.out
 #write_json test_synth.json

regression_revised/issue_01131/issue_01131_fail.pat

+ERROR: Value conversion failed:

regression/scripts/issue_01118.ys → regression_revised/issue_01131/issue_01131_fail.ys

 read_verilog ../top.v
-proc
-tee -o result.log dump

regression/scripts/issue_01216.ys → regression_revised/issue_01144/issue_01144_fail.ys

 read_verilog ../top.v
-tee -o result.log synth_ice40 -top top
-tee -o result.log write_blif test.blif

regression_revised/issue_01161/issue_01161.pat

+assign z0 = b

regression/scripts/issue_01161.ys → regression_revised/issue_01161/issue_01161.ys

@@ -7,4 +7,4 @@ write_verilog result_no_opt.log
 
 equiv_opt -assert opt_clean
 opt_clean
-write_verilog result.log
+write_verilog result.out

regression/scripts/issue_01193.ys → regression_revised/issue_01193/issue_01193.ys

 read_verilog -sv ../top.v
 proc
 select -assert-count 0 t:$dlatch
-tee -o result.log dump

regression/scripts/issue_01206.ys → regression_revised/issue_01206/issue_01206.ys

 read_ilang ../top.il
-tee -o result.log proc_init
+proc_init

regression_revised/issue_01216/issue_01216.ys

+read_verilog ../top.v
+synth_ice40 -top top
+write_blif test.blif

regression_revised/issue_01217/issue_01217.ys

+tee -o result.out read_verilog ../top.v

regression_revised/issue_01217/issue_01217_n.pat

+is implicitly declared.