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lvzhengyang
sv2v
Commits
3979d294
Commit
3979d294
authored
Oct 12, 2019
by
Zachary Snow
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consistent size casting behavior
- also adds $clog2 localparam substitution to Simplify
parent
79f9d21f
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Showing
5 changed files
with
38 additions
and
47 deletions
+38
-47
src/Convert/Enum.hs
+1
-8
src/Convert/Simplify.hs
+21
-15
src/Language/SystemVerilog/AST/Expr.hs
+0
-24
test/basic/cast.sv
+8
-0
test/basic/cast.v
+8
-0
No files found.
src/Convert/Enum.hs
View file @
3979d294
...
...
@@ -93,17 +93,10 @@ toItem :: EnumItem -> PackageItem
toItem
((
mr
,
x
),
v
)
=
Decl
$
Param
Localparam
itemType
x
v'
where
v'
=
if
mr
==
Nothing
then
simplify
v
else
sizedExpr
x
(
rangeSize
r
)
(
simplify
v
)
v'
=
simplify
v
rs
=
maybe
[]
(
\
a
->
[
a
])
mr
r
=
defaultRange
mr
itemType
=
Implicit
Unspecified
rs
defaultRange
::
Maybe
Range
->
Range
defaultRange
Nothing
=
(
Number
"0"
,
Number
"0"
)
defaultRange
(
Just
r
)
=
r
toBaseType
::
Maybe
Type
->
Type
toBaseType
Nothing
=
defaultType
toBaseType
(
Just
(
Implicit
_
rs
))
=
...
...
src/Convert/Simplify.hs
View file @
3979d294
...
...
@@ -49,31 +49,37 @@ traverseExprM = traverseNestedExprsM $ stately convertExpr
convertExpr
::
Info
->
Expr
->
Expr
convertExpr
info
(
Cast
(
Right
c
)
e
)
=
case
c'
of
Number
_
->
if
sized
==
e
then
Cast
(
Right
c'
)
e
else
sized
_
->
Cast
(
Right
c'
)
e
Cast
(
Right
c'
)
e
where
c'
=
simplify
$
traverseNestedExprs
(
substitute
info
)
(
simplify
c
)
sized
=
sizedExpr
""
c'
e
c'
=
simplify
$
substitute
info
c
convertExpr
info
(
DimFn
f
v
e
)
=
DimFn
f
v
e'
where
e'
=
simplify
$
traverseNestedExprs
(
substitute
info
)
e
e'
=
simplify
$
substitute
info
e
convertExpr
info
(
Call
Nothing
"$clog2"
(
Args
[
Just
e
]
[]
))
=
if
clog2'
==
clog2
then
clog2
else
clog2'
where
e'
=
simplify
$
substitute
info
e
clog2
=
Call
Nothing
"$clog2"
(
Args
[
Just
e'
]
[]
)
clog2'
=
simplify
clog2
convertExpr
info
(
Mux
cc
aa
bb
)
=
if
before
==
after
then
Mux
cc
aa
bb
else
simplify
$
Mux
after
aa
bb
where
before
=
traverseNestedExprs
(
substitute
info
)
(
simplify
cc
)
before
=
substitute
info
cc
after
=
simplify
before
convertExpr
_
other
=
other
substitute
::
Info
->
Expr
->
Expr
substitute
info
(
Ident
x
)
=
case
Map
.
lookup
x
info
of
Nothing
->
Ident
x
Just
e
->
e
substitute
_
other
=
other
substitute
info
expr
=
traverseNestedExprs
substitute'
$
simplify
expr
where
substitute'
::
Expr
->
Expr
substitute'
(
Ident
x
)
=
case
Map
.
lookup
x
info
of
Nothing
->
Ident
x
Just
e
->
e
substitute'
other
=
other
src/Language/SystemVerilog/AST/Expr.hs
View file @
3979d294
...
...
@@ -19,7 +19,6 @@ module Language.SystemVerilog.AST.Expr
,
rangeSize
,
endianCondExpr
,
endianCondRange
,
sizedExpr
,
dimensionsSize
,
readNumber
)
where
...
...
@@ -271,30 +270,6 @@ endianCondRange r r1 r2 =
,
endianCondExpr
r
(
snd
r1
)
(
snd
r2
)
)
-- attempts to make a number literal have an explicit size
sizedExpr
::
Identifier
->
Expr
->
Expr
->
Expr
sizedExpr
x
s
(
Number
n
)
=
if
size
/=
show
resSize
then
error
$
"literal "
++
show
n
++
" for "
++
show
x
++
" doesn't have size "
++
show
size
else
Number
res
where
size
=
case
simplify
s
of
Number
v
->
v
other
->
error
$
"could not simplify sizedExpr: "
++
show
other
unticked
=
case
n
of
'
\'
'
:
rest
->
rest
rest
->
rest
resSize
=
(
read
$
takeWhile
(
/=
'
\'
')
res
)
::
Int
res
=
case
readMaybe
unticked
::
Maybe
Int
of
Nothing
->
if
unticked
==
n
then
n
else
size
++
n
Just
num
->
size
++
"'d"
++
show
num
sizedExpr
_
_
e
=
e
dimensionsSize
::
[
Range
]
->
Expr
dimensionsSize
ranges
=
simplify
$
...
...
test/basic/cast.sv
View file @
3979d294
module
top
;
parameter
WIDTH
=
32
;
initial
begin
logic
[
31
:
0
]
w
=
1234
;
...
...
@@ -22,7 +23,14 @@ module top;
$
display
(
"%0d %0d"
,
y
,
($
clog2
(
WIDTH
))
'
(
y
))
;
$
display
(
"%0d %0d"
,
z
,
($
clog2
(
WIDTH
))
'
(
z
))
;
end
localparam
bit
foo
=
'0
;
localparam
logic
[
31
:
0
]
bar
=
32
'
(
foo
)
;
initial
$
display
(
"%b %b"
,
foo
,
bar
)
;
initial
begin
$
display
(
"%b"
,
5
'
(
'1
))
;
$
display
(
"%b"
,
5
'
(
1
'
sb1
))
;
end
endmodule
test/basic/cast.v
View file @
3979d294
module
top
;
initial
begin
:
foo_block
reg
[
31
:
0
]
w
;
reg
signed
[
31
:
0
]
x
;
...
...
@@ -25,7 +26,14 @@ module top;
$
display
(
"%0d %0d"
,
y
,
$
signed
(
y
[
4
:
0
]))
;
$
display
(
"%0d %0d"
,
z
,
z
[
4
:
0
])
;
end
localparam
[
0
:
0
]
foo
=
0
;
localparam
[
31
:
0
]
bar
=
32'b0
;
initial
$
display
(
"%b %b"
,
foo
,
bar
)
;
initial
begin
$
display
(
"%b"
,
5
'
sb11111
)
;
$
display
(
"%b"
,
5
'
sb11111
)
;
end
endmodule
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