upgrade to GHC 9.6.4

src/Convert/AlwaysKW.hs

@@ -12,9 +12,11 @@
 
 module Convert.AlwaysKW (convert) where
 
+import Control.Monad (when, zipWithM, (>=>))
 import Control.Monad.State.Strict
 import Control.Monad.Writer.Strict
 import Data.Maybe (fromMaybe, mapMaybe)
+import Data.Monoid (Any(Any), getAny)
 
 import Convert.Scoper
 import Convert.Traverse

src/Convert/Cast.hs

@@ -27,9 +27,11 @@
 
 module Convert.Cast (convert) where
 
+import Control.Monad (when)
 import Control.Monad.Writer.Strict
 import Data.List (isPrefixOf)
 import Data.Maybe (isJust)
+import Data.Monoid (Any(Any), getAny)
 
 import Convert.ExprUtils
 import Convert.Scoper

src/Convert/GenvarName.hs

@@ -7,6 +7,7 @@
 
 module Convert.GenvarName (convert) where
 
+import Control.Monad (when)
 import Control.Monad.State.Strict
 import Control.Monad.Writer.Strict
 import Data.Functor ((<&>))

src/Convert/Inside.hs

@@ -21,6 +21,7 @@ import Language.SystemVerilog.AST
 
 import Control.Monad.Writer
 import Data.Maybe (fromMaybe)
+import Data.Monoid (Any(Any), getAny)
 
 convert :: [AST] -> [AST]
 convert = map $ traverseDescriptions $ traverseModuleItems convertModuleItem

src/Convert/Interface.hs

@@ -8,6 +8,8 @@ module Convert.Interface (convert, disambiguate) where
 
 import Data.List (intercalate, (\\))
 import Data.Maybe (isJust, isNothing, mapMaybe)
+import Data.Monoid (Any(Any), getAny)
+import Control.Monad (when, (>=>))
 import Control.Monad.Writer.Strict
 import Text.Read (readMaybe)
 import qualified Data.Map.Strict as Map

src/Convert/Jump.hs

@@ -11,6 +11,7 @@ module Convert.Jump (convert) where
 
 import Control.Monad.State.Strict
 import Control.Monad.Writer.Strict
+import Data.Monoid (Any(Any), getAny)
 
 import Convert.Traverse
 import Language.SystemVerilog.AST

src/Convert/Logic.hs

@@ -25,6 +25,7 @@
 
 module Convert.Logic (convert) where
 
+import Control.Monad (when)
 import Control.Monad.Writer.Strict
 import qualified Data.Map.Strict as Map
 import qualified Data.Set as Set

src/Convert/Package.hs

@@ -23,6 +23,7 @@ module Convert.Package
     , prefixItems
     ) where
 
+import Control.Monad (when, (>=>))
 import Control.Monad.State.Strict
 import Control.Monad.Writer.Strict
 import Data.Functor ((<&>))

src/Convert/ParamNoDefault.hs

@@ -14,6 +14,7 @@
 
 module Convert.ParamNoDefault (convert) where
 
+import Control.Monad (when)
 import Control.Monad.Writer.Strict
 import Data.List (intercalate)
 import qualified Data.Map.Strict as Map

src/Convert/ParamType.hs

@@ -10,6 +10,7 @@ import Control.Monad.Writer.Strict
 import Data.Either (isRight, lefts)
 import qualified Data.Map.Strict as Map
 import qualified Data.Set as Set
+import Data.Monoid (Any(Any), getAny)
 
 import Convert.Traverse
 import Language.SystemVerilog.AST

src/Convert/Scoper.hs

@@ -70,6 +70,7 @@ module Convert.Scoper
     , LookupResult
     ) where
 
+import Control.Monad (join, when)
 import Control.Monad.State.Strict
 import Data.List (findIndices, intercalate, isPrefixOf, partition)
 import Data.Maybe (isNothing)

src/Convert/StringParam.hs

@@ -11,6 +11,7 @@
 
 module Convert.StringParam (convert) where
 
+import Control.Monad (when)
 import Control.Monad.Writer.Strict
 import Data.Maybe (mapMaybe)
 import qualified Data.Set as Set

src/Convert/StructConst.hs

@@ -9,6 +9,7 @@
 
 module Convert.StructConst (convert) where
 
+import Control.Monad (join, mplus, when)
 import Control.Monad.State.Strict
 import Data.Maybe (fromMaybe)
 import Data.Tuple (swap)

src/Convert/Traverse.hs

@@ -112,6 +112,7 @@ module Convert.Traverse
 
 import Data.Bitraversable (bimapM)
 import Data.Functor.Identity (Identity, runIdentity)
+import Control.Monad ((>=>))
 import Control.Monad.Writer.Strict
 import Language.SystemVerilog.AST
 

src/Convert/UnbasedUnsized.hs

@@ -20,6 +20,7 @@ import Control.Monad.Writer.Strict
 import Data.Either (isLeft)
 import Data.Maybe (isNothing, mapMaybe)
 import qualified Data.Map.Strict as Map
+import Data.Monoid (Any(Any), getAny)
 
 import Convert.Package (inject, prefixItems)
 import Convert.Traverse

src/Convert/UnnamedGenBlock.hs

@@ -10,6 +10,7 @@
 
 module Convert.UnnamedGenBlock (convert) where
 
+import Control.Monad (when)
 import Control.Monad.State.Strict
 import Data.List (isPrefixOf)
 

src/Convert/UnpackedArray.hs

@@ -11,6 +11,7 @@
 
 module Convert.UnpackedArray (convert) where
 
+import Control.Monad (when, (>=>))
 import Control.Monad.State.Strict
 import qualified Data.Map.Strict as Map
 

src/Language/SystemVerilog/Parser.hs

@@ -6,6 +6,8 @@ module Language.SystemVerilog.Parser
     , Config(..)
     ) where
 
+import Control.Monad (when)
+import Control.Monad.IO.Class (liftIO)
 import Control.Monad.Except
 import Data.List (elemIndex)
 import Data.Maybe (catMaybes)

src/Language/SystemVerilog/Parser/Parse.y

@@ -15,6 +15,7 @@
 {-# LANGUAGE BlockArguments #-}
 module Language.SystemVerilog.Parser.Parse (parse) where
 
+import Control.Monad (when)
 import Control.Monad.Except
 import Control.Monad.State.Strict
 import Data.Maybe (catMaybes, fromMaybe)

src/Language/SystemVerilog/Parser/Preprocess.hs

@@ -14,6 +14,7 @@ module Language.SystemVerilog.Parser.Preprocess
     , Contents
     ) where
 
+import Control.Monad (when)
 import Control.Monad.Except
 import Control.Monad.State.Strict
 import Data.Char (ord)

stack.yaml

-resolver: lts-21.25
+resolver: lts-22.19
 pvp-bounds: both
 ghc-options:
     $locals: -j2

stack.yaml.lock

@@ -6,7 +6,7 @@
 packages: []
 snapshots:
 - completed:
-    sha256: a81fb3877c4f9031e1325eb3935122e608d80715dc16b586eb11ddbff8671ecd
-    size: 640086
-    url: https://raw.githubusercontent.com/commercialhaskell/stackage-snapshots/master/lts/21/25.yaml
-  original: lts-21.25
+    sha256: e5cac927cf7ccbd52aa41476baa68b88c564ee6ddc3bc573dbf4210069287fe7
+    size: 713340
+    url: https://raw.githubusercontent.com/commercialhaskell/stackage-snapshots/master/lts/22/19.yaml
+  original: lts-22.19