This patch is part of a series to implement the SIMD32 ACLE intrinsics [1].
The interesting parts implementation-wise involve adding support for setting and reading
the Q bit for saturation and the GE-bits for the packed SIMD instructions.
That will come in a later patch.

For now, this patch implements the other intrinsics that don't need anything special ;
just a mapping from arm_acle.h function to builtin to RTL expander+unspec.

I've compressed as many as I could with iterators so that we end up needing only 3
new define_insns.

Bootstrapped and tested on arm-none-linux-gnueabihf.

[1] https://developer.arm.com/docs/101028/latest/data-processing-intrinsics

	* config/arm/arm.md (arm_<simd32_op>): New define_insn.
	(arm_<sup>xtb16): Likewise.
	(arm_usada8): Likewise.
	* config/arm/arm_acle.h (__qadd8, __qsub8, __shadd8, __shsub8,
	__uhadd8, __uhsub8, __uqadd8, __uqsub8, __qadd16, __qasx, __qsax,
	__qsub16, __shadd16, __shasx, __shsax, __shsub16, __uhadd16, __uhasx,
	__uhsax, __uhsub16, __uqadd16, __uqasx, __uqsax, __uqsub16, __sxtab16,
	__sxtb16, __uxtab16, __uxtb16): Define.
	* config/arm/arm_acle_builtins.def: Define builtins for the above.
	* config/arm/unspecs.md: Define unspecs for the above.
	* config/arm/iterators.md (SIMD32_NOGE_BINOP): New int_iterator.
	(USXTB16): Likewise.
	(simd32_op): New int_attribute.
	(sup): Handle UNSPEC_SXTB16, UNSPEC_UXTB16.
	* doc/sourcebuild.exp (arm_simd32_ok): Document.

	* lib/target-supports.exp
	(check_effective_target_arm_simd32_ok_nocache): New procedure.
	(check_effective_target_arm_simd32_ok): Likewise.
	(add_options_for_arm_simd32): Likewise.
	* gcc.target/arm/acle/simd32.c: New test.

From-SVN: r276146