This patch is part of a series that fixes ambiguous attribute
uses in .md files, i.e. cases in which attributes didn't use
<ITER:ATTR> to specify an iterator, and in which <ATTR> could
have different values depending on the iterator chosen.

I think this is a genuine bugfix for Thumb-1, since previously the
LDREX width was taken from the SImode success result rather than the
memory mode:

-#define HAVE_atomic_compare_and_swapt1qi_1 ((TARGET_HAVE_LDREX && TARGET_HAVE_MEMORY_BARRIER) && (TARGET_THUMB1))
-#define HAVE_atomic_compare_and_swapt1hi_1 ((TARGET_HAVE_LDREX && TARGET_HAVE_MEMORY_BARRIER) && (TARGET_THUMB1))
-#define HAVE_atomic_compare_and_swapt1di_1 ((TARGET_HAVE_LDREX && TARGET_HAVE_MEMORY_BARRIER) && (TARGET_THUMB1))
+#define HAVE_atomic_compare_and_swapt1qi_1 ((TARGET_HAVE_LDREXBH && TARGET_HAVE_MEMORY_BARRIER) && (TARGET_THUMB1))
+#define HAVE_atomic_compare_and_swapt1hi_1 ((TARGET_HAVE_LDREXBH && TARGET_HAVE_MEMORY_BARRIER) && (TARGET_THUMB1))
+#define HAVE_atomic_compare_and_swapt1di_1 ((TARGET_HAVE_LDREXD && ARM_DOUBLEWORD_ALIGN \
+       && TARGET_HAVE_MEMORY_BARRIER) && (TARGET_THUMB1))

The same goes for the predicate and constraints in
@atomic_compare_and_swapt1di_1, which previously used the
SI values from the success result.

2019-07-06  Richard Sandiford  <richard.sandiford@arm.com>

gcc/
	* config/arm/sync.md
	(@atomic_compare_and_swap<CCSI:arch><NARROW:mode>_1): Use
	<NARROW:sync_predtab> instead of (implicitly) <CCSI:sync_predtab>.
	(@atomic_compare_and_swap<CCSI:arch><SIDI:mode>_1): Likewise
	<SIDI:sync_predtab>.  Use <SIDI:cas_cmp_operand> and
	<SIDI:cas_cmp_str>.

From-SVN: r273158