Commit 193bee75 by Richard Sandiford Committed by Richard Sandiford

[arm] Fix ambiguous .md attribute uses

This patch is part of a series that fixes ambiguous attribute
uses in .md files, i.e. cases in which attributes didn't use
<ITER:ATTR> to specify an iterator, and in which <ATTR> could
have different values depending on the iterator chosen.

I think this is a genuine bugfix for Thumb-1, since previously the
LDREX width was taken from the SImode success result rather than the
memory mode:

-#define HAVE_atomic_compare_and_swapt1qi_1 ((TARGET_HAVE_LDREX && TARGET_HAVE_MEMORY_BARRIER) && (TARGET_THUMB1))
-#define HAVE_atomic_compare_and_swapt1hi_1 ((TARGET_HAVE_LDREX && TARGET_HAVE_MEMORY_BARRIER) && (TARGET_THUMB1))
-#define HAVE_atomic_compare_and_swapt1di_1 ((TARGET_HAVE_LDREX && TARGET_HAVE_MEMORY_BARRIER) && (TARGET_THUMB1))
+#define HAVE_atomic_compare_and_swapt1qi_1 ((TARGET_HAVE_LDREXBH && TARGET_HAVE_MEMORY_BARRIER) && (TARGET_THUMB1))
+#define HAVE_atomic_compare_and_swapt1hi_1 ((TARGET_HAVE_LDREXBH && TARGET_HAVE_MEMORY_BARRIER) && (TARGET_THUMB1))
+#define HAVE_atomic_compare_and_swapt1di_1 ((TARGET_HAVE_LDREXD && ARM_DOUBLEWORD_ALIGN \
+       && TARGET_HAVE_MEMORY_BARRIER) && (TARGET_THUMB1))

The same goes for the predicate and constraints in
@atomic_compare_and_swapt1di_1, which previously used the
SI values from the success result.

2019-07-06  Richard Sandiford  <richard.sandiford@arm.com>

gcc/
	* config/arm/sync.md
	(@atomic_compare_and_swap<CCSI:arch><NARROW:mode>_1): Use
	<NARROW:sync_predtab> instead of (implicitly) <CCSI:sync_predtab>.
	(@atomic_compare_and_swap<CCSI:arch><SIDI:mode>_1): Likewise
	<SIDI:sync_predtab>.  Use <SIDI:cas_cmp_operand> and
	<SIDI:cas_cmp_str>.

From-SVN: r273158
parent 1f52d1a8
2019-07-06 Richard Sandiford <richard.sandiford@arm.com>
* config/arm/sync.md
(@atomic_compare_and_swap<CCSI:arch><NARROW:mode>_1): Use
<NARROW:sync_predtab> instead of (implicitly) <CCSI:sync_predtab>.
(@atomic_compare_and_swap<CCSI:arch><SIDI:mode>_1): Likewise
<SIDI:sync_predtab>. Use <SIDI:cas_cmp_operand> and
<SIDI:cas_cmp_str>.
2019-07-06 Jakub Jelinek <jakub@redhat.com> 2019-07-06 Jakub Jelinek <jakub@redhat.com>
* omp-low.c (struct omp_context): Add for_simd_scan_phase member. * omp-low.c (struct omp_context): Add for_simd_scan_phase member.
......
...@@ -201,7 +201,7 @@ ...@@ -201,7 +201,7 @@
(match_operand:SI 7 "const_int_operand")] ;; mod_f (match_operand:SI 7 "const_int_operand")] ;; mod_f
VUNSPEC_ATOMIC_CAS)) VUNSPEC_ATOMIC_CAS))
(clobber (match_scratch:SI 8 "=&r,X,X,X"))] (clobber (match_scratch:SI 8 "=&r,X,X,X"))]
"<sync_predtab>" "<NARROW:sync_predtab>"
"#" "#"
"&& reload_completed" "&& reload_completed"
[(const_int 0)] [(const_int 0)]
...@@ -225,14 +225,14 @@ ...@@ -225,14 +225,14 @@
(match_operand:SIDI 2 "mem_noofs_operand" "+Ua,Ua,Ua,Ua")) ;; memory (match_operand:SIDI 2 "mem_noofs_operand" "+Ua,Ua,Ua,Ua")) ;; memory
(set (match_dup 2) (set (match_dup 2)
(unspec_volatile:SIDI (unspec_volatile:SIDI
[(match_operand:SIDI 3 "<cas_cmp_operand>" "<cas_cmp_str>,lIL*h,J,*r") ;; expect [(match_operand:SIDI 3 "<SIDI:cas_cmp_operand>" "<SIDI:cas_cmp_str>,lIL*h,J,*r") ;; expect
(match_operand:SIDI 4 "s_register_operand" "r,r,r,r") ;; desired (match_operand:SIDI 4 "s_register_operand" "r,r,r,r") ;; desired
(match_operand:SI 5 "const_int_operand") ;; is_weak (match_operand:SI 5 "const_int_operand") ;; is_weak
(match_operand:SI 6 "const_int_operand") ;; mod_s (match_operand:SI 6 "const_int_operand") ;; mod_s
(match_operand:SI 7 "const_int_operand")] ;; mod_f (match_operand:SI 7 "const_int_operand")] ;; mod_f
VUNSPEC_ATOMIC_CAS)) VUNSPEC_ATOMIC_CAS))
(clobber (match_scratch:SI 8 "=&r,X,X,X"))] (clobber (match_scratch:SI 8 "=&r,X,X,X"))]
"<sync_predtab>" "<SIDI:sync_predtab>"
"#" "#"
"&& reload_completed" "&& reload_completed"
[(const_int 0)] [(const_int 0)]
......
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