1. 10 Apr, 2020 6 commits
  2. 09 Apr, 2020 26 commits
    • PR fortran/87923 -- fix ICE when resolving I/O tags and simplify io.c · 44facdb7
      2020-04-06  Fritz Reese  <foreese@gcc.gnu.org>
      
      This patch reorganizes I/O checking code. Checks which were done in the
      matching phase which do not affect the match result are moved to the
      resolution phase. Checks which were duplicated in both the matching phase
      and resolution phase have been reduced to one check in the resolution phase.
      
      Another section of code which used a global async_io_dt flag to check for
      and assign the asynchronous attribute to variables used in asynchronous I/O
      has been simplified.
      
      Furthermore, this patch improves error reporting and expands test coverage
      of I/O tags:
      
       - "TAG must be an initialization expression" reported by io.c
         (check_io_constraints) is replaced with an error from expr.c
         (gfc_reduce_init_expr) indicating _why_ the expression is not a valid
         initialization expression.
      
       - Several distinct error messages regarding the check for scalar
         + character + default kind have been unified to one message reported by
         resolve_tag or check_*_constraints.
      
      gcc/fortran/ChangeLog:
      
      2020-04-09  Fritz Reese  <foreese@gcc.gnu.org>
      
      	PR fortran/87923
      	* gfortran.h (gfc_resolve_open, gfc_resolve_close): Add
      	locus parameter.
      	(gfc_resolve_dt): Add code parameter.
      	* io.c (async_io_dt, check_char_variable, is_char_type): Removed.
      	(resolve_tag_format): Add locus to error message regarding
      	zero-sized array in FORMAT tag.
      	(check_open_constraints, check_close_constraints): New functions
      	called at resolution time.
      	(gfc_match_open, gfc_match_close, match_io): Move checks which don't
      	affect the match result to new functions check_open_constraints,
      	check_close_constraints, check_io_constraints.
      	(gfc_resolve_open, gfc_resolve_close): Call new functions
      	check_open_constraints, check_close_constraints after all tags have
      	been independently resolved.  Remove duplicate constraints which are
      	already verified by resolve_tag. Explicitly pass locus to all error
      	reports.
      	(compare_to_allowed_values): Add locus parameter and provide
      	explicit locus all error reports.
      	(match_open_element, match_close_element, match_file_element,
      	match_dt_element, match_inquire_element): Remove redundant special
      	cases for ASYNCHRONOUS and IOMSG tags.
      	(gfc_resolve_dt): Remove redundant special case for format
      	expression.  Call check_io_constraints, forwarding an I/O list as
      	the io_code parameter if present.
      	(check_io_constraints): Change return type to bool. Pass explicit
      	locus to error reports. Move generic checks after tag-specific
      	checks, since errors are no longer buffered.  Move simplification of
      	format string to match_io.  Remove redundant checks which are
      	verified by resolve_tag.  Remove usage of async_io_dt flag and
      	explicitly mark symbols used in asynchronous I/O with the
      	asynchronous attribute.
      	* resolve.c (resolve_transfer, resolve_fl_namelist): Remove checks
      	for async_io_dt flag. This is now done in io.c
      	(check_io_constraints).
      	(gfc_resolve_code): Pass code locus to gfc_resolve_open,
      	gfc_resolve_close, gfc_resolve_dt.
      
      gcc/testsuite/ChangeLog:
      
      2020-04-09  Fritz Reese  <foreese@gcc.gnu.org>
      
      	PR fortran/87923
      	* gfortran.dg/f2003_io_8.f03: Fix expected error messages.
      	* gfortran.dg/io_constraints_8.f90: Likewise.
      	* gfortran.dg/iomsg_2.f90: Likewise.
      	* gfortran.dg/pr66725.f90: Likewise.
      	* gfortran.dg/pr88205.f90: Likewise.
      	* gfortran.dg/write_check4.f90: Likewise.
      	* gfortran.dg/asynchronous_5.f03: New test.
      	* gfortran.dg/io_constraints_15.f90: Likewise.
      	* gfortran.dg/io_constraints_16.f90: Likewise.
      	* gfortran.dg/io_constraints_17.f90: Likewise.
      	* gfortran.dg/io_constraints_18.f90: Likewise.
      	* gfortran.dg/io_tags_1.f90: Likewise.
      	* gfortran.dg/io_tags_10.f90: Likewise.
      	* gfortran.dg/io_tags_2.f90: Likewise.
      	* gfortran.dg/io_tags_3.f90: Likewise.
      	* gfortran.dg/io_tags_4.f90: Likewise.
      	* gfortran.dg/io_tags_5.f90: Likewise.
      	* gfortran.dg/io_tags_6.f90: Likewise.
      	* gfortran.dg/io_tags_7.f90: Likewise.
      	* gfortran.dg/io_tags_8.f90: Likewise.
      	* gfortran.dg/io_tags_9.f90: Likewise.
      	* gfortran.dg/write_check5.f90: Likewise.
      Fritz Reese committed
    • c++: constexpr static data member instantiation [PR94523] · ef529765
      Here due to my recent change to store_init_value we were expanding the
      initializer of aw knowing that we were initializing aw.  When
      cxx_eval_call_expression finished the constructor, it wanted to look up the
      value of aw to set TREE_READONLY on it, but we haven't set DECL_INITIAL yet,
      so decl_constant_value tried to instantiate the initializer again.  And
      infinite recursion.  Stopped by optimizing the case of asking for the value
      of ctx->object, which is ctx->value.  It also would have worked to look in
      the values hash table, so let's move that up before decl_constant_value as
      well.
      
      gcc/cp/ChangeLog
      2020-04-09  Jason Merrill  <jason@redhat.com>
      
      	PR c++/94523
      	* constexpr.c (cxx_eval_constant_expression) [VAR_DECL]: Look at
      	ctx->object and ctx->global->values first.
      Jason Merrill committed
    • libstdc++: Implement LWG 3324 for [cmp.alg] function objects (LWG 3324) · 3fd1c229
      LWG 3324 changed the [cmp.alg] types to use std::compare_three_way
      instead of the <=> operator, but we were still using the old
      specification. In order to make the existing tests pass the N::X type
      needs to be equality comparable, so that three_way_comparable is
      satisfied and compare_three_way can be used.
      
      As part of this change I noticed that the compare_three_way call
      operator was unconditionally noexcept, which is incorrect.
      
      	* libsupc++/compare (compare_three_way): Fix noexcept-specifier.
      	(strong_order, weak_order, partial_order): Replace uses of <=> with
      	compare_three_way function object (LWG 3324).
      	* testsuite/18_support/comparisons/algorithms/partial_order.cc: Add
      	equality operator so that X satisfies three_way_comparable.
      	* testsuite/18_support/comparisons/algorithms/strong_order.cc:
      	Likewise.
      	* testsuite/18_support/comparisons/algorithms/weak_order.cc: Likewise.
      Jonathan Wakely committed
    • libstdc++: Add comparison operators to std::unique_ptr · 5b074864
      Some more C++20 changes from P1614R2, "The Mothership has Landed".
      
      This includes the proposed resolution for LWG 3426 to fix the three-way
      comparison with nullptr_t.
      
      The existing tests for unique_ptr comparisons don't actually check the
      results, only that the expressions compile and are convertible to bool.
      This also adds a test for the results of those comparisons for C++11 and
      up.
      
      	* include/bits/unique_ptr.h (operator<=>): Define for C++20.
      	* testsuite/20_util/default_delete/48631_neg.cc: Adjust dg-error line.
      	* testsuite/20_util/default_delete/void_neg.cc: Likewise.
      	* testsuite/20_util/unique_ptr/comparison/compare.cc: New test.
      	* testsuite/20_util/unique_ptr/comparison/compare_c++20.cc: New test.
      Jonathan Wakely committed
    • MSP430: Indiciate that the epilogue_helper insn does not fallthru · 07432a80
      This fixes an ICE in rtl_verify_fallthru, at cfgrtl.c:2970
      gcc.c-torture/execute/20071210-1.c for -mcpu=msp430 at -O2
      and above.
      
      The epilogue_helper insn was treated as a regular insn which will
      fallthru, so when a barrier is emitted after it, RTL verification failed
      as rtl_verify_fallthru.
      
      gcc/ChangeLog:
      
      2020-04-09  Jozef Lawrynowicz  <jozef.l@mittosystems.com>
      
      	* config/msp430/msp430.c (msp430_expand_epilogue): Use emit_jump_insn
      	when to emit the epilogue_helper insn.
      	* config/msp430/msp430.md (epilogue_helper): Add a return insn to the
      	RTL pattern.
      Jozef Lawrynowicz committed
    • cselib, var-tracking: Improve debug info after the cselib sp tracking changes [PR94495] · 33c45e51
      On the https://gcc.gnu.org/bugzilla/show_bug.cgi?id=94495#c5
      testcase GCC emits worse debug info after the PR92264 cselib.c
      changes.
      The difference at -O2 -g -dA in the assembly is (when ignoring debug info):
              # DEBUG g => [argp]
              # DEBUG k => [argp+0x20]
              # DEBUG j => [argp+0x18]
              # DEBUG a => di
              # DEBUG b => si
              # DEBUG c => dx
              # DEBUG d => cx
              # DEBUG h => [argp+0x8]
              # DEBUG e => r8
              # DEBUG i => [argp+0x10]
              # DEBUG f => r9
      ...
       .LVL4:
      +       # DEBUG h => [sp+0x10]
      +       # DEBUG i => [sp+0x18]
      +       # DEBUG j => [sp+0x20]
      +       # DEBUG k => [sp+0x28]
              # DEBUG c => entry_value
       # SUCC: EXIT [always]  count:1073741824 (estimated locally)
              ret
       .LVL5:
      +       # DEBUG k => [argp+0x20]
              # DEBUG a => bx
              # DEBUG b => si
              # DEBUG c => dx
              # DEBUG d => cx
              # DEBUG e => r8
              # DEBUG f => r9
      +       # DEBUG h => [argp+0x8]
      +       # DEBUG i => [argp+0x10]
      +       # DEBUG j => [argp+0x18]
      This means that before the changes, h, i, j, k could be all expressed
      in DW_AT_location directly with DW_OP_fbreg <some_offset>, but now we need
      to use a location list, where in the first part of the function and last
      part of the function (everything except the ret instruction) we use that
      DW_OP_fbreg <some_offset>, but for the single ret instruction we instead
      say those values live in something pointed by stack pointer + offset.
      It is true, but only because stack pointer + offset is equal to DW_OP_fbreg
      <some_offset> at that point.
      
      The var-tracking pass has for !frame_pointer_needed functions code to
      canonicalize stack pointer uses in the insns before it hands it over
      to cselib to cfa_base_rtx + offset depending on the stack depth at each
      point.  The problem is that on the last epilogue pop insn (the one right
      before ret) the canonicalization is sp = argp - 8 and add_stores records
      a MO_VAL_SET operation for that argp - 8 value (which is the
      SP_DERIVED_VALUE_P VALUE the cselib changes canonicalize sp based accesses
      on) and thus var-tracking from that point onwards tracks that that VALUE
      (2:2) now lives in sp.  At the end of function it of course needs to forget
      it again (or it would need on any changes to sp).  But when processing
      that uop, we note that the VALUE has changed and anything based on it
      changed too, so emit changes for everything.  Before that var-tracking
      itself doesn't track it in any register, so uses cselib and cselib knows
      through the permanent equivs how to compute it using argp (i.e. what
      will be DW_OP_fbreg).
      
      The following fix has two parts.  One is it detects if cselib can compute
      a certain VALUE using the cfa_base_rtx and for such VALUEs doesn't add
      the MO_VAL_SET operation, as it is better to express them using cfa_base_rtx
      rather than temporarily through something else.  And the other is make sure
      we reuse in !frame_pointer_needed the single SP_DERIVED_VALUE_P VALUE in
      other extended basic blocks too (and other VALUEs) too.  This can be done
      because we have computed the stack depths at the start of each basic block
      in vt_stack_adjustments and while cselib_reset_table is called at the end
      of each extended bb, which throws away all hard registers (but the magic
      cfa_base_rtx) and so can hint cselib.c at the start of the ebb what VALUE
      the sp hard reg has.  That means fewer VALUEs during var-tracking and more
      importantly that they will all have the cfa_base_rtx + offset equivalency.
      
      I have performed 4 bootstraps+regtests (x86_64-linux and i686-linux,
      each with this patch (that is the new cselib + var-tracking variant) and
      once with that patch reverted as well as all other cselib.c changes from
      this month; once that bootstrapped, I've reapplied the cselib.c changes and
      this patch and rebuilt cc1plus, so that the content is comparable, but built
      with the pre-Apr 2 cselib.c+var-tracking.c (that is the old cselib one)).
      
      Below are readelf -WS cc1plus | grep debug_ filtered to only have debug
      sections whose size actually changed, followed by dwlocstat results on
      cc1plus.  This shows that there was about 3% shrink in those .debug*
      sections for 32-bit and 1% shrink for 64-bit, with minor variable coverage
      changes one or the other way that are IMHO insignificant.
      
      32-bit old cselib
        [33] .debug_info       PROGBITS        00000000 29139c0 710e5fa 00      0   0  1
        [34] .debug_abbrev     PROGBITS        00000000 9a21fba 21ad6d 00      0   0  1
        [35] .debug_line       PROGBITS        00000000 9c3cd27 1a05e56 00      0   0  1
        [36] .debug_str        PROGBITS        00000000 b642b7d 7cad09 01  MS  0   0  1
        [37] .debug_loc        PROGBITS        00000000 be0d886 5792627 00      0   0  1
        [38] .debug_ranges     PROGBITS        00000000 1159fead e57218 00      0   0  1
      sum 263075589B
      32-bit new cselib + var-tracking
        [33] .debug_info       PROGBITS        00000000 29129c0 71065d1 00      0   0  1
        [34] .debug_abbrev     PROGBITS        00000000 9a18f91 21af28 00      0   0  1
        [35] .debug_line       PROGBITS        00000000 9c33eb9 195dffc 00      0   0  1
        [36] .debug_str        PROGBITS        00000000 b591eb5 7cace0 01  MS  0   0  1
        [37] .debug_loc        PROGBITS        00000000 bd5cb95 50185bf 00      0   0  1
        [38] .debug_ranges     PROGBITS        00000000 10d75154 e57068 00      0   0  1
      sum 254515196B (8560393B smaller)
      64-bit old cselib
        [33] .debug_info       PROGBITS        0000000000000000 25e64b0 84d7cc9 00      0   0  1
        [34] .debug_abbrev     PROGBITS        0000000000000000 aabe179 225e2d 00      0   0  1
        [35] .debug_line       PROGBITS        0000000000000000 ace3fa6 19a3505 00      0   0  1
        [37] .debug_loc        PROGBITS        0000000000000000 ce6e960 89707bc 00      0   0  1
        [38] .debug_ranges     PROGBITS        0000000000000000 157df11c 1c59a70 00      0   0  1
      sum 342274599B
      64-bit new cselib + var-tracking
        [33] .debug_info       PROGBITS        0000000000000000 25e64b0 84d8e86 00      0   0  1
        [34] .debug_abbrev     PROGBITS        0000000000000000 aabf336 225e8d 00      0   0  1
        [35] .debug_line       PROGBITS        0000000000000000 ace51c3 199ded5 00      0   0  1
        [37] .debug_loc        PROGBITS        0000000000000000 ce6a54d 85f62da 00      0   0  1
        [38] .debug_ranges     PROGBITS        0000000000000000 15460827 1c59a20 00      0   0  1
      sum 338610402B (3664197B smaller)
      32-bit old cselib
      cov%	samples	cumul
      0..10	1231599/48%	1231599/48%
      11..20	31017/1%	1262616/49%
      21..30	36495/1%	1299111/51%
      31..40	35846/1%	1334957/52%
      41..50	47179/1%	1382136/54%
      51..60	41203/1%	1423339/56%
      61..70	65504/2%	1488843/58%
      71..80	59656/2%	1548499/61%
      81..90	104399/4%	1652898/65%
      91..100	882231/34%	2535129/100%
      32-bit new cselib + var-tracking
      cov%	samples	cumul
      0..10	1230542/48%	1230542/48%
      11..20	30385/1%	1260927/49%
      21..30	36393/1%	1297320/51%
      31..40	36053/1%	1333373/52%
      41..50	47670/1%	1381043/54%
      51..60	41599/1%	1422642/56%
      61..70	65902/2%	1488544/58%
      71..80	59911/2%	1548455/61%
      81..90	104607/4%	1653062/65%
      91..100	882067/34%	2535129/100%
      64-bit old cselib
      cov%	samples	cumul
      0..10	1233211/48%	1233211/48%
      11..20	31120/1%	1264331/49%
      21..30	39230/1%	1303561/51%
      31..40	38887/1%	1342448/52%
      41..50	47519/1%	1389967/54%
      51..60	45264/1%	1435231/56%
      61..70	69431/2%	1504662/59%
      71..80	62114/2%	1566776/61%
      81..90	104587/4%	1671363/65%
      91..100	876085/34%	2547448/100%
      64-bit new cselib + var-tracking
      cov%	samples	cumul
      0..10	1233471/48%	1233471/48%
      11..20	31093/1%	1264564/49%
      21..30	39217/1%	1303781/51%
      31..40	38851/1%	1342632/52%
      41..50	47488/1%	1390120/54%
      51..60	45224/1%	1435344/56%
      61..70	69409/2%	1504753/59%
      71..80	62140/2%	1566893/61%
      81..90	104616/4%	1671509/65%
      91..100	875939/34%	2547448/100%
      
      2020-04-09  Jakub Jelinek  <jakub@redhat.com>
      
      	PR debug/94495
      	* cselib.h (cselib_record_sp_cfa_base_equiv,
      	cselib_sp_derived_value_p): Declare.
      	* cselib.c (cselib_record_sp_cfa_base_equiv,
      	cselib_sp_derived_value_p): New functions.
      	* var-tracking.c (add_stores): Don't record MO_VAL_SET for
      	cselib_sp_derived_value_p values.
      	(vt_initialize): Call cselib_record_sp_cfa_base_equiv at the
      	start of extended basic blocks other than the first one
      	for !frame_pointer_needed functions.
      Jakub Jelinek committed
    • aarch64: Add support for arm_sve_vector_bits · 38e62001
      This patch implements the "arm_sve_vector_bits" attribute, which can be
      used to create fixed-length versions of an SVE type while maintaining
      their "SVEness".  For example, when __ARM_FEATURE_SVE_BITS==256:
      
      typedef svint32_t vec __attribute__((arm_sve_vector_bits(256)));
      
      creates a 256-bit version of svint32_t.
      
      The attribute itself is quite simple.  However, it means that we now
      need to implement the full PCS rules for scalable types, whereas
      previously we only needed to handle scalable types that were built
      directly into the compiler.  See:
      
        https://github.com/ARM-software/abi-aa/blob/master/aapcs64/aapcs64.rst
      
      for more information about these rules.
      
      2020-04-09  Richard Sandiford  <richard.sandiford@arm.com>
      
      gcc/
      	* doc/sourcebuild.texi (aarch64_sve_hw, aarch64_sve128_hw)
      	(aarch64_sve256_hw, aarch64_sve512_hw, aarch64_sve1024_hw)
      	(aarch64_sve2048_hw): Document.
      	* config/aarch64/aarch64-protos.h
      	(aarch64_sve::handle_arm_sve_vector_bits_attribute): Declare.
      	* config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins): Define
      	__ARM_FEATURE_SVE_VECTOR_OPERATIONS when SVE is enabled.
      	* config/aarch64/aarch64-sve-builtins.cc (matches_type_p): New
      	function.
      	(find_type_suffix_for_scalar_type): Use it instead of comparing
      	TYPE_MAIN_VARIANTs.
      	(function_resolver::infer_vector_or_tuple_type): Likewise.
      	(function_resolver::require_vector_type): Likewise.
      	(handle_arm_sve_vector_bits_attribute): New function.
      	* config/aarch64/aarch64.c (pure_scalable_type_info): New class.
      	(aarch64_attribute_table): Add arm_sve_vector_bits.
      	(aarch64_return_in_memory_1):
      	(pure_scalable_type_info::piece::get_rtx): New function.
      	(pure_scalable_type_info::num_zr): Likewise.
      	(pure_scalable_type_info::num_pr): Likewise.
      	(pure_scalable_type_info::get_rtx): Likewise.
      	(pure_scalable_type_info::analyze): Likewise.
      	(pure_scalable_type_info::analyze_registers): Likewise.
      	(pure_scalable_type_info::analyze_array): Likewise.
      	(pure_scalable_type_info::analyze_record): Likewise.
      	(pure_scalable_type_info::add_piece): Likewise.
      	(aarch64_some_values_include_pst_objects_p): Likewise.
      	(aarch64_returns_value_in_sve_regs_p): Use pure_scalable_type_info
      	to analyze whether the type is returned in SVE registers.
      	(aarch64_takes_arguments_in_sve_regs_p): Likwise whether the type
      	is passed in SVE registers.
      	(aarch64_pass_by_reference_1): New function, extracted from...
      	(aarch64_pass_by_reference): ...here.  Use pure_scalable_type_info
      	to analyze whether the type is a pure scalable type and, if so,
      	whether it should be passed by reference.
      	(aarch64_return_in_msb): Return false for pure scalable types.
      	(aarch64_function_value_1): Fold back into...
      	(aarch64_function_value): ...this function.  Use
      	pure_scalable_type_info to analyze whether the type is a pure
      	scalable type and, if so, which registers it should use.  Handle
      	types that include pure scalable types but are not themselves
      	pure scalable types.
      	(aarch64_return_in_memory_1): New function, split out from...
      	(aarch64_return_in_memory): ...here.  Use pure_scalable_type_info
      	to analyze whether the type is a pure scalable type and, if so,
      	whether it should be returned by reference.
      	(aarch64_layout_arg): Remove orig_mode argument.  Use
      	pure_scalable_type_info to analyze whether the type is a pure
      	scalable type and, if so, which registers it should use.  Handle
      	types that include pure scalable types but are not themselves
      	pure scalable types.
      	(aarch64_function_arg): Update call accordingly.
      	(aarch64_function_arg_advance): Likewise.
      	(aarch64_pad_reg_upward): On big-endian targets, return false for
      	pure scalable types that are smaller than 16 bytes.
      	(aarch64_member_type_forces_blk): New function.
      	(aapcs_vfp_sub_candidate): Exit early for built-in SVE types.
      	(aarch64_short_vector_p): Return false for VECTOR_TYPEs that
      	correspond to built-in SVE types.  Do not rely on a vector mode
      	if the type includes an pure scalable type.  When returning true,
      	assert that the mode is not an SVE mode.
      	(aarch64_vfp_is_call_or_return_candidate): Do not check for SVE
      	built-in types here.  When returning true, assert that the type
      	does not have an SVE mode.
      	(aarch64_can_change_mode_class): Don't allow anything to change
      	between a predicate mode and a non-predicate mode.  Also don't
      	allow changes between SVE vector modes and other modes that
      	might be bigger than 128 bits.
      	(aarch64_invalid_binary_op): Reject binary operations that mix
      	SVE and GNU vector types.
      	(TARGET_MEMBER_TYPE_FORCES_BLK): Define.
      
      gcc/testsuite/
      	* gcc.target/aarch64/sve/acle/general/attributes_1.c: New test.
      	* gcc.target/aarch64/sve/acle/general/attributes_2.c: Likewise.
      	* gcc.target/aarch64/sve/acle/general/attributes_3.c: Likewise.
      	* gcc.target/aarch64/sve/acle/general/attributes_4.c: Likewise.
      	* gcc.target/aarch64/sve/acle/general/attributes_5.c: Likewise.
      	* gcc.target/aarch64/sve/acle/general/attributes_6.c: Likewise.
      	* gcc.target/aarch64/sve/acle/general/attributes_7.c: Likewise.
      	* gcc.target/aarch64/sve/pcs/struct.h: New file.
      	* gcc.target/aarch64/sve/pcs/struct_1_128.c: New test.
      	* gcc.target/aarch64/sve/pcs/struct_1_256.c: Likewise.
      	* gcc.target/aarch64/sve/pcs/struct_1_512.c: Likewise.
      	* gcc.target/aarch64/sve/pcs/struct_1_1024.c: Likewise.
      	* gcc.target/aarch64/sve/pcs/struct_1_2048.c: Likewise.
      	* gcc.target/aarch64/sve/pcs/struct_2_128.c: Likewise.
      	* gcc.target/aarch64/sve/pcs/struct_2_256.c: Likewise.
      	* gcc.target/aarch64/sve/pcs/struct_2_512.c: Likewise.
      	* gcc.target/aarch64/sve/pcs/struct_2_1024.c: Likewise.
      	* gcc.target/aarch64/sve/pcs/struct_2_2048.c: Likewise.
      	* gcc.target/aarch64/sve/pcs/struct_3_128.c: Likewise.
      	* gcc.target/aarch64/sve/pcs/struct_3_256.c: Likewise.
      	* gcc.target/aarch64/sve/pcs/struct_3_512.c: Likewise.
      	* lib/target-supports.exp (check_effective_target_aarch64_sve128_hw)
      	(check_effective_target_aarch64_sve512_hw)
      	(check_effective_target_aarch64_sve1024_hw)
      	(check_effective_target_aarch64_sve2048_hw): New procedures.
      Richard Sandiford committed
    • aarch64: Add a separate "SVE sizeless type" attribute · 5002dae3
      It's more convenient for a later patch if sizelessness is represented
      separately from "SVEness".  "SVEness" is an ABI property that carries
      forward into gimple and beyond, and continues to matter during LTO.
      Sizelessness is just a frontend restriction and can be ignored after
      that.
      
      2020-04-09  Richard Sandiford  <richard.sandiford@arm.com>
      
      gcc/
      	* config/aarch64/aarch64.c (aarch64_attribute_table): Add
      	"SVE sizeless type".
      	* config/aarch64/aarch64-sve-builtins.cc (make_type_sizeless)
      	(sizeless_type_p): New functions.
      	(register_builtin_types): Apply make_type_sizeless to the type.
      	(register_tuple_type): Likewise.
      	(verify_type_context): Use sizeless_type_p instead of builin_type_p.
      Richard Sandiford committed
    • [Arm] Allow the use of arm_cde.h for C++ · a4d2774c
      arm_cde.h includes the arm_mve_types.h header, which declares some C++
      overloaded functions.
      
      There is a superfluous `extern "C"` statement in arm_cde.h, which
      encompasses these functions.  This means that if compiling for C++, the
      overloaded functions are declared, but are declared without name
      mangling.  Hence all the function names are the same and we have many
      conflicting declarations.
      
      Testing Done:
        Regression tested for arm-none-eabi.
      
      gcc/ChangeLog:
      
      2020-04-09  Matthew Malcomson  <matthew.malcomson@arm.com>
      
      	* config/arm/arm_cde.h: Remove `extern "C"` when compiling for
      	C++.
      
      gcc/testsuite/ChangeLog:
      
      2020-04-09  Matthew Malcomson  <matthew.malcomson@arm.com>
      
      	* g++.target/arm/cde_mve.C: New test.
      Matthew Malcomson committed
    • libphobos: Remove --enable-druntime-gc configure option. · bbb0de4a
      This is yet another old option that would have been somewhat useful back
      before the D front-end implementation was able to support compiling
      without the Druntime library.
      
      Now however, -fno-druntime makes the gcstub package redundant, so the
      option has been removed, along with the package itself.
      
      libphobos/ChangeLog:
      
      	* configure: Regenerate.
      	* libdruntime/Makefile.am (ALL_DRUNTIME_INSTALL_DSOURCES): Remove
      	DRUNTIME_DSOURCES_GC and DRUNTIME_DSOURCES_GCSTUB.
      	(DRUNTIME_DSOURCES): Add gc/*.d sources.
      	(DRUNTIME_DSOURCES_GC): Remove.
      	(DRUNTIME_DSOURCES_GCSTUB): Remove.
      	* libdruntime/Makefile.in: Regenerate.
      	* libdruntime/gcstub/gc.d: Remove.
      	* m4/druntime.m4 (DRUNTIME_GC): Remove.
      Iain Buclaw committed
    • [testsuite][arm] Fix cmse-15.c expected output · 8b5bc7d1
      The cmse-15.c testcase fails at -Os because ICF means that we
      generate
      nonsecure2:
              b       nonsecure0
      
      which is OK, but does not match the currently expected
      nonsecure2:
      ...
              bl      __gnu_cmse_nonsecure_call
      
      (see https://gcc.gnu.org/pipermail/gcc-patches/2020-April/543190.html)
      
      The test has already different expectations for v8-M and v8.1-M.
      
      This patch uses check-function-bodies to account for the
      different possibilities:
      - v8-M vs v8.1-M via different target selectors where needed
      - code generation variants (-0?) via multiple regexps
      
      I've tested that the test now passes with --target-board=-march=armv8-m.main
      and --target-board=-march=armv8.1-m.main.
      Christophe Lyon committed
    • [testsuite] scanasm.exp: Fix target-selector handling in check-function-bodies · 93674a72
      {target { ! a } } does not work because the greedy regexp extracts
      "! a }" instead of "target { ! a }".
      
      This patch replaces it with a non-greedy regexp.
      
      2020-04-09  Christophe Lyon  <christophe.lyon@linaro.org>
      
      	* lib/scanasm.exp (check-function-bodies): Use non-greedy regexp
      	when extracting the target selector.
      Christophe Lyon committed
    • Merge top-level configury changes from gdb · f9d09df0
      We recently rearranged the gdb source tree to move a common library
      and gdbserver to the top-level.  This made the build more uniform and
      also a bit faster (due to sharing of built objects).
      
      This patch re-syncs these changes the top-level configury back to gcc.
      
      ChangeLog:
      	* configure: Rebuild.
      	* Makefile.in: Rebuild.
      	* Makefile.def (gdbsupport, gdbserver): New host modules.
      	(configure-gdb): Depend on all-gdbsupport.
      	(all-gdb): Depend on all-gdbsupport, all-libctf.
      	* configure.ac (host_tools): Add gdbserver.
      	Conditionally build gdbserver and gdbsupport.
      Tom Tromey committed
    • sra: Fix sra_modify_expr handling of partial writes (PR 94482) · 2111d540
      when sra_modify_expr is invoked on an expression that modifies only
      part of the underlying replacement, such as a BIT_FIELD_REF on a LHS
      of an assignment and the SRA replacement's type is not compatible with
      what is being replaced (0th operand of the B_F_R in the above
      example), it does not work properly, basically throwing away the partd
      of the expr that should have stayed intact.
      
      This is fixed in two ways.  For BIT_FIELD_REFs, which operate on the
      binary image of the replacement (and so in a way serve as a
      VIEW_CONVERT_EXPR) we just do not bother with convertsing.  For
      REALPART_EXPRs and IMAGPART_EXPRs, if the replacement is not a
      register, we insert a VIEW_CONVERT_EXPR under
      the complex partial access expression, which is always OK, for loads
      from registers we take the extra step of converting it to a temporary.
      
      This revealed a bug in fwprop which is fixed with the hunk from Richi.
      
      The testcase for handling REALPART_EXPR and IMAGPART_EXPR is a bit
      fragile because SRA prefers complex and vector types over anything
      else (and in between the two it decides based on TYPE_UID which in my
      testing today always preferred complex types) and so I only run it at
      -O1 (which is the only level where the the test fails for me).
      
      Bootstrapped and tested on x86_64-linux, i686-linux and aarch64-linux.
      
      2020-04-09  Martin Jambor  <mjambor@suse.cz>
      	    Richard Biener  <rguenther@suse.de>
      
      	PR tree-optimization/94482
      	* tree-sra.c (create_access_replacement): Dump new replacement with
      	TDF_UID.
      	(sra_modify_expr): Fix handling of cases when the original EXPR writes
      	to only part of the replacement.
      	* tree-ssa-forwprop.c (pass_forwprop::execute): Properly verify
      	the first operand of combinations into REAL/IMAGPART_EXPR and
      	BIT_FIELD_REF.
      
      	testsuite/
      	* gcc.dg/torture/pr94482.c: New test.
      	* gcc.dg/tree-ssa/pr94482-2.c: Likewise.
      Martin Jambor committed
    • c++: Fix wrong paren-init of aggregates interference [PR93790] · 830c5724
      This PR points out that we are rejecting valid code in C++20.  The
      problem is that we were surreptitiously transforming
      
        T& t(e)
      
      into
      
        T& t{e}
      
      which is wrong, because the type of e had a conversion function to T,
      while aggregate initialization of t from e doesn't work.  Therefore, I
      was violating a design principle of P0960, which says that any existing
      meaning of A(b) should not change.  So I think we should only attempt to
      aggregate-initialize if the original expression was ill-formed.
      
      Another design principle is that () should work where {} works, so this:
      
        struct S { int i; };
        const S& s(1);
      
      has to keep working.  Thus the special handling for paren-lists with one
      element.  (A paren-list with more than one element would give you "error:
      expression list treated as compound expression in initializer" C++17.)
      
      	PR c++/93790
      	* call.c (initialize_reference): If the reference binding failed, maybe
      	try initializing from { }.
      	* decl.c (grok_reference_init): For T& t(e), set
      	LOOKUP_AGGREGATE_PAREN_INIT but don't build up a constructor yet.
      
      	* g++.dg/cpp2a/paren-init23.C: New test.
      	* g++.dg/init/aggr14.C: New test.
      Marek Polacek committed
    • Avoid g++.dg/lto/alias-4_0.C test failure on ARM [PR91322] · f60979ed
      	PR tree-optimization/91322
      	* g++.dg/lto/alias-4_0.C: Avoid conflict with va_list on ARM and add
      	a template testing that.
      Jan Hubicka committed
    • testsuite: Tweak check-function-bodies interface · 7ed2d6cb
      In g:2171a920 I'd tried to fix
      various ILP32 testsuite failures by restricting some tests to LP64.
      Unfortunately, I messed up the check-function-bodies syntax and passed
      the target selector as the "option" parameter, which had the effect of
      disabling the tests for both ILP32 and LP64.
      
      The fix ought to have been to add "" as the option parameter.  However,
      check-function-bodies wasn't treating "" in the same way as an omitted
      argument.  The easiest fix seemed to be turn the argument into a list of
      options, which also makes the interface a bit more general.
      
      Having done that, it seemed a good idea to check for things that look
      like target/xfail selectors, so that the mistake isn't silent next time.
      
      2020-04-09  Richard Sandiford  <richard.sandiford@arm.com>
      
      gcc/
      	* doc/sourcebuild.texi (check-function-bodies): Treat the third
      	parameter as a list of option regexps and require each regexp
      	to match.
      
      gcc/testsuite/
      	* lib/scanasm.exp (check-function-bodies): Treat the third
      	parameter as a list of option regexps and require each regexp
      	to match.  Check for cases in which a target/xfail selector
      	was mistakenly passed to the options argument.
      	* gcc.target/aarch64/sve/pcs/args_1.c: Add an empty options list
      	to the invocation of check-function-bodies.
      	* gcc.target/aarch64/sve/pcs/args_2.c: Likewise.
      	* gcc.target/aarch64/sve/pcs/args_3.c: Likewise.
      	* gcc.target/aarch64/sve/pcs/args_4.c: Likewise.
      	* gcc.target/aarch64/sve/pcs/return_1.c: Likewise.
      	* gcc.target/aarch64/sve/pcs/return_1_1024.c: Likewise.
      	* gcc.target/aarch64/sve/pcs/return_1_128.c: Likewise.
      	* gcc.target/aarch64/sve/pcs/return_1_2048.c: Likewise.
      	* gcc.target/aarch64/sve/pcs/return_1_256.c: Likewise.
      	* gcc.target/aarch64/sve/pcs/return_1_512.c: Likewise.
      	* gcc.target/aarch64/sve/pcs/return_2.c: Likewise.
      	* gcc.target/aarch64/sve/pcs/return_3.c: Likewise.
      	* gcc.target/aarch64/sve/pcs/return_4.c: Likewise.
      	* gcc.target/aarch64/sve/pcs/return_4_1024.c: Likewise.
      	* gcc.target/aarch64/sve/pcs/return_4_128.c: Likewise.
      	* gcc.target/aarch64/sve/pcs/return_4_2048.c: Likewise.
      	* gcc.target/aarch64/sve/pcs/return_4_256.c: Likewise.
      	* gcc.target/aarch64/sve/pcs/return_4_512.c: Likewise.
      	* gcc.target/aarch64/sve/pcs/return_5.c: Likewise.
      	* gcc.target/aarch64/sve/pcs/return_5_1024.c: Likewise.
      	* gcc.target/aarch64/sve/pcs/return_5_128.c: Likewise.
      	* gcc.target/aarch64/sve/pcs/return_5_2048.c: Likewise.
      	* gcc.target/aarch64/sve/pcs/return_5_256.c: Likewise.
      	* gcc.target/aarch64/sve/pcs/return_5_512.c: Likewise.
      	* gcc.target/aarch64/sve/pcs/return_6.c: Likewise.
      	* gcc.target/aarch64/sve/pcs/return_6_1024.c: Likewise.
      	* gcc.target/aarch64/sve/pcs/return_6_128.c: Likewise.
      	* gcc.target/aarch64/sve/pcs/return_6_2048.c: Likewise.
      	* gcc.target/aarch64/sve/pcs/return_6_256.c: Likewise.
      	* gcc.target/aarch64/sve/pcs/return_6_512.c: Likewise.
      	* gcc.target/aarch64/sve/pcs/saves_2_be_nowrap.c: Likewise.
      	* gcc.target/aarch64/sve/pcs/saves_2_be_wrap.c: Likewise.
      	* gcc.target/aarch64/sve/pcs/saves_2_le_nowrap.c: Likewise.
      	* gcc.target/aarch64/sve/pcs/saves_2_le_wrap.c: Likewise.
      	* gcc.target/aarch64/sve/pcs/saves_3.c: Likewise.
      	* gcc.target/aarch64/sve/pcs/saves_4_be.c: Likewise.
      	* gcc.target/aarch64/sve/pcs/saves_4_le.c: Likewise.
      	* gcc.target/aarch64/sve/pcs/stack_clash_2_128.c: Likewise.
      	* gcc.target/aarch64/sve/pcs/varargs_1.c: Likewise.
      	* gcc.target/aarch64/sve/pcs/varargs_2_f16.c: Likewise.
      	* gcc.target/aarch64/sve/pcs/varargs_2_f32.c: Likewise.
      	* gcc.target/aarch64/sve/pcs/varargs_2_f64.c: Likewise.
      	* gcc.target/aarch64/sve/pcs/varargs_2_s16.c: Likewise.
      	* gcc.target/aarch64/sve/pcs/varargs_2_s32.c: Likewise.
      	* gcc.target/aarch64/sve/pcs/varargs_2_s64.c: Likewise.
      	* gcc.target/aarch64/sve/pcs/varargs_2_s8.c: Likewise.
      	* gcc.target/aarch64/sve/pcs/varargs_2_u16.c: Likewise.
      	* gcc.target/aarch64/sve/pcs/varargs_2_u32.c: Likewise.
      	* gcc.target/aarch64/sve/pcs/varargs_2_u64.c: Likewise.
      	* gcc.target/aarch64/sve/pcs/varargs_2_u8.c: Likewise.
      Richard Sandiford committed
    • testsuite/93369 - use -shared to avoid issue with ODR violation · bb404606
      The testcase contains an ODR violation and thus the observed
      link failure is an accepted outcome (it originally was for
      an ICE during WPA).  Thus the following adds -shared to the link.
      
      2020-04-09  Richard Biener  <rguenther@suse.de>
      
      	PR testsuite/93369
      	* g++.dg/lto/pr64076_0.C: Add -shared -fPIC.
      	* g++.dg/lto/pr64076_1.C: Add -fPIC.
      Richard Biener committed
    • PR target/94530 · af19e4d0
      gcc/ChangeLog
      
      2020-04-09  Andrea Corallo  <andrea.corallo@arm.com>
      
      	PR target/94530
      	* config/aarch64/falkor-tag-collision-avoidance.c
      	(valid_src_p): Fix missing rtx type check.
      
      gcc/testsuite/ChangeLog
      
      2020-04-09  Andrea Corallo  <andrea.corallo@arm.com>
      
      	* gcc.target/aarch64/pr94530.c: New test.
      Andrea Corallo committed
    • Add unsigned type iv_cand for iv_use with non mode-precision type · ed80b385
      Precisely,  for iv_use if it's not integer/pointer type, or non-mode
      precision type, add candidate for the corresponding scev in unsigned
      type with the same precision, rather than its original type.
      
      gcc/
          PR tree-optimization/93674
          * tree-ssa-loop-ivopts.c (langhooks.h): New include.
          (add_iv_candidate_for_use): For iv_use of non integer or pointer type,
          or non-mode precision type, add candidate in unsigned type with the
          same precision.
      
      gcc/testsuite/
          PR tree-optimization/93674
          * g++.dg/pr93674.C: New test.
      Bin Cheng committed
    • coroutines: Add cleanups, where required, to statements with captured references. · 926d39c3
      When we promote captured temporaries to local variables, we also
      remove their initializers from the relevant call expression.  This
      means that we should recompute the need for a cleanup expression
      once the set of temporaries that remains becomes known.
      
      gcc/cp/ChangeLog:
      
      2020-04-08  Iain Sandoe  <iain@sandoe.co.uk>
      	    Jun Ma  <JunMa@linux.alibaba.com>
      
      	* coroutines.cc (maybe_promote_captured_temps): Add a
      	cleanup expression, if needed, to any call from which
      	we promoted temporaries captured by reference.
      Iain Sandoe committed
    • Require pthread effective target for test case using -pthread option. · fe183714
      2020-04-08  Sandra Loosemore  <sandra@codesourcery.com>
      
      	gcc/testsuite/
      	* g++.dg/tree-ssa/pr93940.C: Require pthread target.
      Sandra Loosemore committed
    • [testsuite] Fix PR94079 by respecting vect_hw_misalign [PR94079] · e7c4084d
      This is another vect case which requires special handling with
      vect_hw_misalign.  The alignment of the second part requires
      misaligned vector access supports.  This patch is to adjust
      the related guard condition and comments.
      
      Verified it on ppc64-redhat-linux (Power7 BE).
      
      2020-04-09  Kewen Lin  <linkw@gcc.gnu.org>
      
      gcc/testsuite/ChangeLog
      
          PR testsuite/94023
          * gfortran.dg/vect/pr83232.f90: Expect 2 rather than 3 times SLP on
          non-vect_hw_misalign targets.
      Kewen Lin committed
    • Daily bump. · 4049edc2
      GCC Administrator committed
  3. 08 Apr, 2020 8 commits
    • libphobos: Add --enable-libphobos-checking configure option · c0dbfbd7
      As GDCFLAGS is overriden by the top-level make file with '-O2 -g',
      libphobos ends up always being built with all contracts, invariants, and
      asserts compiled in.  This adds a new configurable that defaults to omit
      compiling any run-time checks into the library using '-frelease'.
      
      Other choices either set the flags '-fno-release', enabling all run-time
      checks, or '-fassert', which only compiles in asserts.
      
      The omission of compiling in contracts results in a smaller library
      size, with faster build times.
      
      libphobos/ChangeLog:
      
      	PR d/94305
      	* Makefile.in: Regenerate.
      	* configure: Regenerate.
      	* configure.ac: Add --enable-libphobos-checking and substitute
      	CHECKING_DFLAGS.  Remove -frelease from GDCFLAGS.
      	* libdruntime/Makefile.am: Add CHECKING_DFLAGS to AM_DFLAGS.
      	* libdruntime/Makefile.in: Regenerate.
      	* src/Makefile.am: Add CHECKING_DFLAGS to AM_DFLAGS.
      	* src/Makefile.in: Regenerate.
      	* testsuite/Makefile.in: Regenerate.
      	* testsuite/testsuite_flags.in: Add -fno-release -funittest to
      	--gdcflags.
      Iain Buclaw committed
    • libphobos: Remove --enable-thread-lib configure option. · 6e286c8d
      This is another old option that doesn't make sense as a configurable.
      So the option has been removed, and the check for AC_SEARCH_LIBS moved
      into the main configure.ac file.
      
      libphobos/ChangeLog:
      
      	* configure: Regenerate.
      	* configure.ac: Use AC_SEARCH_LIBS for pthread_create.
      	* m4/druntime/libraries.m4: Remove DRUNTIME_LIBRARIES_THREAD.
      Iain Buclaw committed
    • rs6000: Link with libc128.a for long-double-128. · 48242b2c
      AIX applications using 128-bit long double must be linked with
      libc128.a, in order to have 128-bit compatible routines.
      
      AIX 7.2, 7.1, 6.1: Build/Tests: OK
      
      2020-04-03 Clément Chigot <clement.chigot@atos.net>
      
      * config/rs6000/aix61.h (LIB_SPEC): Add -lc128 with -mlong-double-128.
      * config/rs6000/aix71.h (LIB_SPEC): Likewise.
      * config/rs6000/aix72.h (LIB_SPEC): Likewise.
      Clement Chigot committed
    • libphobos: Remove --enable-unix configure option. · 72c136c9
      This option is not useful on its own as all posix modules require the
      compiler to predefine version(Posix) anyway.  So the option has been
      removed, and logic moved into DRUNTIME_OS_SOURCES, where the conditional
      DRUNTIME_OS_POSIX is set instead.
      
      libphobos/ChangeLog:
      
      	* configure: Regenerate.
      	* configure.ac: Remove DRUNTIME_OS_UNIX.
      	* libdruntime/Makefile.am: Add DRUNTIME_DSOURCES_POSIX if
      	DRUNTIME_OS_POSIX is true.
      	* libdruntime/Makefile.in: Regenerate.
      	* m4/druntime/os.m4 (DRUNTIME_OS_UNIX): Remove, move AM_CONDITIONAL
      	logic to...
      	(DRUNTIME_OS_SOURCES): ...here.  Rename conditional to
      	DRUNTIME_OS_POSIX.
      Iain Buclaw committed
    • cselib, reload: Fix cselib ICE on m68k/microblaze [PR94526] · d0cc1b79
      The following testcase ICEs on m68k (and another one Jeff mailed me
      privately on microblaze).
      The problem is that reload creates two DEBUG_INSNs with the same
      value of (plus:P (reg:P sp) (const_int 0)), we compute correctly the
      same hash value for them, but then don't find them in the cselib hash table,
      as rtx_equal_for_cselib_1 thinks it is different from (reg:P sp),
      and trigger an assertion failure that requires that from two different debug
      insns one doesn't add locations to VALUEs.
      
      The patch has two fixes for this, each fixes the ICE on both targets
      separately, but I think we want both.
      
      The cselib.c change ensures that rtx_equal_for_cselib_1 considers
      (value:P sp_derived_value) and (plus:P (reg:P sp) (const_int 0)) equivalent.
      
      The reload1.c change makes sure we don't create those bogus plus 0
      expressions.  I understand the reasons for creating them, but they don't
      really apply to DEBUG_INSNs; we don't have validity matching there, all we
      care is that the expressions aren't arbitrarily deep, but it is just fine
      to fold x + 0 into just x in there.
      
      2020-04-08  Jakub Jelinek  <jakub@redhat.com>
      
      	PR middle-end/94526
      	* cselib.c (autoinc_split): Handle e->val_rtx being SP_DERIVED_VALUE_P
      	with zero offset.
      	* reload1.c (eliminate_regs_1): Avoid creating
      	(plus (reg) (const_int 0)) in DEBUG_INSNs.
      
      	* gcc.dg/pr94526.c: New test.
      Jakub Jelinek committed
    • vect: Fix up lowering of TRUNC_MOD_EXPR by negative constant [PR94524] · f52eb4f9
      The first testcase below is miscompiled, because for the division part
      of the lowering we canonicalize negative divisors to their absolute value
      (similarly how expmed.c canonicalizes it), but when multiplying the division
      result back by the VECTOR_CST, we use the original constant, which can
      contain negative divisors.
      
      Fixed by computing ABS_EXPR of the VECTOR_CST.  Unfortunately, fold-const.c
      doesn't support const_unop (ABS_EXPR, VECTOR_CST) and I think it is too late
      in GCC 10 cycle to add it now.
      
      Furthermore, while modulo by most negative constant happens to return the
      right value, it does that only by invoking UB in the IL, because
      we then expand division by that 1U+INT_MAX and say for INT_MIN % INT_MIN
      compute the division as -1, and then multiply by INT_MIN, which is signed
      integer overflow.  We in theory could do the computation in unsigned vector
      types instead, but is it worth bothering.  People that are doing % INT_MIN
      are either testing for standard conformance, or doing something wrong.
      So, I've also added punting on % INT_MIN, both in vect lowering and vect
      pattern recognition (we punt already for / INT_MIN).
      
      2020-04-08  Jakub Jelinek  <jakub@redhat.com>
      
      	PR tree-optimization/94524
      	* tree-vect-generic.c (expand_vector_divmod): If any elt of op1 is
      	negative for signed TRUNC_MOD_EXPR, multiply with absolute value of
      	op1 rather than op1 itself at the end.  Punt for signed modulo by
      	most negative constant.
      	* tree-vect-patterns.c (vect_recog_divmod_pattern): Punt for signed
      	modulo by most negative constant.
      
      	* gcc.c-torture/execute/pr94524-1.c: New test.
      	* gcc.c-torture/execute/pr94524-2.c: New test.
      Jakub Jelinek committed
    • testsuite: Fix up pr94314*.C tests [PR94314] · 6c9a7115
      The test FAIL everywhere where size_t is not unsigned long.  Fixed by
      using __SIZE_TYPE__ instead.
      
      2020-04-08  Jakub Jelinek  <jakub@redhat.com>
      
      	PR c++/94314
      	* g++.dg/pr94314.C (A::operator new, B::operator new, C::operator new):
      	Use __SIZE_TYPE__ instead of unsigned long.
      	* g++.dg/pr94314-3.C (base::operator new, B::operator new): Likewise.
      Jakub Jelinek committed
    • openacc: Fix up declare-pr94120.C testcase [PR94533] · 08d1e7a5
      This test has been put in a wrong directory, where OpenACC tests aren't
      tested with -fopenacc, and also contained trailing semicolons.
      I've moved it where it belongs, added dg-error directives and removed
      the extra semicolons.
      
      2020-04-08  Jakub Jelinek  <jakub@redhat.com>
      
      	PR middle-end/94120
      	PR testsuite/94533
      	* g++.dg/declare-pr94120.C: Move test to ...
      	* g++.dg/goacc/declare-pr94120.C: ... here.  Add dg-error directives.
      Jakub Jelinek committed